Enumerations
enum VideoInputModuleId
| Name | Value |
|---|---|
| kVideoInputModule0 | 0 |
| kVideoInputModule1 | 1 |
There are two video input modules (VDIN) in Amlogic display engine that
receive video from external input (e.g. BT.656) or internal input (e.g.
internal VIU loopback), and write the data back to the DDR memory.
Defined at line 20 of file ../../src/graphics/display/drivers/amlogic-display/video-input-regs.h
enum viu_type
| Name | Value |
|---|---|
| VIU_ENCL | 0 |
| VIU_ENCI | 1 |
| VIU_ENCP | 2 |
| VIU_ENCT | 3 |
Defined at line 21 of file ../../src/graphics/display/drivers/amlogic-display/hdmi-host.h
enum HdmiTransmitterControllerCall
| Name | Value |
|---|---|
| kConfigHdmitx | 0 |
| kSetupInterrupts | 1 |
| kReset | 2 |
| kSetupScdc | 3 |
| kResetFc | 4 |
| kSetFcScramblerCtrl | 5 |
Defined at line 24 of file ../../src/graphics/display/drivers/amlogic-display/hdmi-transmitter-test.cc
enum DsiOpcode
| Name | Value |
|---|---|
| kDsiOpGpio | 0xf0 |
| kDsiOpReadReg | 0xfc |
| kDsiOpDelay | 0xfd |
| kDsiOpSleep | 0xff |
DSI packet DI (Data Identifier) values that convey special operations.
The values here share a namespace with valid DSI DIs, described by Section
8.5.1 "Data Identifier Byte" and Section 8.7 "Processor to Peripheral
Direction (Processor-Sourced) Packet Data Types" of the DSI spec.
Defined at line 25 of file ../../src/graphics/display/drivers/amlogic-display/panel-config.h
enum ColorSpaceConversionMode
| Name | Value |
|---|---|
| kRgbInternalRgbOut | 0 |
| kRgbInternalYuvOut | 1 |
Mode of color space conversion from the internal Video Input Unit (VIU) to
the Video output module (Vout) by the Video Post Processor (VPP).
Defined at line 26 of file ../../src/graphics/display/drivers/amlogic-display/vpu.h
enum HotPlugDetectionState
| Name | Value |
|---|---|
| kNotDetected | 0 |
| kDetected | 1 |
The logical state of a Hot-Plug Detect pin.
Defined at line 27 of file ../../src/graphics/display/drivers/amlogic-display/hot-plug-detection.h
enum VoutType
| Name | Value |
|---|---|
| kDsi | 0 |
| kHdmi | 1 |
Defined at line 29 of file ../../src/graphics/display/drivers/amlogic-display/vout.h
enum EncoderBuiltInSelfTestMode
| Name | Value |
|---|---|
| kFixedColor | 0 |
| kColorBar | 1 |
| kThinLines | 2 |
| kDotGrid | 3 |
Defined at line 39 of file ../../src/graphics/display/drivers/amlogic-display/encoder-regs.h
enum PowerOpcode
| Name | Value |
|---|---|
| kPowerOpGpio | 0 |
| kPowerOpSignal | 2 |
| kPowerOpAwaitGpio | 4 |
| kPowerOpExit | 0xff |
Defined at line 72 of file ../../src/graphics/display/drivers/amlogic-display/panel-config.h
enum BtiResourceIndex
| Name | Value |
|---|---|
| kDma | 0 |
The resource ordering in the board driver's `display_btis` table.
Defined at line 105 of file ../../src/graphics/display/drivers/amlogic-display/board-resources.h
enum SecureMonitorCallResourceIndex
| Name | Value |
|---|---|
| kSiliconProvider | 0 |
The resource ordering in the board driver's `kDisplaySmcs` table.
Defined at line 119 of file ../../src/graphics/display/drivers/amlogic-display/board-resources.h
enum VideoClock
| Name | Value |
|---|---|
| kVideoClock1 | 1 |
| kVideoClock2 | 2 |
Video clock tree has two muxes for input signals, named video clock 1 / mux 1
(VID_CLK) and video clock 2 / mux 2 (VIID_CLK / V2).
Each video clock mux is followed by a programmable divisor (/N0 for mux 1
and /N2 for mux 2) and then multiple fixed divisors (/2, /4, /6 and /12).
Each encoder / HDMI transmitter / video digital-to-analog converter (DAC)
clock signal has its own mux, to select a clock from those provided by the
above divisors.
The output of video clock 1 is also used to generate the timing
controller signal and LCD analog clocks.
Defined at line 129 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
enum VideoClockMuxSource
| Name | Value |
|---|---|
| kVideoPll | 0 |
| kGeneralPurpose0Pll | 1 |
| kHifiPll | 2 |
| kMpll1 | 3 |
| kFixed666Mhz | 4 |
| kFixed500Mhz | 5 |
| kFixed400Mhz | 6 |
| kFixed285_7Mhz | 7 |
Selection of video clock muxes.
The mux value
<
-> clock source mapping is shown in the following diagram
of the Amlogic datasheets:
A311D Datasheet, Figure 8-13 "Video Clock Tree", Section 8.7.1.4 EE Clock
Tree, Page 114.
S905D2 Datasheet, Figure 6-12 "Video Clock Tree", Section 6.6.2.4 EE Clock
Tree, Page 98.
S905D3 Datasheet, Figure 6-13 "Video Clock Tree", Section 6.7.2.4 EE Clock
Tree, Page 99.
Defined at line 144 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
enum EncoderClockSource
| Name | Value |
|---|---|
| kVideoClock1 | 0 |
| kVideoClock1Div2 | 1 |
| kVideoClock1Div4 | 2 |
| kVideoClock1Div6 | 3 |
| kVideoClock1Div12 | 4 |
| kVideoClock2 | 8 |
| kVideoClock2Div2 | 9 |
| kVideoClock2Div4 | 10 |
| kVideoClock2Div6 | 11 |
| kVideoClock2Div12 | 12 |
Selection of video clock and dividers for encoder clock muxes.
The mux value
<
-> clock source mapping is shown in the following diagram
of the Amlogic datasheets:
A311D Datasheet, Figure 8-13 "Video Clock Tree", Section 8.7.1.4 EE Clock
Tree, Page 114.
S905D2 Datasheet, Figure 6-12 "Video Clock Tree", Section 6.6.2.4 EE Clock
Tree, Page 98.
S905D3 Datasheet, Figure 6-13 "Video Clock Tree", Section 6.7.2.4 EE Clock
Tree, Page 99.
Defined at line 165 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
enum MemoryPowerDomainMode
| Name | Value |
|---|---|
| kPoweredOff | 0b11 |
| kPoweredOn | 0b00 |
A311D datasheet Section 8.7.5 "Clock" > "Register Description", register
HHI_VPU_MEM_PD_REG0, field "Deinterlacer - di_post", page 144
S905D2 datasheet Section 6.6.6 "Clock" > "Register Description", register
HHI_VPU_MEM_PD_REG0, field "Deinterlacer - di_post" page 130
S905Y4 datasheet Section 7.2.1 "Overview", list item "MEMPD", page 52
Defined at line 189 of file ../../src/graphics/display/drivers/amlogic-display/power-regs.h
enum WritebackMuxSource
| Name | Value |
|---|---|
| kDisabled | 0b00000 |
| kEncoderInterlaced | 0b00001 |
| kEncoderProgressive | 0b00010 |
| kEncoderTvPanel | 0b00100 |
| kViuWriteback0 | 0b01000 |
| kViuWriteback1 | 0b10000 |
Selects the clock or data source for a writeback mux.
Fields of this type must transition through `kDisabled` when being updated.
Defined at line 355 of file ../../src/graphics/display/drivers/amlogic-display/video-input-regs.h
enum FifoWordsPerBurst
| Name | Value |
|---|---|
| Burst1 | 0x0 |
| Burst2 | 0x1 |
| Burst4 | 0x2 |
| BurstInvalid | 0x3 |
Defined at line 418 of file ../../src/graphics/display/drivers/amlogic-display/vpu-regs.h
enum HdmiClockTreePatternGeneratorModeSource
| Name | Value |
|---|---|
| kRepeated12BitPattern | 0 |
| kRepeated14BitPattern | 1 |
| kRepeated15BitPattern | 2 |
| kFixed25BitPattern | 3 |
Values for the `pattern_generator_mode_selection` field in `HdmiClockTreeControl`.
Defined at line 1018 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
Records
-
class AddedDisplayInfo -
class AfbcBoundingBoxXEndS0Reg -
class AfbcBoundingBoxXStartS0Reg -
class AfbcBoundingBoxYEndS0Reg -
class AfbcBoundingBoxYStartS0Reg -
class AfbcBufferHeightS0Reg -
class AfbcBufferWidthS0Reg -
class AfbcCommandReg -
class AfbcFormatSpecifierS0Reg -
class AfbcHeaderBufAddrHighS0Reg -
class AfbcHeaderBufAddrLowS0Reg -
class AfbcIrqMaskReg -
class AfbcOutputBufAddrHighS0Reg -
class AfbcOutputBufAddrLowS0Reg -
class AfbcOutputBufStrideS0Reg -
class AfbcPrefetchCfgS0Reg -
class AfbcSurfaceCfgReg -
class AlwaysOnGeneralPowerIsolationS905D3 -
class AlwaysOnGeneralPowerSleep -
class AlwaysOnGeneralPowerStatus -
class BoardInfo -
class Capture -
class Clock -
class DisplayEngine -
class DoubleToU28p4Test_Correctness_Test -
class DsiHost -
class EncoderBuiltInSelfTestEnabled -
class EncoderBuiltInSelfTestFixedColorChrominanceBlue -
class EncoderBuiltInSelfTestFixedColorChrominanceRed -
class EncoderBuiltInSelfTestFixedColorLuminance -
class EncoderBuiltInSelfTestModeSelection -
class HdmiClockControl -
class HdmiClockTreeControl -
class HdmiEncoderAdvancedModeConfig -
class HdmiEncoderDataEnableHorizontalActiveEnd -
class HdmiEncoderDataEnableHorizontalActiveStart -
class HdmiEncoderDataEnableVerticalActiveEnd -
class HdmiEncoderDataEnableVerticalActiveEndOddFields -
class HdmiEncoderDataEnableVerticalActiveStart -
class HdmiEncoderDataEnableVerticalActiveStartOddFields -
class HdmiEncoderEnabled -
class HdmiEncoderHorizontalSyncEnd -
class HdmiEncoderHorizontalSyncStart -
class HdmiEncoderHorizontalTotal -
class HdmiEncoderModeConfig -
class HdmiEncoderTransmitterBridge10BitTo8BitDitheringControl -
class HdmiEncoderTransmitterBridge12BitTo10BitDitheringControl -
class HdmiEncoderTransmitterBridgeSetting -
class HdmiEncoderVerticalSyncEnd -
class HdmiEncoderVerticalSyncEndOddFields -
class HdmiEncoderVerticalSyncHorizontalEnd -
class HdmiEncoderVerticalSyncHorizontalEndOddFields -
class HdmiEncoderVerticalSyncHorizontalStart -
class HdmiEncoderVerticalSyncHorizontalStartOddFields -
class HdmiEncoderVerticalSyncStart -
class HdmiEncoderVerticalSyncStartOddFields -
class HdmiEncoderVerticalTotal -
class HdmiEncoderVideoHorizontalActiveEnd -
class HdmiEncoderVideoHorizontalActiveStart -
class HdmiEncoderVideoHorizontalSyncEnd -
class HdmiEncoderVideoHorizontalSyncStart -
class HdmiEncoderVideoVerticalActiveEnd -
class HdmiEncoderVideoVerticalActiveStart -
class HdmiEncoderVideoVerticalSyncEnd -
class HdmiEncoderVideoVerticalSyncHorizontalEnd -
class HdmiEncoderVideoVerticalSyncHorizontalStart -
class HdmiEncoderVideoVerticalSyncStart -
class HdmiHost -
class HdmiPllConfigForMipiDsi -
class HdmiPllControl0 -
class HdmiPllControl1 -
class HdmiPllControl2 -
class HdmiPllControl3 -
class HdmiPllControl4 -
class HdmiPllControl5 -
class HdmiPllControl6 -
class HdmiPllStatus -
class HdmiTransmitter -
class HdmiTransmitterTest -
class HdmiTransmitterTest_ModeSetTest_Test -
class HdmiTransmitterTest_ResetTest_Test -
class HhiGclkMpeg2Reg -
class HhiHdmiPhyCntl0Reg -
class HhiHdmiPhyCntl1Reg -
class HhiHdmiPhyCntl2Reg -
class HhiHdmiPhyCntl3Reg -
class HhiHdmiPhyCntl4Reg -
class HhiHdmiPhyCntl5Reg -
class HhiHdmiPhyStatusReg -
class HotPlugDetection -
class ImageInfo -
class IntToU28p4Test_Correctness_Test -
class InterlacedHdmiEncoderEnabled -
class Lcd -
class LcdTiming -
class MatrixEnCtrlReg -
class MemoryPower0 -
class MipiDsiPhyClockControl -
class MipiPhy -
class MockHdmiTransmitterController -
class Osd2CtrlStatReg -
class OsdBlk0CfgW0Reg -
class OsdBlk0CfgW1Reg -
class OsdBlk0CfgW2Reg -
class OsdBlk0CfgW3Reg -
class OsdBlk0CfgW4Reg -
class OsdBlk1CfgW4Reg -
class OsdBlk2CfgW4Reg -
class OsdColorAddrReg -
class OsdColorReg -
class OsdCtrlStat2Reg -
class OsdCtrlStatReg -
class OsdDimmCtrlReg -
class OsdFifoCtrlStatReg -
class OsdHscCtrl0Reg -
class OsdHscInitPhaseReg -
class OsdHscPhaseStepReg -
class OsdMaliUnpackCtrlReg -
class OsdPathMiscCtrlReg -
class OsdProtCtrlReg -
class OsdScCtrl0Reg -
class OsdScDummyDataReg -
class OsdScaleCoefIdxReg -
class OsdScaleCoefReg -
class OsdSciWhM1Reg -
class OsdScoHStartEndReg -
class OsdScoVStartEndReg -
class OsdTcolorAgReg -
class OsdVscCtrl0Reg -
class OsdVscInitPhaseReg -
class OsdVscPhaseStepReg -
class PanelConfig -
class PixelGridSize2D -
class PowerOp -
class RdmaChannelContainer -
class RdmaEngine -
class RdmaTable -
class RegisterBase -
class ToDisplayModeTest_AstroDisplayTiming_Test -
class ToDisplayModeTest_NelsonDisplayTiming_Test -
class ToDisplayModeTest_SherlockDisplayTiming_Test -
class U28p4ToDouble_ConversionIsPrecise_Test -
class VdInMatrixCtrlReg -
class VdinCoef00_01Reg -
class VdinCoef02_10Reg -
class VdinCoef11_12Reg -
class VdinCoef20_21Reg -
class VdinCoef22Reg -
class VdinOffset0_1Reg -
class VdinOffset2Reg -
class VdinPreOffset0_1Reg -
class VdinPreOffset2Reg -
class VideoAdvancedPeripheralBusClockControl -
class VideoClock1Control -
class VideoClock1Divider -
class VideoClock2Control -
class VideoClock2Divider -
class VideoClockOutputControl -
class VideoInputChannelFifoControl2 -
class VideoInputChannelFifoControl3 -
class VideoInputCommandControl -
class VideoInputCommandStatus0 -
class VideoInputInterfaceWidth -
class VideoInputLinearFifoControl -
class VideoInputMeasureClockControl -
class VideoInputMiscellaneousControl -
class VideoInputUnit -
class VideoInputUnitEncoderMuxControl -
class VideoInputWriteControl -
class VideoInputWriteRangeHorizontal -
class VideoInputWriteRangeVertical -
class Vout -
class VoutDsi -
class VoutHdmi -
class VppClipMisc1Reg -
class Vpu -
class VpuClockBControl -
class VpuClockCControl -
class VpuClockControl -
class VpuHdmiDithCntlReg -
class VpuHdmiFmtCtrlReg -
class VpuHdmiSettingReg -
class VpuMemoryPower0 -
class VpuMemoryPower1 -
class VpuMemoryPower2 -
class VpuMemoryPower3 -
class VpuMemoryPower4 -
class VsyncReceiver -
class WrBackCtrlReg -
class WrBackMiscCtrlReg -
class WritebackMuxControl -
class YCbCrColor -
class pll_param
Functions
-
display::Mode ToDisplayMode (const display::DisplayTiming & timing)Defined at line 15 of file ../../src/graphics/display/drivers/amlogic-display/display-timing-mode-conversion.h
-
void LogDisplayTiming (const display::DisplayTiming & display_timing)Log contents of `display::DisplayTiming` to INFO level system log.
Defined at line 16 of file ../../src/graphics/display/drivers/amlogic-display/logging.cc
-
zx::result<BoardInfo> GetBoardInfo (fidl::UnownedClientEnd<fuchsia_hardware_platform_device::Device> platform_device)Typesafe wrapper for [`fuchsia.hardware.platform.device/Device.GetBoardInfo`].
`platform_device` must be valid.
If the result is successful, the fields in BoardInfo are guaranteed to be
valid.
Defined at line 18 of file ../../src/graphics/display/drivers/amlogic-display/board-resources.cc
-
uint32_t ToU28_4 (double value)Lossless conversion from a floating-point number `value` to a U28.4 fixed
point number.
The Um.n notation is defined in:
https://source.android.com/docs/core/audio/data_formats#q.
The function will error on values that doesn't fit in a U28.4 fixed-point
number.
TODO(https://fxbug.dev/42064981): In C++20 this can be consteval.
Defined at line 25 of file ../../src/graphics/display/drivers/amlogic-display/fixed-point-util.h
-
template <typename T>uint8_t NsToLaneByte (T x, int64_t lanebytetime)Defined at line 26 of file ../../src/graphics/display/drivers/amlogic-display/mipi-phy.cc
-
bool operator== (const PixelGridSize2D & a, const PixelGridSize2D & b)Defined at line 35 of file ../../src/graphics/display/drivers/amlogic-display/pixel-grid-size2d.h
-
bool operator!= (const PixelGridSize2D & a, const PixelGridSize2D & b)Defined at line 39 of file ../../src/graphics/display/drivers/amlogic-display/pixel-grid-size2d.h
-
uint32_t ToU28_4 (int value)Lossless conversion from an integer `value` to a U28.4 fixed point number.
The Um.n notation is defined in:
https://source.android.com/docs/core/audio/data_formats#q.
The function will error on values that doesn't fit in a U28.4 fixed-point
number.
TODO(https://fxbug.dev/42064981): In C++20 this can be consteval.
Defined at line 41 of file ../../src/graphics/display/drivers/amlogic-display/fixed-point-util.h
-
void LogPanelConfig (const PanelConfig & panel_config)Log contents of `PanelConfig` to INFO level system log.
Defined at line 47 of file ../../src/graphics/display/drivers/amlogic-display/logging.cc
-
zx::result<fdf::MmioBuffer> MapMmio (std::string_view mmio_name, fidl::UnownedClientEnd<fuchsia_hardware_platform_device::Device> platform_device)Typesafe wrapper for [`fuchsia.hardware.platform.device/Device.GetMmioByName`].
`platform_device` must be valid.
If the result is successful, the MmioBuffer is guaranteed to be valid.
Defined at line 47 of file ../../src/graphics/display/drivers/amlogic-display/board-resources.cc
-
double U28_4ToDouble (uint32_t u28_4)Converts a U28.4 fixed point number `u28_4` used in HdmiClockTreeControl::
SetFrequencyDivider.
The Um.n notation is defined in:
https://source.android.com/docs/core/audio/data_formats#q.
TODO(https://fxbug.dev/42064981): In C++20 this can be consteval.
Defined at line 55 of file ../../src/graphics/display/drivers/amlogic-display/fixed-point-util.h
-
size_t RdmaRegionSize ()RDMA Region size (AFBC and non-AFBC)
Defined at line 80 of file ../../src/graphics/display/drivers/amlogic-display/rdma.h
-
zx::result<zx::interrupt> GetInterrupt (std::string_view interrupt_name, fidl::UnownedClientEnd<fuchsia_hardware_platform_device::Device> platform_device)Typesafe wrappers for [`fuchsia.hardware.platform.device/Device.GetInterruptByName`].
`platform_device` must be valid. Note that interrupts retrieved via this function will
be created using the ZX_INTERRUPT_MODE_EDGE_HIGH and ZX_INTERRUPT_TIMESTAMP_MONO flags.
If the result is successful, the zx::interrupt is guaranteed to be valid.
Defined at line 80 of file ../../src/graphics/display/drivers/amlogic-display/board-resources.cc
-
zx::result<zx::bti> GetBti (BtiResourceIndex bti_index, fidl::UnownedClientEnd<fuchsia_hardware_platform_device::Device> platform_device)Typesafe wrapper for [`fuchsia.hardware.platform.device/Device.GetBtiById`].
`platform_device` must be valid.
If the result is successful, the zx::bti is guaranteed to be valid.
Defined at line 104 of file ../../src/graphics/display/drivers/amlogic-display/board-resources.cc
-
zx::result<zx::resource> GetSecureMonitorCall (SecureMonitorCallResourceIndex secure_monitor_call_index, fidl::UnownedClientEnd<fuchsia_hardware_platform_device::Device> platform_device)Typesafe wrapper for [`fuchsia.hardware.platform.device/Device.GetSmcById`].
`platform_device` must be valid.
If the result is successful, the zx::resource is guaranteed to be valid and
represent a Secure Monitor Call.
Defined at line 125 of file ../../src/graphics/display/drivers/amlogic-display/board-resources.cc
-
const PanelConfig * GetPanelConfig (display::PanelType panel_type)If the `panel_type` is supported, returns the panel configuration.
Otherwise returns nullptr.
Defined at line 443 of file ../../src/graphics/display/drivers/amlogic-display/panel-config.cc
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zx_koid_t GetKoid (zx_handle_t handle)Defined at line 1125 of file ../../src/graphics/display/drivers/amlogic-display/display-engine.cc
Variables
const int64_t kExternalOscillatorFrequencyHz
Defined at line 77 of file ../../src/graphics/display/drivers/amlogic-display/dsi.h
const int64_t kMinVoltageControlledOscillatorFrequencyHz
Defined at line 78 of file ../../src/graphics/display/drivers/amlogic-display/dsi.h
const int64_t kMaxVoltageControlledOscillatorFrequencyHz
Defined at line 80 of file ../../src/graphics/display/drivers/amlogic-display/dsi.h
const int64_t kMaxPixelClockFrequencyHz
Defined at line 82 of file ../../src/graphics/display/drivers/amlogic-display/dsi.h