class VideoAdvancedPeripheralBusClockControl
Defined at line 719 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
HHI_VAPBCLK_CNTL - Configures the "cts_vapbclk" and "cts_ge2d_clk" clock
signal.
The circuit has two branches, and a final mux that chooses between one of
them. Each branch has an input mux connected to several clock sources,
followed by a frequency divider.
The mapping between register fields and branches are available in both the
register description table, and the EE Clock Tree table.
A311D Datasheet, Section 8.7.1.4 "EE Clock Tree", row "cts_vapbclk" and
"cts_ge2d_clk", Page 113; Section 8.7.6 Register Descriptions, Page 164.
S905D2 Datasheet, Section 6.7.1.4 "EE Clock Tree", row "cts_vapbclk" and
"cts_ge2d_clk", Page 97; Section 6.6.6 Register Descriptions, Page 141.
S905D3 Datasheet, Section 6.7.2.4 "EE Clock Tree", row "cts_vapbclk" and
"cts_ge2d_clk", Page 98; Section 6.7.6 Register Descriptions, Page 136.
Public Members
field_final_mux_selection_745 field_ge2d_clock_enabled_756 field_RsvdZ_758 field_branch1_mux_source_759 field_branch1_mux_enabled_760 field_RsvdZ_761 field_branch1_mux_divider_minus_one_765 field_RsvdZ_768 field_branch0_mux_source_769 field_branch0_mux_enabled_770 field_RsvdZ_771 field_branch0_mux_divider_minus_one_775static const int kMinBranchMuxDividerstatic const int kMaxBranchMuxDividerPublic Methods
hwreg::RegisterAddr<VideoAdvancedPeripheralBusClockControl> Get ()Defined at line 741 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >FinalMuxSource final_mux_selection ()Defined at line 745 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_final_mux_selection (FinalMuxSource val)Defined at line 745 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >typename SelfType::ValueType ge2d_clock_enabled ()If false, the "cts_ge2d_clk" signal is gated. "cts_ge2d_clk" takes
"cts_vapbclk" output as its clock source and has no frequency dividers.
This bit is named "enable" in A311D, S905D2 and S905D3 datasheet register
descriptions, but the "EE clock table" shows that it gates the
"cts_ge2d_clk" signal. Besides, A311D2 datasheet also documents it as
""cts_ge2d_clk" enable" in the register descriptions.
A311D2 Datasheet, Section 7.6.5 Register Descriptions, Page 200.
Defined at line 756 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_ge2d_clock_enabled (typename SelfType::ValueType val)If false, the "cts_ge2d_clk" signal is gated. "cts_ge2d_clk" takes
"cts_vapbclk" output as its clock source and has no frequency dividers.
This bit is named "enable" in A311D, S905D2 and S905D3 datasheet register
descriptions, but the "EE clock table" shows that it gates the
"cts_ge2d_clk" signal. Besides, A311D2 datasheet also documents it as
""cts_ge2d_clk" enable" in the register descriptions.
A311D2 Datasheet, Section 7.6.5 Register Descriptions, Page 200.
Defined at line 756 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >ClockSource branch1_mux_source ()Defined at line 759 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_branch1_mux_source (ClockSource val)Defined at line 759 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >typename SelfType::ValueType branch1_mux_enabled ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 760 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_branch1_mux_enabled (typename SelfType::ValueType val)Defined at line 760 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >typename SelfType::ValueType branch1_mux_divider_minus_one ()Prefer `Branch1MuxDivider()` and `SetBranch1MuxDivider()` to accessing the field
directly.
Defined at line 765 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_branch1_mux_divider_minus_one (typename SelfType::ValueType val)Prefer `Branch1MuxDivider()` and `SetBranch1MuxDivider()` to accessing the field
directly.
Defined at line 765 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >ClockSource branch0_mux_source ()Defined at line 769 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_branch0_mux_source (ClockSource val)Defined at line 769 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >typename SelfType::ValueType branch0_mux_enabled ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 770 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_branch0_mux_enabled (typename SelfType::ValueType val)Defined at line 770 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >typename SelfType::ValueType branch0_mux_divider_minus_one ()Prefer `Branch0MuxDivider()` and `SetBranch0MuxDivider()` to accessing the field
directly.
Defined at line 775 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
template <, >SelfType & set_branch0_mux_divider_minus_one (typename SelfType::ValueType val)Prefer `Branch0MuxDivider()` and `SetBranch0MuxDivider()` to accessing the field
directly.
Defined at line 775 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
VideoAdvancedPeripheralBusClockControl & SetBranch1MuxDivider (int divider)Defined at line 778 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
int Branch1MuxDivider ()Defined at line 784 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
VideoAdvancedPeripheralBusClockControl & SetBranch0MuxDivider (int divider)Defined at line 786 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
int Branch0MuxDivider ()Defined at line 792 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
Enumerations
enum FinalMuxSource| Name | Value |
|---|---|
| kBranch0 | 0 |
| kBranch1 | 1 |
Defined at line 722 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h
enum ClockSource| Name | Value |
|---|---|
| kFixed500Mhz | 0 |
| kFixed666Mhz | 1 |
| kFixed400Mhz | 2 |
| kFixed285_7Mhz | 3 |
| kMpll1 | 4 |
| kVideoPll | 5 |
| kMpll2 | 6 |
| kFixed800Mhz | 7 |
Defined at line 727 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h