class HdmiEncoderVideoVerticalSyncStart

Defined at line 754 of file ../../src/graphics/display/drivers/amlogic-display/encoder-regs.h

ENCP_VIDEO_VSO_BLINE (Digital Vsync out start point)

S912 Datasheet, Section 27.5 "CVBS and LCD", page 383.

Public Members

 field_RsvdZ_764

 field_lines_774

hwreg::RegisterAddr<HdmiEncoderVideoVerticalSyncStart> Get ()

Defined at line 757 of file ../../src/graphics/display/drivers/amlogic-display/encoder-regs.h

template <, >

typename SelfType::ValueType lines ()

Start line (inclusive) of the Vertical sync part of the video signal

for each field, in lines.

S912 datasheet only specifies bits 10-0 are used for this field. However,

experiments confirm that bit 11 is functional on S912 and SoCs with similar

encoder designs (S905D2, S905D3, A311D) due to their support for the

3840x2160 resolution. Therefore, this code utilizes bits 11-0 for the

field.

Defined at line 774 of file ../../src/graphics/display/drivers/amlogic-display/encoder-regs.h

template <, >

SelfType & set_lines (typename SelfType::ValueType val)