struct HdmiPllConfigForMipiDsi

Defined at line 194 of file ../../src/graphics/display/drivers/amlogic-display/dsi.h

This structure holds the calculated pll values based on desired pixel clock

TODO(https://fxbug.dev/328135383): Unify the PLL configuration logic for

HDMI and MIPI-DSI output.

Public Members

int64_t pll_frequency_hz

int64_t dphy_data_lane_bits_per_second

uint32_t pll_multiplier_integer

uint32_t pll_multiplier_fraction

uint32_t pll_divider

int64_t pll_voltage_controlled_oscillator_output_frequency_hz

int32_t output_divider1

int32_t output_divider2

int32_t output_divider3

uint32_t clock_factor