class MipiDsiPhyClockControl

Defined at line 974 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

HHI_MIPIDSI_PHY_CLK_CNTL - Configures the "mipi_dsi_phy_clk" (also known as

"cts_dsi_phy_clk") clock signal.

This register is not documented in S905D3 datasheets but mentioned in S905D3

EE clock tree table.

A311D Datasheet, Section 8.7.1.4 Clock Tree, Page 113; Section 8.7.6

Register Descriptions, Page 164.

S905D2 Datasheet, Section 6.7.1.4 Clock Tree, Page 97; Section 6.6.6

Register Descriptions, Page 151.

S905D3 Datasheet, Section 6.7.2.4 Clock Tree, Page 98.

Public Members

 field_clock_source_993
 field_enabled_995
 field_divider_minus_one_998
static const int kMinDivider
static const int kMaxDivider

Public Methods

hwreg::RegisterAddr<MipiDsiPhyClockControl> Get ()

Defined at line 991 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

template <, >
ClockSource clock_source ()

Defined at line 993 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

template <, >
SelfType & set_clock_source (ClockSource val)

Defined at line 993 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

template <, >
typename SelfType::ValueType enabled ()

NOLINTEND(misc-non-private-member-variables-in-classes)

Defined at line 995 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

template <, >
SelfType & set_enabled (typename SelfType::ValueType val)

Defined at line 995 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

template <, >
typename SelfType::ValueType divider_minus_one ()

Prefer `Divider()` and `SetDivider()` to accessing the field directly.

Defined at line 998 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

template <, >
SelfType & set_divider_minus_one (typename SelfType::ValueType val)

Prefer `Divider()` and `SetDivider()` to accessing the field directly.

Defined at line 998 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

MipiDsiPhyClockControl & SetDivider (int divider)

Defined at line 1000 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

int Divider ()

Defined at line 1006 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

Enumerations

enum ClockSource
Name Value
kVideoPll 0
kGeneralPurpose0Pll 1
kHifiPll 2
kMpll1 3
kFixed1000Mhz 4
kFixed800Mhz 5
kFixed666Mhz 6
kFixed285_7Mhz 7

Defined at line 976 of file ../../src/graphics/display/drivers/amlogic-display/clock-regs.h

Records