class HdmiEncoderVideoVerticalSyncEnd

Defined at line 780 of file ../../src/graphics/display/drivers/amlogic-display/encoder-regs.h

ENCP_VIDEO_VSO_ELINE (Digital Vsync out end line)

S912 Datasheet, Section 27.5 "CVBS and LCD", page 383.

Public Members

 field_RsvdZ_790

 field_lines_plus_one_807

hwreg::RegisterAddr<HdmiEncoderVideoVerticalSyncEnd> Get ()

Defined at line 783 of file ../../src/graphics/display/drivers/amlogic-display/encoder-regs.h

template <, >

typename SelfType::ValueType lines_plus_one ()

One (1) plus the end line (inclusive) of the Vertical sync part of the

video signal for each line, in pixels.

The register is originally named "hsync out end point", and the end point

is exclusive from the range. For consistency with other register pairs, we

rename the field to its current name.

S912 datasheet only specifies bits 10-0 are used for this field. However,

experiments confirm that bit 11 is functional on S912 and SoCs with similar

encoder designs (S905D2, S905D3, A311D) due to their support for the

3840x2160 resolution. Therefore, this code utilizes bits 11-0 for the

field.

It's preferred to use `lines()` and `set_lines()`

helper methods to get / set its value.

Defined at line 807 of file ../../src/graphics/display/drivers/amlogic-display/encoder-regs.h

template <, >

SelfType & set_lines_plus_one (typename SelfType::ValueType val)