pub struct AmdHardwareConfigurationMsr(/* private fields */);Expand description
Layout for MSRC001_0015.
Implementations§
Source§impl AmdHardwareConfigurationMsr
impl AmdHardwareConfigurationMsr
Sourcepub const RSVD1_MASK: u64
pub const RSVD1_MASK: u64
Mask of all reserved-as-1 bits.
Sourcepub const RSVD0_MASK: u64
pub const RSVD0_MASK: u64
Mask of all reserved-as-0 bits.
Sourcepub const DEFAULT: u64
pub const DEFAULT: u64
The default value of the layout, combining all field defaults and reserved-as values.
Sourcepub const IR_PERF_EN_MASK: u64
pub const IR_PERF_EN_MASK: u64
Unshifted bitmask of ir_perf_en.
Sourcepub const IR_PERF_EN_SHIFT: usize = 30
pub const IR_PERF_EN_SHIFT: usize = 30
Bit shift (i.e., the low bit) of ir_perf_en.
Sourcepub const EFF_FREQ_READ_ONLY_LOCK_MASK: u64
pub const EFF_FREQ_READ_ONLY_LOCK_MASK: u64
Unshifted bitmask of eff_freq_read_only_lock.
Sourcepub const EFF_FREQ_READ_ONLY_LOCK_SHIFT: usize = 27
pub const EFF_FREQ_READ_ONLY_LOCK_SHIFT: usize = 27
Bit shift (i.e., the low bit) of eff_freq_read_only_lock.
Sourcepub const EFF_FRQ_CNT_MWAIT_MASK: u64
pub const EFF_FRQ_CNT_MWAIT_MASK: u64
Unshifted bitmask of eff_frq_cnt_mwait.
Sourcepub const EFF_FRQ_CNT_MWAIT_SHIFT: usize = 26
pub const EFF_FRQ_CNT_MWAIT_SHIFT: usize = 26
Bit shift (i.e., the low bit) of eff_frq_cnt_mwait.
Sourcepub const CPB_DIS_MASK: u64
pub const CPB_DIS_MASK: u64
Unshifted bitmask of cpb_dis.
Sourcepub const CPB_DIS_SHIFT: usize = 25
pub const CPB_DIS_SHIFT: usize = 25
Bit shift (i.e., the low bit) of cpb_dis.
Sourcepub const TSC_FREQ_SEL_MASK: u64
pub const TSC_FREQ_SEL_MASK: u64
Unshifted bitmask of tsc_freq_sel.
Sourcepub const TSC_FREQ_SEL_SHIFT: usize = 24
pub const TSC_FREQ_SEL_SHIFT: usize = 24
Bit shift (i.e., the low bit) of tsc_freq_sel.
Sourcepub const LOCK_TSC_TO_CURRENT_P0_MASK: u64
pub const LOCK_TSC_TO_CURRENT_P0_MASK: u64
Unshifted bitmask of lock_tsc_to_current_p0.
Sourcepub const LOCK_TSC_TO_CURRENT_P0_SHIFT: usize = 21
pub const LOCK_TSC_TO_CURRENT_P0_SHIFT: usize = 21
Bit shift (i.e., the low bit) of lock_tsc_to_current_p0.
Sourcepub const IO_CFG_GP_FAULT_MASK: u64
pub const IO_CFG_GP_FAULT_MASK: u64
Unshifted bitmask of io_cfg_gp_fault.
Sourcepub const IO_CFG_GP_FAULT_SHIFT: usize = 20
pub const IO_CFG_GP_FAULT_SHIFT: usize = 20
Bit shift (i.e., the low bit) of io_cfg_gp_fault.
Sourcepub const MC_STATUS_WR_EN_MASK: u64
pub const MC_STATUS_WR_EN_MASK: u64
Unshifted bitmask of mc_status_wr_en.
Sourcepub const MC_STATUS_WR_EN_SHIFT: usize = 18
pub const MC_STATUS_WR_EN_SHIFT: usize = 18
Bit shift (i.e., the low bit) of mc_status_wr_en.
Sourcepub const WRAP32_DIS_MASK: u64
pub const WRAP32_DIS_MASK: u64
Unshifted bitmask of wrap32_dis.
Sourcepub const WRAP32_DIS_SHIFT: usize = 17
pub const WRAP32_DIS_SHIFT: usize = 17
Bit shift (i.e., the low bit) of wrap32_dis.
Sourcepub const RSM_SP_CYC_DIS_MASK: u64
pub const RSM_SP_CYC_DIS_MASK: u64
Unshifted bitmask of rsm_sp_cyc_dis.
Sourcepub const RSM_SP_CYC_DIS_SHIFT: usize = 14
pub const RSM_SP_CYC_DIS_SHIFT: usize = 14
Bit shift (i.e., the low bit) of rsm_sp_cyc_dis.
Sourcepub const SMI_SP_CYC_DIS_MASK: u64
pub const SMI_SP_CYC_DIS_MASK: u64
Unshifted bitmask of smi_sp_cyc_dis.
Sourcepub const SMI_SP_CYC_DIS_SHIFT: usize = 13
pub const SMI_SP_CYC_DIS_SHIFT: usize = 13
Bit shift (i.e., the low bit) of smi_sp_cyc_dis.
Sourcepub const MON_MWAIT_USER_EN_MASK: u64
pub const MON_MWAIT_USER_EN_MASK: u64
Unshifted bitmask of mon_mwait_user_en.
Sourcepub const MON_MWAIT_USER_EN_SHIFT: usize = 10
pub const MON_MWAIT_USER_EN_SHIFT: usize = 10
Bit shift (i.e., the low bit) of mon_mwait_user_en.
Sourcepub const MON_MWAIT_DIS_MASK: u64
pub const MON_MWAIT_DIS_MASK: u64
Unshifted bitmask of mon_mwait_dis.
Sourcepub const MON_MWAIT_DIS_SHIFT: usize = 9
pub const MON_MWAIT_DIS_SHIFT: usize = 9
Bit shift (i.e., the low bit) of mon_mwait_dis.
Sourcepub const IGNNE_EM_MASK: u64
pub const IGNNE_EM_MASK: u64
Unshifted bitmask of ignne_em.
Sourcepub const IGNNE_EM_SHIFT: usize = 8
pub const IGNNE_EM_SHIFT: usize = 8
Bit shift (i.e., the low bit) of ignne_em.
Sourcepub const ALLOW_FERR_ON_NE_MASK: u64
pub const ALLOW_FERR_ON_NE_MASK: u64
Unshifted bitmask of allow_ferr_on_ne.
Sourcepub const ALLOW_FERR_ON_NE_SHIFT: usize = 7
pub const ALLOW_FERR_ON_NE_SHIFT: usize = 7
Bit shift (i.e., the low bit) of allow_ferr_on_ne.
Sourcepub const INVDWBINVD_MASK: u64
pub const INVDWBINVD_MASK: u64
Unshifted bitmask of invdwbinvd.
Sourcepub const INVDWBINVD_SHIFT: usize = 4
pub const INVDWBINVD_SHIFT: usize = 4
Bit shift (i.e., the low bit) of invdwbinvd.
Sourcepub const TLB_CACHE_DIS_MASK: u64
pub const TLB_CACHE_DIS_MASK: u64
Unshifted bitmask of tlb_cache_dis.
Sourcepub const TLB_CACHE_DIS_SHIFT: usize = 3
pub const TLB_CACHE_DIS_SHIFT: usize = 3
Bit shift (i.e., the low bit) of tlb_cache_dis.
Sourcepub const SMM_LOCK_MASK: u64
pub const SMM_LOCK_MASK: u64
Unshifted bitmask of smm_lock.
Sourcepub const SMM_LOCK_SHIFT: usize = 0
pub const SMM_LOCK_SHIFT: usize = 0
Bit shift (i.e., the low bit) of smm_lock.
Sourcepub const FIELDS: [FieldMetadata<u64>; 18]
pub const FIELDS: [FieldMetadata<u64>; 18]
Metadata of all named fields in the layout.
Sourcepub const fn new() -> Self
pub const fn new() -> Self
Creates a new instance with reserved-as-1 bits set and
all other bits zeroed (i.e., with a value of
Self::RSVD1_MASK).
pub const fn bits(self) -> u64
Sourcepub const fn ir_perf_en(&self) -> bool
pub const fn ir_perf_en(&self) -> bool
The value of AmdHardwareConfigurationMsr30.
Sourcepub const fn set_ir_perf_en(&mut self, value: bool) -> &mut Self
pub const fn set_ir_perf_en(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr30.
Sourcepub const fn eff_freq_read_only_lock(&self) -> bool
pub const fn eff_freq_read_only_lock(&self) -> bool
The value of AmdHardwareConfigurationMsr27.
Sourcepub const fn set_eff_freq_read_only_lock(&mut self, value: bool) -> &mut Self
pub const fn set_eff_freq_read_only_lock(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr27.
Sourcepub const fn eff_frq_cnt_mwait(&self) -> bool
pub const fn eff_frq_cnt_mwait(&self) -> bool
The value of AmdHardwareConfigurationMsr26.
Sourcepub const fn set_eff_frq_cnt_mwait(&mut self, value: bool) -> &mut Self
pub const fn set_eff_frq_cnt_mwait(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr26.
Sourcepub const fn set_cpb_dis(&mut self, value: bool) -> &mut Self
pub const fn set_cpb_dis(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr25.
Sourcepub const fn tsc_freq_sel(&self) -> bool
pub const fn tsc_freq_sel(&self) -> bool
The value of AmdHardwareConfigurationMsr24.
Sourcepub const fn set_tsc_freq_sel(&mut self, value: bool) -> &mut Self
pub const fn set_tsc_freq_sel(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr24.
Sourcepub const fn lock_tsc_to_current_p0(&self) -> bool
pub const fn lock_tsc_to_current_p0(&self) -> bool
The value of AmdHardwareConfigurationMsr21.
Sourcepub const fn set_lock_tsc_to_current_p0(&mut self, value: bool) -> &mut Self
pub const fn set_lock_tsc_to_current_p0(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr21.
Sourcepub const fn io_cfg_gp_fault(&self) -> bool
pub const fn io_cfg_gp_fault(&self) -> bool
The value of AmdHardwareConfigurationMsr20.
Sourcepub const fn set_io_cfg_gp_fault(&mut self, value: bool) -> &mut Self
pub const fn set_io_cfg_gp_fault(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr20.
Sourcepub const fn mc_status_wr_en(&self) -> bool
pub const fn mc_status_wr_en(&self) -> bool
The value of AmdHardwareConfigurationMsr18.
Sourcepub const fn set_mc_status_wr_en(&mut self, value: bool) -> &mut Self
pub const fn set_mc_status_wr_en(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr18.
Sourcepub const fn wrap32_dis(&self) -> bool
pub const fn wrap32_dis(&self) -> bool
The value of AmdHardwareConfigurationMsr17.
Sourcepub const fn set_wrap32_dis(&mut self, value: bool) -> &mut Self
pub const fn set_wrap32_dis(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr17.
Sourcepub const fn rsm_sp_cyc_dis(&self) -> bool
pub const fn rsm_sp_cyc_dis(&self) -> bool
The value of AmdHardwareConfigurationMsr14.
Sourcepub const fn set_rsm_sp_cyc_dis(&mut self, value: bool) -> &mut Self
pub const fn set_rsm_sp_cyc_dis(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr14.
Sourcepub const fn smi_sp_cyc_dis(&self) -> bool
pub const fn smi_sp_cyc_dis(&self) -> bool
The value of AmdHardwareConfigurationMsr13.
Sourcepub const fn set_smi_sp_cyc_dis(&mut self, value: bool) -> &mut Self
pub const fn set_smi_sp_cyc_dis(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr13.
Sourcepub const fn mon_mwait_user_en(&self) -> bool
pub const fn mon_mwait_user_en(&self) -> bool
The value of AmdHardwareConfigurationMsr10.
Sourcepub const fn set_mon_mwait_user_en(&mut self, value: bool) -> &mut Self
pub const fn set_mon_mwait_user_en(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr10.
Sourcepub const fn mon_mwait_dis(&self) -> bool
pub const fn mon_mwait_dis(&self) -> bool
The value of AmdHardwareConfigurationMsr9.
Sourcepub const fn set_mon_mwait_dis(&mut self, value: bool) -> &mut Self
pub const fn set_mon_mwait_dis(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr9.
Sourcepub const fn set_ignne_em(&mut self, value: bool) -> &mut Self
pub const fn set_ignne_em(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr8.
Sourcepub const fn allow_ferr_on_ne(&self) -> bool
pub const fn allow_ferr_on_ne(&self) -> bool
The value of AmdHardwareConfigurationMsr7.
Sourcepub const fn set_allow_ferr_on_ne(&mut self, value: bool) -> &mut Self
pub const fn set_allow_ferr_on_ne(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr7.
Sourcepub const fn invdwbinvd(&self) -> bool
pub const fn invdwbinvd(&self) -> bool
The value of AmdHardwareConfigurationMsr4.
Sourcepub const fn set_invdwbinvd(&mut self, value: bool) -> &mut Self
pub const fn set_invdwbinvd(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr4.
Sourcepub const fn tlb_cache_dis(&self) -> bool
pub const fn tlb_cache_dis(&self) -> bool
The value of AmdHardwareConfigurationMsr3.
Sourcepub const fn set_tlb_cache_dis(&mut self, value: bool) -> &mut Self
pub const fn set_tlb_cache_dis(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr3.
Sourcepub const fn set_smm_lock(&mut self, value: bool) -> &mut Self
pub const fn set_smm_lock(&mut self, value: bool) -> &mut Self
Sets the value of AmdHardwareConfigurationMsr0.
Trait Implementations§
Source§impl Binary for AmdHardwareConfigurationMsr
impl Binary for AmdHardwareConfigurationMsr
Source§impl Clone for AmdHardwareConfigurationMsr
impl Clone for AmdHardwareConfigurationMsr
Source§fn clone(&self) -> AmdHardwareConfigurationMsr
fn clone(&self) -> AmdHardwareConfigurationMsr
1.0.0 (const: unstable)§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read moreimpl Copy for AmdHardwareConfigurationMsr
Source§impl Debug for AmdHardwareConfigurationMsr
impl Debug for AmdHardwareConfigurationMsr
Source§impl Default for AmdHardwareConfigurationMsr
impl Default for AmdHardwareConfigurationMsr
Source§fn default() -> Self
fn default() -> Self
Returns an instance with the default bits set (i.e,. with a
value of Self::DEFAULT.
impl Eq for AmdHardwareConfigurationMsr
Source§impl From<AmdHardwareConfigurationMsr> for u64
impl From<AmdHardwareConfigurationMsr> for u64
Source§fn from(value: AmdHardwareConfigurationMsr) -> Self
fn from(value: AmdHardwareConfigurationMsr) -> Self
Source§impl From<u64> for AmdHardwareConfigurationMsr
impl From<u64> for AmdHardwareConfigurationMsr
Source§impl IntoIterator for AmdHardwareConfigurationMsr
impl IntoIterator for AmdHardwareConfigurationMsr
Source§impl<'a> IntoIterator for &'a AmdHardwareConfigurationMsr
impl<'a> IntoIterator for &'a AmdHardwareConfigurationMsr
Source§impl LowerHex for AmdHardwareConfigurationMsr
impl LowerHex for AmdHardwareConfigurationMsr
Source§impl Octal for AmdHardwareConfigurationMsr
impl Octal for AmdHardwareConfigurationMsr
Source§impl PartialEq for AmdHardwareConfigurationMsr
impl PartialEq for AmdHardwareConfigurationMsr
impl StructuralPartialEq for AmdHardwareConfigurationMsr
Auto Trait Implementations§
impl Freeze for AmdHardwareConfigurationMsr
impl RefUnwindSafe for AmdHardwareConfigurationMsr
impl Send for AmdHardwareConfigurationMsr
impl Sync for AmdHardwareConfigurationMsr
impl Unpin for AmdHardwareConfigurationMsr
impl UnsafeUnpin for AmdHardwareConfigurationMsr
impl UnwindSafe for AmdHardwareConfigurationMsr
Blanket Implementations§
§impl<T> Any for Twhere
T: 'static + ?Sized,
impl<T> Any for Twhere
T: 'static + ?Sized,
§impl<T> Borrow<T> for Twhere
T: ?Sized,
impl<T> Borrow<T> for Twhere
T: ?Sized,
§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
§unsafe fn clone_to_uninit(&self, dest: *mut u8)
unsafe fn clone_to_uninit(&self, dest: *mut u8)
clone_to_uninit)