Struct ProcessorFeatureRegister1 

pub struct ProcessorFeatureRegister1(/* private fields */);

The layout of ID_AA64PFR1_EL1.

Implementations

impl ProcessorFeatureRegister1

pub const RSVD1_MASK: u64

Mask of all reserved-as-1 bits.

pub const RSVD0_MASK: u64

Mask of all reserved-as-0 bits.

pub const DEFAULT: u64

The default value of the layout, combining all field defaults and reserved-as values.

pub const PFAR_MASK: u64

Unshifted bitmask of pfar.

pub const PFAR_SHIFT: usize = 60

Bit shift (i.e., the low bit) of pfar.

pub const DF2_MASK: u64

Unshifted bitmask of df2.

pub const DF2_SHIFT: usize = 56

Bit shift (i.e., the low bit) of df2.

pub const MTEX_MASK: u64

Unshifted bitmask of mtex.

pub const MTEX_SHIFT: usize = 52

Bit shift (i.e., the low bit) of mtex.

pub const THE_MASK: u64

Unshifted bitmask of the.

pub const THE_SHIFT: usize = 48

Bit shift (i.e., the low bit) of the.

pub const GCS_MASK: u64

Unshifted bitmask of gcs.

pub const GCS_SHIFT: usize = 44

Bit shift (i.e., the low bit) of gcs.

pub const MTE_FRAC_MASK: u64

Unshifted bitmask of mte_frac.

pub const MTE_FRAC_SHIFT: usize = 40

Bit shift (i.e., the low bit) of mte_frac.

pub const NMI_MASK: u64

Unshifted bitmask of nmi.

pub const NMI_SHIFT: usize = 36

Bit shift (i.e., the low bit) of nmi.

pub const CSV2_FRAC_MASK: u64

Unshifted bitmask of csv2_frac.

pub const CSV2_FRAC_SHIFT: usize = 32

Bit shift (i.e., the low bit) of csv2_frac.

pub const RNDR_TRAP_MASK: u64

Unshifted bitmask of rndr_trap.

pub const RNDR_TRAP_SHIFT: usize = 28

Bit shift (i.e., the low bit) of rndr_trap.

pub const SME_MASK: u64

Unshifted bitmask of sme.

pub const SME_SHIFT: usize = 24

Bit shift (i.e., the low bit) of sme.

pub const MPAM_FRAC_MASK: u64

Unshifted bitmask of mpam_frac.

pub const MPAM_FRAC_SHIFT: usize = 16

Bit shift (i.e., the low bit) of mpam_frac.

pub const RAS_FRAC_MASK: u64

Unshifted bitmask of ras_frac.

pub const RAS_FRAC_SHIFT: usize = 12

Bit shift (i.e., the low bit) of ras_frac.

pub const MTE_MASK: u64

Unshifted bitmask of mte.

pub const MTE_SHIFT: usize = 8

Bit shift (i.e., the low bit) of mte.

pub const SSBS_MASK: u64

Unshifted bitmask of ssbs.

pub const SSBS_SHIFT: usize = 4

Bit shift (i.e., the low bit) of ssbs.

pub const BT_MASK: u64

Unshifted bitmask of bt.

pub const BT_SHIFT: usize = 0

Bit shift (i.e., the low bit) of bt.

pub const FIELDS: [FieldMetadata<u64>; 15]

Metadata of all named fields in the layout.

pub const fn new() -> Self

Creates a new instance with reserved-as-1 bits set and all other bits zeroed (i.e., with a value of Self::RSVD1_MASK).

pub const fn bits(self) -> u64

pub fn pfar(&self) -> IdAa64Pfr1El1Pfar

where IdAa64Pfr1El1Pfar: TryFromBytes,

The value of ProcessorFeatureRegister1[63:60].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_pfar to recover from invalid bit patterns.

pub fn try_pfar(&self) -> Result<IdAa64Pfr1El1Pfar, InvalidBits<u8>>

where IdAa64Pfr1El1Pfar: TryFromBytes,

Fallible variant of Self::pfar.

pub fn set_pfar(&mut self, value: IdAa64Pfr1El1Pfar) -> &mut Self

where IdAa64Pfr1El1Pfar: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[63:60].

pub fn df2(&self) -> IdAa64Pfr1El1Df2

where IdAa64Pfr1El1Df2: TryFromBytes,

The value of ProcessorFeatureRegister1[59:56].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_df2 to recover from invalid bit patterns.

pub fn try_df2(&self) -> Result<IdAa64Pfr1El1Df2, InvalidBits<u8>>

where IdAa64Pfr1El1Df2: TryFromBytes,

Fallible variant of Self::df2.

pub fn set_df2(&mut self, value: IdAa64Pfr1El1Df2) -> &mut Self

where IdAa64Pfr1El1Df2: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[59:56].

pub fn mtex(&self) -> IdAa64Pfr1El1Mtex

where IdAa64Pfr1El1Mtex: TryFromBytes,

The value of ProcessorFeatureRegister1[55:52].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_mtex to recover from invalid bit patterns.

pub fn try_mtex(&self) -> Result<IdAa64Pfr1El1Mtex, InvalidBits<u8>>

where IdAa64Pfr1El1Mtex: TryFromBytes,

Fallible variant of Self::mtex.

pub fn set_mtex(&mut self, value: IdAa64Pfr1El1Mtex) -> &mut Self

where IdAa64Pfr1El1Mtex: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[55:52].

pub fn the(&self) -> IdAa64Pfr1El1The

where IdAa64Pfr1El1The: TryFromBytes,

The value of ProcessorFeatureRegister1[51:48].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_the to recover from invalid bit patterns.

pub fn try_the(&self) -> Result<IdAa64Pfr1El1The, InvalidBits<u8>>

where IdAa64Pfr1El1The: TryFromBytes,

Fallible variant of Self::the.

pub fn set_the(&mut self, value: IdAa64Pfr1El1The) -> &mut Self

where IdAa64Pfr1El1The: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[51:48].

pub fn gcs(&self) -> IdAa64Pfr1El1Gcs

where IdAa64Pfr1El1Gcs: TryFromBytes,

The value of ProcessorFeatureRegister1[47:44].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_gcs to recover from invalid bit patterns.

pub fn try_gcs(&self) -> Result<IdAa64Pfr1El1Gcs, InvalidBits<u8>>

where IdAa64Pfr1El1Gcs: TryFromBytes,

Fallible variant of Self::gcs.

pub fn set_gcs(&mut self, value: IdAa64Pfr1El1Gcs) -> &mut Self

where IdAa64Pfr1El1Gcs: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[47:44].

pub fn mte_frac(&self) -> IdAa64Pfr1El1MteFrac

where IdAa64Pfr1El1MteFrac: TryFromBytes,

The value of ProcessorFeatureRegister1[43:40].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_mte_frac to recover from invalid bit patterns.

pub fn try_mte_frac(&self) -> Result<IdAa64Pfr1El1MteFrac, InvalidBits<u8>>

where IdAa64Pfr1El1MteFrac: TryFromBytes,

Fallible variant of Self::mte_frac.

pub fn set_mte_frac(&mut self, value: IdAa64Pfr1El1MteFrac) -> &mut Self

where IdAa64Pfr1El1MteFrac: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[43:40].

pub fn nmi(&self) -> IdAa64Pfr1El1Nmi

where IdAa64Pfr1El1Nmi: TryFromBytes,

The value of ProcessorFeatureRegister1[39:36].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_nmi to recover from invalid bit patterns.

pub fn try_nmi(&self) -> Result<IdAa64Pfr1El1Nmi, InvalidBits<u8>>

where IdAa64Pfr1El1Nmi: TryFromBytes,

Fallible variant of Self::nmi.

pub fn set_nmi(&mut self, value: IdAa64Pfr1El1Nmi) -> &mut Self

where IdAa64Pfr1El1Nmi: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[39:36].

pub fn csv2_frac(&self) -> IdAa64Pfr1El1Csv2Frac

where IdAa64Pfr1El1Csv2Frac: TryFromBytes,

The value of ProcessorFeatureRegister1[35:32].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_csv2_frac to recover from invalid bit patterns.

pub fn try_csv2_frac(&self) -> Result<IdAa64Pfr1El1Csv2Frac, InvalidBits<u8>>

where IdAa64Pfr1El1Csv2Frac: TryFromBytes,

Fallible variant of Self::csv2_frac.

pub fn set_csv2_frac(&mut self, value: IdAa64Pfr1El1Csv2Frac) -> &mut Self

where IdAa64Pfr1El1Csv2Frac: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[35:32].

pub fn rndr_trap(&self) -> IdAa64Pfr1El1RndrTrap

where IdAa64Pfr1El1RndrTrap: TryFromBytes,

The value of ProcessorFeatureRegister1[31:28].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_rndr_trap to recover from invalid bit patterns.

pub fn try_rndr_trap(&self) -> Result<IdAa64Pfr1El1RndrTrap, InvalidBits<u8>>

where IdAa64Pfr1El1RndrTrap: TryFromBytes,

Fallible variant of Self::rndr_trap.

pub fn set_rndr_trap(&mut self, value: IdAa64Pfr1El1RndrTrap) -> &mut Self

where IdAa64Pfr1El1RndrTrap: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[31:28].

pub fn sme(&self) -> IdAa64Pfr1El1Sme

where IdAa64Pfr1El1Sme: TryFromBytes,

The value of ProcessorFeatureRegister1[27:24].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_sme to recover from invalid bit patterns.

pub fn try_sme(&self) -> Result<IdAa64Pfr1El1Sme, InvalidBits<u8>>

where IdAa64Pfr1El1Sme: TryFromBytes,

Fallible variant of Self::sme.

pub fn set_sme(&mut self, value: IdAa64Pfr1El1Sme) -> &mut Self

where IdAa64Pfr1El1Sme: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[27:24].

pub const fn mpam_frac(&self) -> u8

The value of ProcessorFeatureRegister1[19:16].

pub const fn set_mpam_frac(&mut self, value: u8) -> &mut Self

Sets the value of ProcessorFeatureRegister1[19:16].

pub const fn ras_frac(&self) -> u8

The value of ProcessorFeatureRegister1[15:12].

pub const fn set_ras_frac(&mut self, value: u8) -> &mut Self

Sets the value of ProcessorFeatureRegister1[15:12].

pub fn mte(&self) -> IdAa64Pfr1El1Mte

where IdAa64Pfr1El1Mte: TryFromBytes,

The value of ProcessorFeatureRegister1[11:8].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_mte to recover from invalid bit patterns.

pub fn try_mte(&self) -> Result<IdAa64Pfr1El1Mte, InvalidBits<u8>>

where IdAa64Pfr1El1Mte: TryFromBytes,

Fallible variant of Self::mte.

pub fn set_mte(&mut self, value: IdAa64Pfr1El1Mte) -> &mut Self

where IdAa64Pfr1El1Mte: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[11:8].

pub fn ssbs(&self) -> IdAa64Pfr1El1Ssbs

where IdAa64Pfr1El1Ssbs: TryFromBytes,

The value of ProcessorFeatureRegister1[7:4].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_ssbs to recover from invalid bit patterns.

pub fn try_ssbs(&self) -> Result<IdAa64Pfr1El1Ssbs, InvalidBits<u8>>

where IdAa64Pfr1El1Ssbs: TryFromBytes,

Fallible variant of Self::ssbs.

pub fn set_ssbs(&mut self, value: IdAa64Pfr1El1Ssbs) -> &mut Self

where IdAa64Pfr1El1Ssbs: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[7:4].

pub fn bt(&self) -> IdAa64Pfr1El1Bt

where IdAa64Pfr1El1Bt: TryFromBytes,

The value of ProcessorFeatureRegister1[3:0].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_bt to recover from invalid bit patterns.

pub fn try_bt(&self) -> Result<IdAa64Pfr1El1Bt, InvalidBits<u8>>

where IdAa64Pfr1El1Bt: TryFromBytes,

Fallible variant of Self::bt.

pub fn set_bt(&mut self, value: IdAa64Pfr1El1Bt) -> &mut Self

where IdAa64Pfr1El1Bt: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister1[3:0].

impl ProcessorFeatureRegister1

pub fn iter(&self) -> ProcessorFeatureRegister1Iter

Returns an iterator over (metadata, value) pairs for each field.

Trait Implementations

impl Binary for ProcessorFeatureRegister1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr1El1Pfar: Debug, IdAa64Pfr1El1Df2: Debug, IdAa64Pfr1El1Mtex: Debug, IdAa64Pfr1El1The: Debug, IdAa64Pfr1El1Gcs: Debug, IdAa64Pfr1El1MteFrac: Debug, IdAa64Pfr1El1Nmi: Debug, IdAa64Pfr1El1Csv2Frac: Debug, IdAa64Pfr1El1RndrTrap: Debug, IdAa64Pfr1El1Sme: Debug, IdAa64Pfr1El1Mte: Debug, IdAa64Pfr1El1Ssbs: Debug, IdAa64Pfr1El1Bt: Debug,

Formats the value using the given formatter.

impl Clone for ProcessorFeatureRegister1

fn clone(&self) -> ProcessorFeatureRegister1

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for ProcessorFeatureRegister1

impl Debug for ProcessorFeatureRegister1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for ProcessorFeatureRegister1

fn default() -> Self

Returns an instance with the default bits set (i.e,. with a value of Self::DEFAULT.

impl Eq for ProcessorFeatureRegister1

impl From<ProcessorFeatureRegister1> for u64

fn from(value: ProcessorFeatureRegister1) -> Self

Converts to this type from the input type.

impl From<u64> for ProcessorFeatureRegister1

fn from(value: u64) -> Self

Converts to this type from the input type.

impl IntoIterator for ProcessorFeatureRegister1

type Item = (&'static FieldMetadata<u64>, u64)

The type of the elements being iterated over.

type IntoIter = ProcessorFeatureRegister1Iter

Which kind of iterator are we turning this into?

fn into_iter(self) -> Self::IntoIter

Creates an iterator from a value.

impl<'a> IntoIterator for &'a ProcessorFeatureRegister1

type Item = (&'static FieldMetadata<u64>, u64)

The type of the elements being iterated over.

type IntoIter = ProcessorFeatureRegister1Iter

Which kind of iterator are we turning this into?

fn into_iter(self) -> Self::IntoIter

Creates an iterator from a value.

impl LowerHex for ProcessorFeatureRegister1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr1El1Pfar: Debug, IdAa64Pfr1El1Df2: Debug, IdAa64Pfr1El1Mtex: Debug, IdAa64Pfr1El1The: Debug, IdAa64Pfr1El1Gcs: Debug, IdAa64Pfr1El1MteFrac: Debug, IdAa64Pfr1El1Nmi: Debug, IdAa64Pfr1El1Csv2Frac: Debug, IdAa64Pfr1El1RndrTrap: Debug, IdAa64Pfr1El1Sme: Debug, IdAa64Pfr1El1Mte: Debug, IdAa64Pfr1El1Ssbs: Debug, IdAa64Pfr1El1Bt: Debug,

Formats the value using the given formatter.

impl Octal for ProcessorFeatureRegister1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr1El1Pfar: Debug, IdAa64Pfr1El1Df2: Debug, IdAa64Pfr1El1Mtex: Debug, IdAa64Pfr1El1The: Debug, IdAa64Pfr1El1Gcs: Debug, IdAa64Pfr1El1MteFrac: Debug, IdAa64Pfr1El1Nmi: Debug, IdAa64Pfr1El1Csv2Frac: Debug, IdAa64Pfr1El1RndrTrap: Debug, IdAa64Pfr1El1Sme: Debug, IdAa64Pfr1El1Mte: Debug, IdAa64Pfr1El1Ssbs: Debug, IdAa64Pfr1El1Bt: Debug,

Formats the value using the given formatter.

impl PartialEq for ProcessorFeatureRegister1

fn eq(&self, other: &ProcessorFeatureRegister1) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for ProcessorFeatureRegister1

impl UpperHex for ProcessorFeatureRegister1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr1El1Pfar: Debug, IdAa64Pfr1El1Df2: Debug, IdAa64Pfr1El1Mtex: Debug, IdAa64Pfr1El1The: Debug, IdAa64Pfr1El1Gcs: Debug, IdAa64Pfr1El1MteFrac: Debug, IdAa64Pfr1El1Nmi: Debug, IdAa64Pfr1El1Csv2Frac: Debug, IdAa64Pfr1El1RndrTrap: Debug, IdAa64Pfr1El1Sme: Debug, IdAa64Pfr1El1Mte: Debug, IdAa64Pfr1El1Ssbs: Debug, IdAa64Pfr1El1Bt: Debug,

Formats the value using the given formatter.