Struct ProcessorFeatureRegister0 

pub struct ProcessorFeatureRegister0(/* private fields */);

The layout of ID_AA64PFR0_EL1.

Implementations

impl ProcessorFeatureRegister0

pub const RSVD1_MASK: u64

Mask of all reserved-as-1 bits.

pub const RSVD0_MASK: u64

Mask of all reserved-as-0 bits.

pub const DEFAULT: u64

The default value of the layout, combining all field defaults and reserved-as values.

pub const CSV3_MASK: u64

Unshifted bitmask of csv3.

pub const CSV3_SHIFT: usize = 60

Bit shift (i.e., the low bit) of csv3.

pub const CSV2_MASK: u64

Unshifted bitmask of csv2.

pub const CSV2_SHIFT: usize = 56

Bit shift (i.e., the low bit) of csv2.

pub const DIT_MASK: u64

Unshifted bitmask of dit.

pub const DIT_SHIFT: usize = 48

Bit shift (i.e., the low bit) of dit.

pub const AMU_MASK: u64

Unshifted bitmask of amu.

pub const AMU_SHIFT: usize = 44

Bit shift (i.e., the low bit) of amu.

pub const MPAM_MASK: u64

Unshifted bitmask of mpam.

pub const MPAM_SHIFT: usize = 40

Bit shift (i.e., the low bit) of mpam.

pub const SEL2_MASK: u64

Unshifted bitmask of sel2.

pub const SEL2_SHIFT: usize = 36

Bit shift (i.e., the low bit) of sel2.

pub const SVE_MASK: u64

Unshifted bitmask of sve.

pub const SVE_SHIFT: usize = 32

Bit shift (i.e., the low bit) of sve.

pub const RAS_MASK: u64

Unshifted bitmask of ras.

pub const RAS_SHIFT: usize = 28

Bit shift (i.e., the low bit) of ras.

pub const GIC_MASK: u64

Unshifted bitmask of gic.

pub const GIC_SHIFT: usize = 24

Bit shift (i.e., the low bit) of gic.

pub const ADVSIMD_MASK: u64

Unshifted bitmask of advsimd.

pub const ADVSIMD_SHIFT: usize = 20

Bit shift (i.e., the low bit) of advsimd.

pub const FP_MASK: u64

Unshifted bitmask of fp.

pub const FP_SHIFT: usize = 16

Bit shift (i.e., the low bit) of fp.

pub const EL3_MASK: u64

Unshifted bitmask of el3.

pub const EL3_SHIFT: usize = 12

Bit shift (i.e., the low bit) of el3.

pub const EL2_MASK: u64

Unshifted bitmask of el2.

pub const EL2_SHIFT: usize = 8

Bit shift (i.e., the low bit) of el2.

pub const EL1_MASK: u64

Unshifted bitmask of el1.

pub const EL1_SHIFT: usize = 4

Bit shift (i.e., the low bit) of el1.

pub const EL0_MASK: u64

Unshifted bitmask of el0.

pub const EL0_SHIFT: usize = 0

Bit shift (i.e., the low bit) of el0.

pub const FIELDS: [FieldMetadata<u64>; 15]

Metadata of all named fields in the layout.

pub const fn new() -> Self

Creates a new instance with reserved-as-1 bits set and all other bits zeroed (i.e., with a value of Self::RSVD1_MASK).

pub const fn bits(self) -> u64

pub fn csv3(&self) -> IdAa64Pfr0Csv3

where IdAa64Pfr0Csv3: TryFromBytes,

The value of ProcessorFeatureRegister0[63:60].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_csv3 to recover from invalid bit patterns.

pub fn try_csv3(&self) -> Result<IdAa64Pfr0Csv3, InvalidBits<u8>>

where IdAa64Pfr0Csv3: TryFromBytes,

Fallible variant of Self::csv3.

pub fn set_csv3(&mut self, value: IdAa64Pfr0Csv3) -> &mut Self

where IdAa64Pfr0Csv3: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[63:60].

pub fn csv2(&self) -> IdAa64Pfr0Csv2

where IdAa64Pfr0Csv2: TryFromBytes,

The value of ProcessorFeatureRegister0[59:56].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_csv2 to recover from invalid bit patterns.

pub fn try_csv2(&self) -> Result<IdAa64Pfr0Csv2, InvalidBits<u8>>

where IdAa64Pfr0Csv2: TryFromBytes,

Fallible variant of Self::csv2.

pub fn set_csv2(&mut self, value: IdAa64Pfr0Csv2) -> &mut Self

where IdAa64Pfr0Csv2: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[59:56].

pub fn dit(&self) -> IdAa64Pfr0Dit

where IdAa64Pfr0Dit: TryFromBytes,

The value of ProcessorFeatureRegister0[51:48].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_dit to recover from invalid bit patterns.

pub fn try_dit(&self) -> Result<IdAa64Pfr0Dit, InvalidBits<u8>>

where IdAa64Pfr0Dit: TryFromBytes,

Fallible variant of Self::dit.

pub fn set_dit(&mut self, value: IdAa64Pfr0Dit) -> &mut Self

where IdAa64Pfr0Dit: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[51:48].

pub fn amu(&self) -> IdAa64Pfr0Amu

where IdAa64Pfr0Amu: TryFromBytes,

The value of ProcessorFeatureRegister0[47:44].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_amu to recover from invalid bit patterns.

pub fn try_amu(&self) -> Result<IdAa64Pfr0Amu, InvalidBits<u8>>

where IdAa64Pfr0Amu: TryFromBytes,

Fallible variant of Self::amu.

pub fn set_amu(&mut self, value: IdAa64Pfr0Amu) -> &mut Self

where IdAa64Pfr0Amu: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[47:44].

pub fn mpam(&self) -> IdAa64Pfr0Mpam

where IdAa64Pfr0Mpam: TryFromBytes,

The value of ProcessorFeatureRegister0[43:40].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_mpam to recover from invalid bit patterns.

pub fn try_mpam(&self) -> Result<IdAa64Pfr0Mpam, InvalidBits<u8>>

where IdAa64Pfr0Mpam: TryFromBytes,

Fallible variant of Self::mpam.

pub fn set_mpam(&mut self, value: IdAa64Pfr0Mpam) -> &mut Self

where IdAa64Pfr0Mpam: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[43:40].

pub fn sel2(&self) -> IdAa64Pfr0Sel2

where IdAa64Pfr0Sel2: TryFromBytes,

The value of ProcessorFeatureRegister0[39:36].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_sel2 to recover from invalid bit patterns.

pub fn try_sel2(&self) -> Result<IdAa64Pfr0Sel2, InvalidBits<u8>>

where IdAa64Pfr0Sel2: TryFromBytes,

Fallible variant of Self::sel2.

pub fn set_sel2(&mut self, value: IdAa64Pfr0Sel2) -> &mut Self

where IdAa64Pfr0Sel2: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[39:36].

pub fn sve(&self) -> IdAa64Pfr0Sve

where IdAa64Pfr0Sve: TryFromBytes,

The value of ProcessorFeatureRegister0[35:32].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_sve to recover from invalid bit patterns.

pub fn try_sve(&self) -> Result<IdAa64Pfr0Sve, InvalidBits<u8>>

where IdAa64Pfr0Sve: TryFromBytes,

Fallible variant of Self::sve.

pub fn set_sve(&mut self, value: IdAa64Pfr0Sve) -> &mut Self

where IdAa64Pfr0Sve: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[35:32].

pub fn ras(&self) -> IdAa64Pfr0Ras

where IdAa64Pfr0Ras: TryFromBytes,

The value of ProcessorFeatureRegister0[31:28].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_ras to recover from invalid bit patterns.

pub fn try_ras(&self) -> Result<IdAa64Pfr0Ras, InvalidBits<u8>>

where IdAa64Pfr0Ras: TryFromBytes,

Fallible variant of Self::ras.

pub fn set_ras(&mut self, value: IdAa64Pfr0Ras) -> &mut Self

where IdAa64Pfr0Ras: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[31:28].

pub fn gic(&self) -> IdAa64Pfr0Gic

where IdAa64Pfr0Gic: TryFromBytes,

The value of ProcessorFeatureRegister0[27:24].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_gic to recover from invalid bit patterns.

pub fn try_gic(&self) -> Result<IdAa64Pfr0Gic, InvalidBits<u8>>

where IdAa64Pfr0Gic: TryFromBytes,

Fallible variant of Self::gic.

pub fn set_gic(&mut self, value: IdAa64Pfr0Gic) -> &mut Self

where IdAa64Pfr0Gic: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[27:24].

pub fn advsimd(&self) -> IdAa64Pfr0Fp

where IdAa64Pfr0Fp: TryFromBytes,

The value of ProcessorFeatureRegister0[23:20].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_advsimd to recover from invalid bit patterns.

pub fn try_advsimd(&self) -> Result<IdAa64Pfr0Fp, InvalidBits<u8>>

where IdAa64Pfr0Fp: TryFromBytes,

Fallible variant of Self::advsimd.

pub fn set_advsimd(&mut self, value: IdAa64Pfr0Fp) -> &mut Self

where IdAa64Pfr0Fp: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[23:20].

pub fn fp(&self) -> IdAa64Pfr0Fp

where IdAa64Pfr0Fp: TryFromBytes,

The value of ProcessorFeatureRegister0[19:16].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_fp to recover from invalid bit patterns.

pub fn try_fp(&self) -> Result<IdAa64Pfr0Fp, InvalidBits<u8>>

where IdAa64Pfr0Fp: TryFromBytes,

Fallible variant of Self::fp.

pub fn set_fp(&mut self, value: IdAa64Pfr0Fp) -> &mut Self

where IdAa64Pfr0Fp: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[19:16].

pub fn el3(&self) -> IdAa64Pfr0El

where IdAa64Pfr0El: TryFromBytes,

The value of ProcessorFeatureRegister0[15:12].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_el3 to recover from invalid bit patterns.

pub fn try_el3(&self) -> Result<IdAa64Pfr0El, InvalidBits<u8>>

where IdAa64Pfr0El: TryFromBytes,

Fallible variant of Self::el3.

pub fn set_el3(&mut self, value: IdAa64Pfr0El) -> &mut Self

where IdAa64Pfr0El: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[15:12].

pub fn el2(&self) -> IdAa64Pfr0El

where IdAa64Pfr0El: TryFromBytes,

The value of ProcessorFeatureRegister0[11:8].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_el2 to recover from invalid bit patterns.

pub fn try_el2(&self) -> Result<IdAa64Pfr0El, InvalidBits<u8>>

where IdAa64Pfr0El: TryFromBytes,

Fallible variant of Self::el2.

pub fn set_el2(&mut self, value: IdAa64Pfr0El) -> &mut Self

where IdAa64Pfr0El: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[11:8].

pub fn el1(&self) -> IdAa64Pfr0El

where IdAa64Pfr0El: TryFromBytes,

The value of ProcessorFeatureRegister0[7:4].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_el1 to recover from invalid bit patterns.

pub fn try_el1(&self) -> Result<IdAa64Pfr0El, InvalidBits<u8>>

where IdAa64Pfr0El: TryFromBytes,

Fallible variant of Self::el1.

pub fn set_el1(&mut self, value: IdAa64Pfr0El) -> &mut Self

where IdAa64Pfr0El: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[7:4].

pub fn el0(&self) -> IdAa64Pfr0El

where IdAa64Pfr0El: TryFromBytes,

The value of ProcessorFeatureRegister0[3:0].

Panics

Panics if the field’s bit pattern is not a valid value of the custom representation. Use Self::try_el0 to recover from invalid bit patterns.

pub fn try_el0(&self) -> Result<IdAa64Pfr0El, InvalidBits<u8>>

where IdAa64Pfr0El: TryFromBytes,

Fallible variant of Self::el0.

pub fn set_el0(&mut self, value: IdAa64Pfr0El) -> &mut Self

where IdAa64Pfr0El: IntoBytes + Immutable,

Sets the value of ProcessorFeatureRegister0[3:0].

impl ProcessorFeatureRegister0

pub fn iter(&self) -> ProcessorFeatureRegister0Iter

Returns an iterator over (metadata, value) pairs for each field.

Trait Implementations

impl Binary for ProcessorFeatureRegister0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr0Csv3: Debug, IdAa64Pfr0Csv2: Debug, IdAa64Pfr0Dit: Debug, IdAa64Pfr0Amu: Debug, IdAa64Pfr0Mpam: Debug, IdAa64Pfr0Sel2: Debug, IdAa64Pfr0Sve: Debug, IdAa64Pfr0Ras: Debug, IdAa64Pfr0Gic: Debug, IdAa64Pfr0Fp: Debug, IdAa64Pfr0El: Debug,

Formats the value using the given formatter.

impl Clone for ProcessorFeatureRegister0

fn clone(&self) -> ProcessorFeatureRegister0

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for ProcessorFeatureRegister0

impl Debug for ProcessorFeatureRegister0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for ProcessorFeatureRegister0

fn default() -> Self

Returns an instance with the default bits set (i.e,. with a value of Self::DEFAULT.

impl Eq for ProcessorFeatureRegister0

impl From<ProcessorFeatureRegister0> for u64

fn from(value: ProcessorFeatureRegister0) -> Self

Converts to this type from the input type.

impl From<u64> for ProcessorFeatureRegister0

fn from(value: u64) -> Self

Converts to this type from the input type.

impl IntoIterator for ProcessorFeatureRegister0

type Item = (&'static FieldMetadata<u64>, u64)

The type of the elements being iterated over.

type IntoIter = ProcessorFeatureRegister0Iter

Which kind of iterator are we turning this into?

fn into_iter(self) -> Self::IntoIter

Creates an iterator from a value.

impl<'a> IntoIterator for &'a ProcessorFeatureRegister0

type Item = (&'static FieldMetadata<u64>, u64)

The type of the elements being iterated over.

type IntoIter = ProcessorFeatureRegister0Iter

Which kind of iterator are we turning this into?

fn into_iter(self) -> Self::IntoIter

Creates an iterator from a value.

impl LowerHex for ProcessorFeatureRegister0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr0Csv3: Debug, IdAa64Pfr0Csv2: Debug, IdAa64Pfr0Dit: Debug, IdAa64Pfr0Amu: Debug, IdAa64Pfr0Mpam: Debug, IdAa64Pfr0Sel2: Debug, IdAa64Pfr0Sve: Debug, IdAa64Pfr0Ras: Debug, IdAa64Pfr0Gic: Debug, IdAa64Pfr0Fp: Debug, IdAa64Pfr0El: Debug,

Formats the value using the given formatter.

impl Octal for ProcessorFeatureRegister0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr0Csv3: Debug, IdAa64Pfr0Csv2: Debug, IdAa64Pfr0Dit: Debug, IdAa64Pfr0Amu: Debug, IdAa64Pfr0Mpam: Debug, IdAa64Pfr0Sel2: Debug, IdAa64Pfr0Sve: Debug, IdAa64Pfr0Ras: Debug, IdAa64Pfr0Gic: Debug, IdAa64Pfr0Fp: Debug, IdAa64Pfr0El: Debug,

Formats the value using the given formatter.

impl PartialEq for ProcessorFeatureRegister0

fn eq(&self, other: &ProcessorFeatureRegister0) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for ProcessorFeatureRegister0

impl UpperHex for ProcessorFeatureRegister0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

where IdAa64Pfr0Csv3: Debug, IdAa64Pfr0Csv2: Debug, IdAa64Pfr0Dit: Debug, IdAa64Pfr0Amu: Debug, IdAa64Pfr0Mpam: Debug, IdAa64Pfr0Sel2: Debug, IdAa64Pfr0Sve: Debug, IdAa64Pfr0Ras: Debug, IdAa64Pfr0Gic: Debug, IdAa64Pfr0Fp: Debug, IdAa64Pfr0El: Debug,

Formats the value using the given formatter.