class TranscoderDdiControl

Enables the transcoder's DDI functionality.

Enables the transcoder's DDI functionality.

Selects the DDI that the transcoder will connect to.

This field has a non-trivial value encoding. The ddi_*() and set_ddi_*()

helpers should be preferred to accessing the field directly.

This field is tagged `_subtle` because the definition matches the bits used

on Tiger Lake, but it's used on all supported models. Kaby Lake and Skylake

have a very similar field, which only takes up bits 30-28. Fortunately, bit

27 is reserved MBZ (must be zero). So, there's still a 1:1 mapping between

DDI selection and the values of bits 30-27.

We take advantage of this to avoid forking the entire (fairly large)

register definition by papering over this difference in the helpers

`ddi_kaby_lake()` and `set_ddi_kaby_lake()`.

Selects the DDI that the transcoder will connect to.

This field has a non-trivial value encoding. The ddi_*() and set_ddi_*()

helpers should be preferred to accessing the field directly.

This field is tagged `_subtle` because the definition matches the bits used

on Tiger Lake, but it's used on all supported models. Kaby Lake and Skylake

have a very similar field, which only takes up bits 30-28. Fortunately, bit

27 is reserved MBZ (must be zero). So, there's still a 1:1 mapping between

DDI selection and the values of bits 30-27.

We take advantage of this to avoid forking the entire (fairly large)

register definition by papering over this difference in the helpers

`ddi_kaby_lake()` and `set_ddi_kaby_lake()`.

The DDI that the transcoder will connect to.

This helper works for Kaby Lake and Skylake.

This field must not be changed while `enabled` is true. Directing multiple

transcoders to the same DDI is only valid for DisplayPort Multi-Streaming.

The underlying field is ignored by the EDP transcoder, which is attached to

DDI A.

The DDI that the transcoder will connect to.

This helper works for Tiger Lake.

This field must not be changed while `enabled` is true. Directing multiple

transcoders to the same DDI is only valid for DisplayPort Multi-Streaming.

The underlying field is ignored by the DSI transcoders. Each DSI transcoder

is attached to a DDI.

See `ddi_kaby_lake()` for details.

See `ddi_tiger_lake()` for details.

The transcoder's mode of operation.

This field must not be changed while `enabled` is true.

This field must be changed in the same MMIO write as the

`display_port_transport_tiger_lake` field.

In HDMI mode, the transcoder sends a null packet (32 zero bytes) when

Vsync is asserted. The transcoder also sends a preamble and guardband

before each null packet. These behaviors match the HDMI specification.

In DVI mode, enabling DIP (Data Island Packets) or audio causes the

transcoder to adopt the HDMI behavior described above.

DisplayPort modes SST (Single Stream) or MST (Multi-Stream) must match the

mode selected in the `DpTransportControl` register.

On Tiger Lake, the DSI transcoders ignore this field.

On Kaby Lake, transcoder EDP (and therefore DDI A) must be in the

DisplayPort SST (Single Stream) mode.

The transcoder's mode of operation.

This field must not be changed while `enabled` is true.

This field must be changed in the same MMIO write as the

`display_port_transport_tiger_lake` field.

In HDMI mode, the transcoder sends a null packet (32 zero bytes) when

Vsync is asserted. The transcoder also sends a preamble and guardband

before each null packet. These behaviors match the HDMI specification.

In DVI mode, enabling DIP (Data Island Packets) or audio causes the

transcoder to adopt the HDMI behavior described above.

DisplayPort modes SST (Single Stream) or MST (Multi-Stream) must match the

mode selected in the `DpTransportControl` register.

On Tiger Lake, the DSI transcoders ignore this field.

On Kaby Lake, transcoder EDP (and therefore DDI A) must be in the

DisplayPort SST (Single Stream) mode.

Selects the bpc (number of bits per color) output on the connected DDI.

This field must not be changed while `enabled` is true.

HDMI and DSC (Display Stream Compression) don't support 6bpc.

On Tiger Lake, the DSI transcoder ignores this field, and uses the pixel

format in the TRANS_DSI_FUNC_CONF register.

Selects the bpc (number of bits per color) output on the connected DDI.

This field must not be changed while `enabled` is true.

HDMI and DSC (Display Stream Compression) don't support 6bpc.

On Tiger Lake, the DSI transcoder ignores this field, and uses the pixel

format in the TRANS_DSI_FUNC_CONF register.

When operating as a port sync secondary, selects the primary transcoder.

This field has a non-trivial value encoding. The

`port_sync_primary_transcoder_kaby_lake()` and

`set_port_sync_primary_transcoder_kaby_lake()` helpers should be preferred

to accessing the field directly.

When operating as a port sync secondary, selects the primary transcoder.

This field has a non-trivial value encoding. The

`port_sync_primary_transcoder_kaby_lake()` and

`set_port_sync_primary_transcoder_kaby_lake()` helpers should be preferred

to accessing the field directly.

When operating as a port sync secondary, selects the primary transcoder.

This field is ignored by the EDP transcoder, because it cannot function as

a port sync secondary.

This field's bits are reserved MBZ (must be zero) on Tiger Lake. The field

was moved to the TRANS_DDI_FUNC_CTL2 register and widened.

See `port_sync_primary_kaby_lake()`.

If true, VSync is active high. If false, VSync is active low.

On Tiger Lake, the DSI transcoders ignore this field.

Active high is the default, and considered the standard polarity. Active

low is considered an inverted polarity.

If true, VSync is active high. If false, VSync is active low.

On Tiger Lake, the DSI transcoders ignore this field.

Active high is the default, and considered the standard polarity. Active

low is considered an inverted polarity.

If true, HSync is active high. If false, HSync is active low.

On Tiger Lake, the DSI transcoders ignore this field.

Active high is the default, and considered the standard polarity. Active

low is considered an inverted polarity.

If true, HSync is active high. If false, HSync is active low.

On Tiger Lake, the DSI transcoders ignore this field.

Active high is the default, and considered the standard polarity. Active

low is considered an inverted polarity.

If true, this transcoder operates as a port sync secondary transcoder.

Only the secondary transcoders must be explicitly configured for port sync.

This is set to false for the port sync primary transcoder.

This field is ignored by the EDP transcoder, because it cannot function as

a port sync secondary.

This field's bits are reserved MBZ (must be zero) on Tiger Lake. The field

was moved to the TRANS_DDI_FUNC_CTL2 register.

If true, this transcoder operates as a port sync secondary transcoder.

Only the secondary transcoders must be explicitly configured for port sync.

This is set to false for the port sync primary transcoder.

This field is ignored by the EDP transcoder, because it cannot function as

a port sync secondary.

This field's bits are reserved MBZ (must be zero) on Tiger Lake. The field

was moved to the TRANS_DDI_FUNC_CTL2 register.

Selects the input pipe, for transcoders that are not attached to pipes.

This field has a non-trivial value encoding. The input_pipe_*() and

set_input_pipe_*() helpers should be preferred to accessing the field

directly.

Selects the input pipe, for transcoders that are not attached to pipes.

This field has a non-trivial value encoding. The input_pipe_*() and

set_input_pipe_*() helpers should be preferred to accessing the field

directly.

Selects the input pipe, for transcoders that are not attached to pipes.

On Tiger Lake, this field is only used by the DSI transcoders. On Kaby

Lake, the field is only used by the EDP transcoder. These are the

transcoders that are not attached to pipes.

This field is not documented on Skylake, and its bits are documented as

reserved. However, several PRM locations (IHD-OS-SKL-Vol 12-05.16 section

"Display Connections" pages 103, section "Pipe to Transcoder to DDI

Mappings" page 107) mention that the EDP transcoder can connect to pipes

A-C. So, the field likely works the same way as on Kaby Lake.

See `input_pipe()` for details.

Selects the DisplayPort transport that receives this transcoder's data.

This field is only used when DisplayPort MST (multi-streaming) is enabled.

This must be changed in the same MMIO operation as `ddi_mode`.

Selects the DisplayPort transport that receives this transcoder's data.

This field is only used when DisplayPort MST (multi-streaming) is enabled.

This must be changed in the same MMIO operation as `ddi_mode`.

If true, VC (Virtual Channel) payload allocation is enabled.

This field is ignored by the transcoders attached to DDIs that don't

support multi-streaming. These are the DSI transcoders On Tiger Lake, and

the EDP transcoder on Kaby Lake and Skylake.

If true, VC (Virtual Channel) payload allocation is enabled.

This field is ignored by the transcoders attached to DDIs that don't

support multi-streaming. These are the DSI transcoders On Tiger Lake, and

the EDP transcoder on Kaby Lake and Skylake.

If true, the HDMI scrambler is in CTS (Compliance Test Specification) mode.

This field must not be changed while `hdmi_scrambler_enabled` is true.

This field is not documented on Kaby Lake and Skylake. The bit is reserved

MBZ (must be zero). This extends the good read semantics of `hdmi_enabled_`

-- reading zero means that the CTS mode is disabled, which makes perfect

sense while the HDMI scrambler is disabled.

If true, the HDMI scrambler is in CTS (Compliance Test Specification) mode.

This field must not be changed while `hdmi_scrambler_enabled` is true.

This field is not documented on Kaby Lake and Skylake. The bit is reserved

MBZ (must be zero). This extends the good read semantics of `hdmi_enabled_`

-- reading zero means that the CTS mode is disabled, which makes perfect

sense while the HDMI scrambler is disabled.

If false, the HDMI scrambler is reset on every line.

This field is only used when the HDMI scrambler is in CTS mode. In that

case, it determines whether the transcoder sends a SSCP (Scrambler

Synchronization Control Period) during HSync for every line, or for every

other line.

This field must be not be set while `hdmi_scrambler_cts_mode` is true.

This field is not documented on Kaby Lake and Skylake. The bit is reserved

MBZ (must be zero). This extends the good read semantics of

`hdmi_scrambler_cts_mode` -- the CTS mode is never enabled, and this field

can always be ignored.

If false, the HDMI scrambler is reset on every line.

This field is only used when the HDMI scrambler is in CTS mode. In that

case, it determines whether the transcoder sends a SSCP (Scrambler

Synchronization Control Period) during HSync for every line, or for every

other line.

This field must be not be set while `hdmi_scrambler_cts_mode` is true.

This field is not documented on Kaby Lake and Skylake. The bit is reserved

MBZ (must be zero). This extends the good read semantics of

`hdmi_scrambler_cts_mode` -- the CTS mode is never enabled, and this field

can always be ignored.

If true, the high TMDS character rate is enabled over the HDMI link.

This field must be set to true if and only if the HDMI link symbol rate is

greater than 340 MHz.

This field is not documented on Kaby Lake and Skylake. The bits are

reserved MBZ (must be zero), which makes for good read semantics -- reading

zero means that the high TMDS character rate is not enabled.

If true, the high TMDS character rate is enabled over the HDMI link.

This field must be set to true if and only if the HDMI link symbol rate is

greater than 340 MHz.

This field is not documented on Kaby Lake and Skylake. The bits are

reserved MBZ (must be zero), which makes for good read semantics -- reading

zero means that the high TMDS character rate is not enabled.

Selects the number of DisplayPort or DSI lanes enabled.

This field has a non-trivial value encoding. The

`display_port_lane_count()` and `set_display_port_lane_count()` helpers

should be preferred to accessing the field directly.

Selects the number of DisplayPort or DSI lanes enabled.

This field has a non-trivial value encoding. The

`display_port_lane_count()` and `set_display_port_lane_count()` helpers

should be preferred to accessing the field directly.

The number of DisplayPort lanes enabled.

This field is ignored for HDMI or DVI, as these modes always use 4 lanes.

Only the DSI transcoders support using 3 lanes.

When the transcoder mode is a DisplayPort mode, the field must match the

`display_port_lane_count` in the attached DDI's DdiBufferControl register.

See `display_port_lane_count()` for details.

If true, scrambling is enabled over the HDMI link.

Scrambling must be enabled for HDMI link symbol rates above 340 MHz.

Scrambling should also be enabled at lower speeds, when the receiver

supports scrambling at those speeds.

This field is not documented on Kaby Lake and Skylake. The bits are

reserved MBZ (must be zero), which makes for good read semantics -- reading

zero means that no HDMI scrambler is enabled.

If true, scrambling is enabled over the HDMI link.

Scrambling must be enabled for HDMI link symbol rates above 340 MHz.

Scrambling should also be enabled at lower speeds, when the receiver

supports scrambling at those speeds.

This field is not documented on Kaby Lake and Skylake. The bits are

reserved MBZ (must be zero), which makes for good read semantics -- reading

zero means that no HDMI scrambler is enabled.

Values for `display_port_transport_tiger_lake`.