struct
Defined at line 303 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h
Divider that generates the panel power clock from the PCH raw clock.
Value = divider / 2 - 1. 0 is not a valid value.
Intel's PRMs state that the panel clock must always be 10 kHz. This results
in a 100us period, which is assumed to be the base unit for all panel
timings.
Public Members
Field field