struct
Defined at line 1068 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h
The multipliers for the memory controller clock frequencies.
After the MRC (Memory Reference initialization Code) runs, the multiplier
should be greater than or equal to 3. A multiplier of 0 indicates that the
memory controller PLL will be shut down. Multipliers 1 and 2 are reserved.
The bases are 400/3 MHz for the memory controller's Dclk (double-clock) and
800/3 MHz for the memory controller's Qclk (quad-clock).
Public Members
Field field