struct
Defined at line 918 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h
Sets the DDR PHY bus clock relatively to the memory controller Qclk.
This field is reserved MBZ (must be zero) on Alder Lake and Tiger Lake.
Those platforms use the `ddr_phy_bus_clock_multiplier_shift_tiger_lake`
field with the same semantics.
Public Members
Field field