struct

If true, GMBUS hardware enters a "ready" state and will not perform any

operation until the software acts.

Certain actions should not be performed while this bit is false. For

example, the semantics of reading/writing the `GMBusData` register are more

complex when this bit is false.

This bit transitions from false to true when:

- GMBUS is waiting for the software to read/write the `GMBusData` register

in order to advance an I2C read/write transaction.

- A GMBUS cycle ended with a STOP.

- GMBUS completes the partial reset procedure initiated via the

`GMBusCommand` register.

This bit transitions from true to false when:

- A new I2C transaction over GMBUS is triggered.

- GMBUS partial reset is initiated via the `GMBusCommand` register.

This bit is also known as "hardware ready" (or HW_RDY) bit in Intel

Programmer's Reference Manual.