struct

Defined at line 217 of file ../../src/graphics/display/drivers/intel-display/registers-gmbus.h

If true, the GMBUS cycle contains a special index write transaction.

When this field is true, the GMBUS controller uses the I2C combined format

to perform a 1-byte or 2-byte index write transaction, immediately followed

(via RESTART) by a second transaction in the direction indicated by

`is_read_transaction`. In other words, the main transaction is preceded

by a short (1-byte / 2-byte) write transaction.

This operation matches the VESA E-DDC (Enhanced Display Data Channel)

specification for reading EDID / DisplayID contents, where the E-DDC

"start address" / "word offset" (0 or 128) is a 1-byte index.

If this field is true, `wait_state_enabled` must also be true.

Public Members

Field field