struct

In Intel Display Engine, every DDI is allocated a pair of numbered GPIO

pins for I2C / GMBUS communication.

This field selects a GMBUS pin pair for use in the GMBUS communication.

The DDI

<

-> pin pair mapping varies by platform. The mapping is available

at: Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev 2.0 Part 1, Page 1020 Kaby Lake:

IHD-OS-KBL-Vol 2c-1.17 Part 1, Page 728 Skylake: IHD-OS-SKL-Vol 2c-05.16

Part 1, Page 723

Note that the GMBUS pin pair ID may not be equal to the GPIO pin pair ID.

Note: On Skylake and Kaby Lake, only bits 2:0 are defined for this field

but bits 4:3 are reserved as "must be zero"; for compatibility we use the

same field definition across platforms, but the highest two bits on Skylake

and Kaby Lake will always be zero.