struct

The bits output by the pattern generator, when not in fixed pattern mode.

For example, to get a clock signal at 1/5 of the HDMI PLL frequency (with a

60/40 duty cycle), use 15-bit repeater (source 2) and set the pattern to

0b111'00'111'00'111'00 to generate the following pattern (assuming the bits

are emitted from the least significant bit to the most significant bit):

(output) 0 0 1 1 1 0 0 1 1 1 0 0 1 1 1

1 ______ ______ ______

0 ____ ____ ____

The pattern must fulfill the following constraints:

- The pattern's least significant bit must be zero.

- If PatternSize() is non-zero, the bit `PatternSize() - 1` is the most

significant bit set. In testing, this means the pattern will be at least

`1

<

<

PatternSize()` and less than `1

<

<

(PatternSize() + 1)`.

- The number of 1 -> 0 bit transitions (when reading from the most

significant bit to the least significant bit) in `Pattern()` equals

`PatternSize() / (divider_ratio - 1.0)` for divider ratios greater than

one.

- The maximum length of a consecutive sequence of ones or zeros will

differ by at most 1 from the minimum length of a consecutive sequence

of ones or zeros.

`Pattern()`, `PatternSize()` and `SetFrequencyDividerRatio()` helpers are

preferred over direct field manipulations.