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Crate sdmmc_spec

Crate sdmmc_spec 

Source

Structs§

CommandQueueDirectCmdTaskDescriptor
A Direct Command task descriptor in the CQHCI Task Descriptor List (JESD84-B51A, B.2.3)
CommandQueueTDLDirectCmdEntry
A DCMD entry in the CQHCI Task Descriptor List (JESD84-B51A, B.2.2).
CommandQueueTDLEntry
An entry in the CQHCI Task Descriptor List (JESD84-B51A, B.2).
CommandQueueTaskDescriptor
A task descriptor in the CQHCI Task Descriptor List (JESD84-B51A, B.2.1)
CommandQueueTransferDescriptor
A transfer descriptor in the CQHCI Task Descriptor List (JESD84-B51A, B.2.2).
CqhciCqCapsRegister
CqhciCqCfgRegister
CqhciCqCtlRegister
CqhciCqInterruptCoalescingRegister
CqhciCqInterruptSignalEnableRegister
CqhciCqInterruptStatusEnableRegister
CqhciCqInterruptStatusRegister
CqhciCqSendStatusConfiguration1Register
CqhciCqSendStatusConfiguration2Register
CqhciCqTaskErrorRegister
MmcSendStatusResponse
Response for CMD13 SEND_STATUS (JESD84-B51A, 6.10.4)
TransferBytes
A wrapper around the transfer length field in CQHCI transfer descriptors. The raw value of 0 is interpreted as 64KiB, which is hidden behind this type for clarity (JESD84-B51A, B.3.2).

Enums§

DcmdResponseType
Direction
Direction of data transfer.
MmcCommand
Command codes for MMC (JESD84-B51A, 6.10.4).

Constants§

CQHCI_CQ_CAP_OFFSET
CQHCI_CQ_CFG_OFFSET
CQHCI_CQ_CRA_OFFSET
CQHCI_CQ_CRDCT_OFFSET
CQHCI_CQ_CRI_OFFSET
CQHCI_CQ_CRYPTO_CAP_OFFSET
CQHCI_CQ_CRYPTO_NQDUN_OFFSET
CQHCI_CQ_CRYPTO_NQIE_OFFSET
CQHCI_CQ_CRYPTO_NQIS_OFFSET
CQHCI_CQ_CRYPTO_NQP_OFFSET
CQHCI_CQ_CTL_OFFSET
CQHCI_CQ_DPT_OFFSET
CQHCI_CQ_DQS_OFFSET
CQHCI_CQ_HCCAP_OFFSET
CQHCI_CQ_HCCFG_OFFSET
CQHCI_CQ_IC_OFFSET
CQHCI_CQ_ISGE_OFFSET
CQHCI_CQ_ISTE_OFFSET
CQHCI_CQ_IS_OFFSET
CQHCI_CQ_RMEM_OFFSET
CQHCI_CQ_SSC1_OFFSET
CQHCI_CQ_SSC2_OFFSET
CQHCI_CQ_TCN_OFFSET
CQHCI_CQ_TDBR_OFFSET
CQHCI_CQ_TDLBAU_OFFSET
CQHCI_CQ_TDLBA_OFFSET
CQHCI_CQ_TDPE_OFFSET
CQHCI_CQ_TERRI_OFFSET
CQHCI_CQ_VER_OFFSET
CQHCI_TASK_DESCRIPTOR_LIST_DCMD_SLOT
CQHCI_TASK_DESCRIPTOR_LIST_NUM_SLOTS
CQHCI_TASK_DESCRIPTOR_LIST_SIZE
EXT_CSD_BARRIER_EN
EXT_CSD_BARRIER_ENABLED
EXT_CSD_BARRIER_SUPPORT
EXT_CSD_BARRIER_SUPPORT_MASK
EXT_CSD_CACHE_CTRL
EXT_CSD_CACHE_EN_MASK
EXT_CSD_FLUSH_CACHE
EXT_CSD_FLUSH_CACHE_BARRIER
EXT_CSD_FLUSH_CACHE_FLUSH
EXT_CSD_GENERIC_CMD6_TIME
EXT_CSD_PARTITION_ACCESS_MASK
EXT_CSD_PARTITION_CONFIG
EXT_CSD_PARTITON_SWITCH_TIME
MMC_BLOCK_SIZE
The CQHCI spec requires 512 byte blocks (JESD84-B51A, 6.6.39.1)