Struct FuchsiaClock 

pub struct FuchsiaClock { /* private fields */ }

Volatile Clock backend using synchronous FIDL proxy.

Implementations

impl FuchsiaClock

pub fn new(proxy: ClockSynchronousProxy) -> Self

Trait Implementations

impl ClockBackend for FuchsiaClock

fn enable(&mut self) -> Result<(), BackendError>

fn disable(&mut self) -> Result<(), BackendError>

fn is_enabled(&mut self) -> Result<bool, BackendError>

fn set_rate(&mut self, hz: u64) -> Result<(), BackendError>

fn query_rate(&mut self, hz_in: u64) -> Result<u64, BackendError>

fn get_rate(&mut self) -> Result<u64, BackendError>

impl Debug for FuchsiaClock

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl ResourceBackend for FuchsiaClock

fn clock_enable(&mut self) -> Result<(), BackendError>

fn clock_disable(&mut self) -> Result<(), BackendError>

fn clock_is_enabled(&mut self) -> Result<bool, BackendError>

fn clock_set_rate(&mut self, hz: u64) -> Result<(), BackendError>

fn clock_query_rate(&mut self, hz_in: u64) -> Result<u64, BackendError>

fn clock_get_rate(&mut self) -> Result<u64, BackendError>

fn read32(&mut self, _offset: u64) -> Result<u32, BackendError>

fn write32(&mut self, _offset: u64, _value: u32) -> Result<(), BackendError>

fn barrier(&mut self)

fn gpio_read(&mut self) -> Result<bool, BackendError>

fn gpio_write(&mut self, _value: bool) -> Result<(), BackendError>

fn i2c_transfer( &mut self, _write_data: &[u8], _read_length: usize, ) -> Result<Vec<u8>, BackendError>

fn spi_transmit(&mut self, _tx_data: &[u8]) -> Result<Vec<u8>, BackendError>

fn reset_assert(&mut self) -> Result<(), BackendError>

fn reset_deassert(&mut self) -> Result<(), BackendError>

fn reset_toggle(&mut self) -> Result<(), BackendError>

fn reset_status(&mut self) -> Result<bool, BackendError>

fn serial_read(&mut self) -> Result<Vec<u8>, BackendError>

fn serial_write(&mut self, _data: &[u8]) -> Result<(), BackendError>