class MemoryAddressDecoderDimmParametersSkylake

Defined at line 772 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

MAD_DIMM_CH0_0_0_0_MCHBAR (Channel 0 DIMM Characteristics)

MAD_DIMM_CH1_0_0_0_MCHBAR (Channel 1 DIMM Characteristics)

Coffee Lake: 337345-003 Sections 7.40-7.41 pages 196-199

Whiskey Lake: 338024-001 Sections 7.11-7.12 pages 154-156

Amber Lake: 334662-005 Sections 6.34-6.35 pages 157-160

Kaby Lake S: 335196-002 Sections 7.34-7.35 pages 189-192

Kaby Lake H: 335191-003 Sections 7.40-7.41 pages 198-201

Skylake U: 332991-003 Sections 7.34-7.35 pages 190-193

Skylake S: 332688-003 Sections 7.34-7.35 pages 172-174

Skylake H: 332987-003 Sections 7.34-7.35 pages 190-193

Public Members

 field_RsvdZ_782

 field_dimm_s_built_from_8gb_modules_787

 field_dimm_s_rank_count_minus_1_790

 field_dimm_s_ddr_chip_width_select_793

 field_RsvdZ_795

 field_dimm_s_size_1gb_798

 field_RsvdZ_800

 field_dimm_l_built_from_8gb_modules_805

 field_dimm_l_rank_count_minus_1_808

 field_dimm_l_ddr_chip_width_select_811

 field_RsvdZ_813

 field_dimm_l_size_1gb_816

Public Methods

template <, >

typename SelfType::ValueType dimm_s_built_from_8gb_modules ()

If true, DIMM S is built from 8 GB DRAM modules.

This bit is expected to be false on non-DDR3 configurations.

Defined at line 787 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_s_built_from_8gb_modules (typename SelfType::ValueType val)

If true, DIMM S is built from 8 GB DRAM modules.

This bit is expected to be false on non-DDR3 configurations.

Defined at line 787 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

typename SelfType::ValueType dimm_s_rank_count_minus_1 ()

The number of ranks in DIMM S. 0 = 1 rank, 1 = 2 ranks.

Defined at line 790 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_s_rank_count_minus_1 (typename SelfType::ValueType val)

The number of ranks in DIMM S. 0 = 1 rank, 1 = 2 ranks.

Defined at line 790 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

DdrChipWidthValue dimm_s_ddr_chip_width_select ()

The width of the DDR chips in DIMM S.

Defined at line 793 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_s_ddr_chip_width_select (DdrChipWidthValue val)

The width of the DDR chips in DIMM S.

Defined at line 793 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

typename SelfType::ValueType dimm_s_size_1gb ()

Size of DIMM S in multiples of 1GB.

Defined at line 798 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_s_size_1gb (typename SelfType::ValueType val)

Size of DIMM S in multiples of 1GB.

Defined at line 798 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

typename SelfType::ValueType dimm_l_built_from_8gb_modules ()

If true, DIMM L is built from 8 GB DRAM modules.

This bit is expected to be false on non-DDR3 configurations.

Defined at line 805 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_l_built_from_8gb_modules (typename SelfType::ValueType val)

If true, DIMM L is built from 8 GB DRAM modules.

This bit is expected to be false on non-DDR3 configurations.

Defined at line 805 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

typename SelfType::ValueType dimm_l_rank_count_minus_1 ()

The number of ranks in DIMM L. 0 = 1 rank, 1 = 2 ranks.

Defined at line 808 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_l_rank_count_minus_1 (typename SelfType::ValueType val)

The number of ranks in DIMM L. 0 = 1 rank, 1 = 2 ranks.

Defined at line 808 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

DdrChipWidthValue dimm_l_ddr_chip_width_select ()

The width of the DDR chips in DIMM L.

Defined at line 811 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_l_ddr_chip_width_select (DdrChipWidthValue val)

The width of the DDR chips in DIMM L.

Defined at line 811 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

typename SelfType::ValueType dimm_l_size_1gb ()

Size of DIMM L in multiples of 1GB.

Defined at line 816 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

template <, >

SelfType & set_dimm_l_size_1gb (typename SelfType::ValueType val)

Size of DIMM L in multiples of 1GB.

Defined at line 816 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

int dimm_s_ddr_chip_width ()

The width of the DDR chips in DIMM S.

Defined at line 819 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

int dimm_l_ddr_chip_width ()

The width of the DDR chips in DIMM L.

Defined at line 824 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

int dimm_s_rank_count ()

The number of ranks in DIMM S.

Defined at line 829 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

int dimm_l_rank_count ()

The number of ranks in DIMM L.

Defined at line 836 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

int dimm_s_size_mb ()

The size of DIMM S, in MB.

Defined at line 843 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

int dimm_l_size_mb ()

The size of DIMM L, in MB.

Defined at line 850 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

hwreg::RegisterAddr<MemoryAddressDecoderDimmParametersSkylake> GetForChannel (int channel_index)

Defined at line 856 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h

Enumerations

enum DdrChipWidthValue

Name	Value
kX8	0b00
kX16	0b01
kX32	0b10
kReserved	0b11

Defined at line 775 of file ../../src/graphics/display/drivers/intel-display/registers-memory-controller.h