class DekelPllClktop2HighSpeedClockControl
Defined at line 979 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
DKL_CLKTOP2_HSCLKCTL
PLL High-speed clock control register.
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev 2.0 Part 1, Pages 447-450
Public Members
field_high_speed_divider_ratio_selection_995
field_programmable_divider_ratio_selection_1005
Public Methods
template <, >
HighSpeedDividerRatioSelection high_speed_divider_ratio_selection ()
Field `od_clktop2_hsdiv_divratio`. Divider ratio selection for high speed
divider (DIV1).
Drivers can use helper method `high_speed_divider_ratio()` to get the
divider ratio in standard integer format.
Defined at line 995 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
template <, >
SelfType & set_high_speed_divider_ratio_selection (HighSpeedDividerRatioSelection val)
Field `od_clktop2_hsdiv_divratio`. Divider ratio selection for high speed
divider (DIV1).
Drivers can use helper method `high_speed_divider_ratio()` to get the
divider ratio in standard integer format.
Defined at line 995 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
template <, >
typename SelfType::ValueType programmable_divider_ratio_selection ()
Field `od_clktop2_dsdiv_divratio`. Divider radio settings for programmable
divider (DIV2).
Allowed values are 0 (No division), and from 1 (divide by 1; no division)
to 10 (divide by 10).
Drivers can use helper method `programmable_divider_ratio()` to get the
divider ratio in standard integer format.
Defined at line 1005 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
template <, >
SelfType & set_programmable_divider_ratio_selection (typename SelfType::ValueType val)
Field `od_clktop2_dsdiv_divratio`. Divider radio settings for programmable
divider (DIV2).
Allowed values are 0 (No division), and from 1 (divide by 1; no division)
to 10 (divide by 10).
Drivers can use helper method `programmable_divider_ratio()` to get the
divider ratio in standard integer format.
Defined at line 1005 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
uint32_t high_speed_divider_ratio ()
Helper method to get actual high speed divider ratio (DIV1).
This reads `high_speed_divider_ratio_selection` field and translates the
value into standard integer format.
Defined at line 1011 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
uint32_t programmable_divider_ratio ()
Helper method to get actual programmable divider ratio (DIV2).
This reads `programmable_divider_ratio` field and translates the
value into standard integer format.
Defined at line 1028 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
DekelRegisterAddr<DekelPllClktop2HighSpeedClockControl> GetForDdi (intel_display::DdiId ddi_id)
Defined at line 1040 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h
Enumerations
enum HighSpeedDividerRatioSelection
| Name | Value |
|---|---|
| k2 | 0b00 |
| k3 | 0b01 |
| k5 | 0b10 |
| k7 | 0b11 |
Valid values of field `high_speed_divider_ratio_selection` (defined below).
Defined at line 983 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h