class DekelTransmitterDisplayPortControl2

class DekelTransmitterDisplayPortControl2

Defined at line 1169 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h

DKL_TX_DPCNTL2

Dekel Transmitter DisplayPort Control Register #2 (?)

Each lane has its own DKL_TX_DPCNTL2 register.

Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev 2.0 Part 1, Page 478

Public Members

 field_display_port_20bit_mode_supported_1173

Public Methods

template <, >
typename SelfType::ValueType display_port_20bit_mode_supported ()

This needs to be set to 1 if Pipe width doesn't reflect the 20 bit mode.

Defined at line 1173 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h

template <, >
SelfType & set_display_port_20bit_mode_supported (typename SelfType::ValueType val)

This needs to be set to 1 if Pipe width doesn't reflect the 20 bit mode.

Defined at line 1173 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h

DekelRegisterAddr<DekelTransmitterDisplayPortControl2> GetForLaneDdi (uint32_t lane, intel_display::DdiId ddi_id)

Defined at line 1175 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h

Records