class MbusDisplayBufferBoxControl

Defined at line 601 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

MBUS_BBOX_CTL (MBus BBox Control)

Does not exist on Kaby Lake or Skylake, which don't have MBus.

BBoxes (Buffer Boxes) are the attachment points for the DBUF (Display Buffer)

slices.

All reserved bits in this register are MBZ (must be zero). So, the register

can be safely updated without reading it first.

Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 2 pages 10-11

DG1: IHD-OS-DG1-Vol 2c-2.21 Part 2 pages 10-11

Public Members

 field_enabled_605

 field_ring_stop_address_608

 field_RsvdZ_610

 field_max_back_to_back_transactions_618

 field_back_to_back_transaction_delay_621

 field_back_to_back_transactions_regulation_enabled_624

 field_RsvdZ_626

template <, >

typename SelfType::ValueType enabled ()

Read-only status bit.

Defined at line 605 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_enabled (typename SelfType::ValueType val)

Read-only status bit.

Defined at line 605 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType ring_stop_address ()

Read-only address of the box in the ring.

Defined at line 608 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_ring_stop_address (typename SelfType::ValueType val)

Read-only address of the box in the ring.

Defined at line 608 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType max_back_to_back_transactions ()

Ignored if `back_to_back_transactions_regulation_enabled` is false.

Used in conjunction with `back_to_back_transaction_delay` to limit the

number of back-to-back transactions sent from this box.

Zero is not a valid value.

Defined at line 618 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_max_back_to_back_transactions (typename SelfType::ValueType val)

Ignored if `back_to_back_transactions_regulation_enabled` is false.

Used in conjunction with `back_to_back_transaction_delay` to limit the

number of back-to-back transactions sent from this box.

Zero is not a valid value.

Defined at line 618 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType back_to_back_transaction_delay ()

Number of wait cycles after `max_back_to_back_transactions` is hit.

Defined at line 621 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_back_to_back_transaction_delay (typename SelfType::ValueType val)

Number of wait cycles after `max_back_to_back_transactions` is hit.

Defined at line 621 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType back_to_back_transactions_regulation_enabled ()

If true, B2B (back-to-back) transaction regulation fields are in effect.

Defined at line 624 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_back_to_back_transactions_regulation_enabled (typename SelfType::ValueType val)

If true, B2B (back-to-back) transaction regulation fields are in effect.

Defined at line 624 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

hwreg::RegisterAddr<MbusDisplayBufferBoxControl> GetForSlice (int slice_index)

`slice_index` is 0-based. Index 0 points to DBUF (Display Buffer) Slice 1.

Defined at line 629 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h