class DekelTransmitterPmdLaneSus

Defined at line 1191 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h

DKL_TX_PMD_LANE_SUS

Each lane has its own DKL_TX_PMD_LANE_SUS register.

Driver should flush all register bits to 0 at the time display driver

takes control of the PHY lane.

Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev 2.0 Part 1, Pages 482-483

Public Methods

DekelRegisterAddr<DekelTransmitterDisplayPortControl2> GetForLaneDdi (uint32_t lane, intel_display::DdiId ddi_id)

Defined at line 1193 of file ../../src/graphics/display/drivers/intel-display/registers-typec.h