class PchPanelPowerOffDelays
Defined at line 322 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h
PP_OFF_DELAYS (Panel Power Off Sequencing Delays)
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 2 page 963
DG1: IHD-OS-DG1-Vol 2c-2.21 Part 2 page 988
Kaby Lake: IHD-OS-KBL-Vol 2c-1.17 Part 2 page 629
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 2 page 623
Public Members
field_RsvdZ_324 field_video_end_to_power_off_delay_328 field_RsvdZ_330 field_backlight_off_to_video_end_delay_334Public Methods
template <, >SelfType & set_video_end_to_power_off_delay (typename SelfType::ValueType val)eDP T10 - Minimum delay from valid video data end to panel power disabled.
eDP T10 = register value * 100us.
Defined at line 328 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h
template <, >typename SelfType::ValueType video_end_to_power_off_delay ()eDP T10 - Minimum delay from valid video data end to panel power disabled.
eDP T10 = register value * 100us.
Defined at line 328 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h
template <, >typename SelfType::ValueType backlight_off_to_video_end_delay ()eDP T9 - Minimum delay from backlight disabled to valid video data end.
eDP T9 = register value * 100us.
Defined at line 334 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h
template <, >SelfType & set_backlight_off_to_video_end_delay (typename SelfType::ValueType val)eDP T9 - Minimum delay from backlight disabled to valid video data end.
eDP T9 = register value * 100us.
Defined at line 334 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h
hwreg::RegisterAddr<PchPanelPowerOffDelays> Get ()Defined at line 336 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h