class MbusPipeDataBoxControl

Defined at line 645 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

MBUS_DBOX_CTL (Pipe MBus DBox Control)

Does not exist on Kaby Lake or Skylake, which don't have MBus.

All reserved bits in this register are MBZ (must be zero). So, the register

can be safely updated without reading it first.

Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 2 pages 12-13

DG1: IHD-OS-DG1-Vol 2c-2.21 Part 2 pages 12-13

Public Members

 field_enabled_648

 field_ring_stop_address_651

 field_RsvdZ_653

 field_max_back_to_back_transactions_661

 field_back_to_back_transaction_delay_664

 field_back_to_back_transactions_regulation_enabled_667

 field_display_buffer_write_credits_673

 field_RsvdZ_675

 field_display_buffer_read_credits_681

 field_RsvdZ_683

 field_arbiter_read_credits_690

Public Methods

template <, >

typename SelfType::ValueType enabled ()

Read-only status bit.

Defined at line 648 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_enabled (typename SelfType::ValueType val)

Read-only status bit.

Defined at line 648 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType ring_stop_address ()

Read-only address of the box in the ring.

Defined at line 651 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_ring_stop_address (typename SelfType::ValueType val)

Read-only address of the box in the ring.

Defined at line 651 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType max_back_to_back_transactions ()

Ignored if `back_to_back_transactions_regulation_enabled` is false.

Used in conjunction with `back_to_back_transaction_delay` to limit the

number of back-to-back transactions sent from this box.

Zero is not a valid value.

Defined at line 661 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_max_back_to_back_transactions (typename SelfType::ValueType val)

Ignored if `back_to_back_transactions_regulation_enabled` is false.

Used in conjunction with `back_to_back_transaction_delay` to limit the

number of back-to-back transactions sent from this box.

Zero is not a valid value.

Defined at line 661 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType back_to_back_transaction_delay ()

Number of wait cycles after `max_back_to_back_transactions` is hit.

Defined at line 664 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_back_to_back_transaction_delay (typename SelfType::ValueType val)

Number of wait cycles after `max_back_to_back_transactions` is hit.

Defined at line 664 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType back_to_back_transactions_regulation_enabled ()

If true, B2B (back-to-back) transaction regulation fields are in effect.

Defined at line 667 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_back_to_back_transactions_regulation_enabled (typename SelfType::ValueType val)

If true, B2B (back-to-back) transaction regulation fields are in effect.

Defined at line 667 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType display_buffer_write_credits ()

BW credits used by the display pipe to write to the DBUF (Display Buffer).

These credits are used to write data regarding color-clear, WiDi (display

capture), and FBC (framebuffer compression).

Defined at line 673 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_display_buffer_write_credits (typename SelfType::ValueType val)

BW credits used by the display pipe to write to the DBUF (Display Buffer).

These credits are used to write data regarding color-clear, WiDi (display

capture), and FBC (framebuffer compression).

Defined at line 673 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType display_buffer_read_credits ()

B credits used by the display pipe to read from DBUF (Display Buffer).

The default value (0) is unsuitable for Display Engine operation. The PRM

recommends setting this field to 12.

Defined at line 681 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_display_buffer_read_credits (typename SelfType::ValueType val)

B credits used by the display pipe to read from DBUF (Display Buffer).

The default value (0) is unsuitable for Display Engine operation. The PRM

recommends setting this field to 12.

Defined at line 681 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

typename SelfType::ValueType arbiter_read_credits ()

A credits used by the display pipe to make requests to the Arbiter.

Arbiter requests cover pipe data, TLB (address translation lookaside

buffer), VTd (virtualization for directed IO), and MCS (Multi-sample

Control Surface, described in Vol 5).

Defined at line 690 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

template <, >

SelfType & set_arbiter_read_credits (typename SelfType::ValueType val)

A credits used by the display pipe to make requests to the Arbiter.

Arbiter requests cover pipe data, TLB (address translation lookaside

buffer), VTd (virtualization for directed IO), and MCS (Multi-sample

Control Surface, described in Vol 5).

Defined at line 690 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h

hwreg::RegisterAddr<MbusPipeDataBoxControl> GetForPipe (intel_display::PipeId pipe_id)

Defined at line 692 of file ../../src/graphics/display/drivers/intel-display/registers-arbiter.h