class PlaneSurfaceStride
Defined at line 111 of file ../../src/graphics/display/drivers/intel-display/registers-pipe.h
PLANE_STRIDE (Plane Stride)
This register is double-buffered. Changes are reflected at the start of the
next Vblank (vertical blank period) after the PLANE_SURF register is written.
This register can be written safely without reading it first. On Tiger Lake,
all reserved bits are explicitly documented as MBZ (must be zero). While this
is not the case for the Kaby Lake and Skylake, experiments and the OpenBSD
i915 driver suggest that writing zeros to the reserved bits is safe.
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 2 pages 832-836
Kaby Lake: IHD-OS-KBL-Vol 2c-1.17 Part 2 pages 603-606
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 2 page 598-600
Public Members
field_RsvdZ_115
field_stride_126
static const uint32_t kBaseAddr
Public Methods
template <, >
SelfType & set_stride (typename SelfType::ValueType val)
The stride of the plane.
Linear memory: the value is a cache line (64 bytes) count.
X-Tiled and Y-tiled memory: the value is a number of tiles.
The stride must not exceed the size of 8192 pixels.
On Kaby Lake and Skylake, the stride size must not exceed 32KB. On Kaby
Lake and Skylake, the stride field only takes up bits 9-0.
Defined at line 126 of file ../../src/graphics/display/drivers/intel-display/registers-pipe.h
template <, >
typename SelfType::ValueType stride ()
The stride of the plane.
Linear memory: the value is a cache line (64 bytes) count.
X-Tiled and Y-tiled memory: the value is a number of tiles.
The stride must not exceed the size of 8192 pixels.
On Kaby Lake and Skylake, the stride size must not exceed 32KB. On Kaby
Lake and Skylake, the stride field only takes up bits 9-0.
Defined at line 126 of file ../../src/graphics/display/drivers/intel-display/registers-pipe.h