class DdiPhyConfigEntry1
Defined at line 486 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
Part 1 of DDI_BUF_TRANS (DDI Buffer Translation)
Each DDI has 10 instances of the DDI_BUF_TRANS register, storing 10 entries
of the port's PHY configuration table. The MMIO addresses for the 10
instances are consecutive. The active entry is selected using the DDI_BUF_CTL
register.
Each DDI_BUF_TRANS register instance (storing one entry in the PHY
configuration table) consists of two 32-bit parts (double-words). We don't
know if it's safe to use 64-bit MMIO accesses with the registers.
DDI_BUF_TRANS is not documented on Tiger Lake or DG1.
Kaby Lake: IHD-OS-KBL-Vol 2c-1.17 Part 1 pages 446-447
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 1 pages 442-441
Public Members
field_balance_leg_enable_489 field_deemphasis_level_490Public Methods
template <, >typename SelfType::ValueType balance_leg_enable ()The PRMs do not go in depth on the meanings of the fields.
Defined at line 489 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
template <, >SelfType & set_balance_leg_enable (typename SelfType::ValueType val)The PRMs do not go in depth on the meanings of the fields.
Defined at line 489 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
template <, >typename SelfType::ValueType deemphasis_level ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 490 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
template <, >SelfType & set_deemphasis_level (typename SelfType::ValueType val)Defined at line 490 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
hwreg::RegisterAddr<DdiPhyConfigEntry1> GetDdiInstance (intel_display::DdiId ddi_id, int instance_index)Defined at line 492 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h