class DataBufferControl2
Defined at line 656 of file ../../src/graphics/display/drivers/intel-display/registers.h
DBUF_CTL (DBUF Slice Control 2)
All reserved bits are MBZ (must be zero), so this register can be written
safely without reading it first.
This register is not documented on Kaby Lake or Skylake.
Tiger Lake: IHD-OS-TGL-Vol 2c-12.21 Part 1 page 333
DG1: IHD-OS-DG1-Vol 2c-2.21 Part 1 page 311
Public Members
field_RsvdZ_658 field_hput_service_interval_663 field_aput_service_time_slots_668 field_bypass_put_service_time_slots_673Public Methods
template <, >typename SelfType::ValueType hput_service_interval ()Number of time slots between servicing HPUTs.
This field must not be set to zero.
Defined at line 663 of file ../../src/graphics/display/drivers/intel-display/registers.h
template <, >SelfType & set_hput_service_interval (typename SelfType::ValueType val)Number of time slots between servicing HPUTs.
This field must not be set to zero.
Defined at line 663 of file ../../src/graphics/display/drivers/intel-display/registers.h
template <, >typename SelfType::ValueType aput_service_time_slots ()Number of time slots dedicated to servicing APUTs.
This field must not be set to zero.
Defined at line 668 of file ../../src/graphics/display/drivers/intel-display/registers.h
template <, >SelfType & set_aput_service_time_slots (typename SelfType::ValueType val)Number of time slots dedicated to servicing APUTs.
This field must not be set to zero.
Defined at line 668 of file ../../src/graphics/display/drivers/intel-display/registers.h
template <, >typename SelfType::ValueType bypass_put_service_time_slots ()Number of time slots dedicated to servicing BYPASS puts.
This field must not be set to zero.
Defined at line 673 of file ../../src/graphics/display/drivers/intel-display/registers.h
template <, >SelfType & set_bypass_put_service_time_slots (typename SelfType::ValueType val)Number of time slots dedicated to servicing BYPASS puts.
This field must not be set to zero.
Defined at line 673 of file ../../src/graphics/display/drivers/intel-display/registers.h
hwreg::RegisterAddr<DataBufferControl2> GetForSlice (int slice_index)DBUF (Data Buffer) slice count varies by display engine.
`slice_index` is 0-based.
Defined at line 678 of file ../../src/graphics/display/drivers/intel-display/registers.h