class DisplayPllDivider

Defined at line 1024 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

DPLL_DIV0 (Display PLL frequency Divider?)

Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 1 pages 653-654

Public Members

 field_true_lock_criteria_select_1026

 field_early_lock_criteria_select_1027

 field_automatic_frequency_calibration_start_point_select_1028

 field_feedback_clock_retiming_enabled_1030

 field_loop_filter_gain_control_1033

 field_loop_filter_integral_coefficient_exponent_1038

 field_loop_filter_proportional_coefficient_exponent_1041

 field_feedback_pre_divider_1044

 field_feedback_post_divider_1047

Public Methods

template <, >

SelfType & set_true_lock_criteria_select (typename SelfType::ValueType val)

Defined at line 1026 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType true_lock_criteria_select ()

NOLINTEND(misc-non-private-member-variables-in-classes)

Defined at line 1026 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType early_lock_criteria_select ()

NOLINTEND(misc-non-private-member-variables-in-classes)

Defined at line 1027 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_early_lock_criteria_select (typename SelfType::ValueType val)

Defined at line 1027 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType automatic_frequency_calibration_start_point_select ()

NOLINTEND(misc-non-private-member-variables-in-classes)

Defined at line 1028 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_automatic_frequency_calibration_start_point_select (typename SelfType::ValueType val)

Defined at line 1028 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType feedback_clock_retiming_enabled ()

NOLINTEND(misc-non-private-member-variables-in-classes)

Defined at line 1030 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_feedback_clock_retiming_enabled (typename SelfType::ValueType val)

Defined at line 1030 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType loop_filter_gain_control ()

Both loop filter coefficients are shifted right by this value.

Defined at line 1033 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_loop_filter_gain_control (typename SelfType::ValueType val)

Both loop filter coefficients are shifted right by this value.

Defined at line 1033 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType loop_filter_integral_coefficient_exponent ()

The loop filter's integral coefficient = 2 ^ (-field value).

The maximum allowed value is 11.

Defined at line 1038 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_loop_filter_integral_coefficient_exponent (typename SelfType::ValueType val)

The loop filter's integral coefficient = 2 ^ (-field value).

The maximum allowed value is 11.

Defined at line 1038 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType loop_filter_proportional_coefficient_exponent ()

The loop filter's proportional coefficient = 2 ^ (1 - value).

Defined at line 1041 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_loop_filter_proportional_coefficient_exponent (typename SelfType::ValueType val)

The loop filter's proportional coefficient = 2 ^ (1 - value).

Defined at line 1041 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType feedback_pre_divider ()

The pre-division feedback loop divider. Only 2 and 4 are valid dividers.

Defined at line 1044 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_feedback_pre_divider (typename SelfType::ValueType val)

The pre-division feedback loop divider. Only 2 and 4 are valid dividers.

Defined at line 1044 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

typename SelfType::ValueType feedback_post_divider ()

The post-division feedback loop divider. Also known as the M2 coefficient.

Defined at line 1047 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

template <, >

SelfType & set_feedback_post_divider (typename SelfType::ValueType val)

The post-division feedback loop divider. Also known as the M2 coefficient.

Defined at line 1047 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

int8_t true_lock_criteria_cycles ()

Number of consecutive cycles of low phase error for early -> true lock.

If the phase error is below the threshold for this many cycles after the

early lock indicator, the PLL asserts the (external) PLL locked signal.

Defined at line 1053 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

DisplayPllDivider & set_true_lock_criteria_cycles (int8_t cycles)

See `true_lock_criteria_cycles()` for details.

Defined at line 1059 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

int8_t early_lock_criteria_cycles ()

Number of consecutive cycles of low phase error for early lock.

Once the phase error is below the threshold for this many cycles, the PLL

asserts the early lock indicator.

Defined at line 1071 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

DisplayPllDivider & set_early_lock_criteria_cycles (int8_t cycles)

See `early_lock_criteria_cycles()` for details.

Defined at line 1077 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

int16_t automatic_frequency_calibration_start_point ()

The AFC (Automatic Frequency Calibration) start point.

Defined at line 1086 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

DisplayPllDivider & set_automatic_frequency_calibration_start_point (int16_t start_point)

See `automatic_frequency_calibration_start_point()` for details.

Defined at line 1100 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h

hwreg::RegisterAddr<DisplayPllDivider> GetForDpll (intel_display::PllId pll_id)

Defined at line 1109 of file ../../src/graphics/display/drivers/intel-display/registers-dpll.h