class SdeInterruptBase
Defined at line 37 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
Interrupt registers for the south (in the PCH) display engine.
SINTERRUPT is made up of the interrupt registers below.
- ISR (Interrupt Status Register), also abbreviated to SDE_ISR
- IMR (Interrupt Mask Register), also abbreviated to SDE_IMR
- IIR (Interrupt Identity Register), also abbreviated to SDE_IIR
- IER (Interrupt Enable Register), also abbreviated to SDE_IER
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 2 pages 1196-1197
Kaby Lake: IHD-OS-KBL-Vol 2c-1.17 Part 2 pages 820-821
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 2 pages 800-801
The individual bits in each register are covered in the South Display Engine
Interrupt Bit Definition, or SDE_INTERRUPT.
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 2 pages 1262-1264
DG1: IHD-OS-DG1-Vol 2c-2.21 Part 2 pages 1328-1329
Kaby Lake: IHD-OS-KBL-Vol 2c-1.17 Part 2 pages 874-875
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 2 pages 854-855
Public Members
field_gmbus_45static const uint32_t kSdeIntMaskstatic const uint32_t kSdeIntIdentitystatic const uint32_t kSdeIntEnablePublic Methods
template <, >typename SelfType::ValueType gmbus ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 45 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
template <, >SelfType & set_gmbus (typename SelfType::ValueType val)Defined at line 45 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
hwreg::BitfieldRef<uint32_t> skl_ddi_bit (intel_display::DdiId ddi_id)Defined at line 47 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
hwreg::BitfieldRef<uint32_t> icl_ddi_bit (intel_display::DdiId ddi_id)Defined at line 67 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h
hwreg::RegisterAddr<SdeInterruptBase> Get (uint32_t offset)Defined at line 89 of file ../../src/graphics/display/drivers/intel-display/registers-ddi.h