class PowerWellControl
Defined at line 356 of file ../../src/graphics/display/drivers/intel-display/registers.h
PWR_WELL_CTL
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 2 page 690-693
Tiger Lake: IHD-OS-TGL-Vol 2c-12.21 Part 2 pages 1063-1065
Public Methods
hwreg::BitfieldRef<uint32_t> power_request (size_t index)Defined at line 358 of file ../../src/graphics/display/drivers/intel-display/registers.h
hwreg::BitfieldRef<uint32_t> power_state (size_t index)Defined at line 366 of file ../../src/graphics/display/drivers/intel-display/registers.h
hwreg::BitfieldRef<uint32_t> ddi_io_power_request_skylake (intel_display::DdiId ddi_id)Defined at line 374 of file ../../src/graphics/display/drivers/intel-display/registers.h
hwreg::BitfieldRef<uint32_t> ddi_io_power_state_skylake (intel_display::DdiId ddi_id)Defined at line 383 of file ../../src/graphics/display/drivers/intel-display/registers.h
hwreg::BitfieldRef<uint32_t> misc_io_power_request_skylake ()Misc IO Power Request (on Skylake / Kaby Lake only)
This field requests power for Miscellaneous IO to enable (1) or disable (0).
This includes all AUX channels, audio pins, and utility pin.
Defined at line 393 of file ../../src/graphics/display/drivers/intel-display/registers.h
hwreg::BitfieldRef<uint32_t> misc_io_power_state_skylake ()Misc IO Power State (on Skylake / Kaby Lake only):
Enabled (1) or disabled (0).
Defined at line 400 of file ../../src/graphics/display/drivers/intel-display/registers.h
hwreg::RegisterAddr<PowerWellControl> Get ()Defined at line 405 of file ../../src/graphics/display/drivers/intel-display/registers.h