class TranscoderLinkN
Defined at line 758 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
LINKN / TRANS_LINKN1 (Transcoder Link N Value 1)
Updating this register triggers an update of all double-buffered M/N
registers (DATAM, DATAN, LINKM, LINKN) for the transcoder.
All unassigned bits in this register are MBZ (must be zero), so it's safe to
assign this register without reading its old value.
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 1 page 1301
Kaby Lake: IHD-OS-KBL-Vol 2c-1.17 Part 1 page 1124
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 1 pages 1114-1115
Public Members
field_RsvdZ_760
field_n_764
Public Methods
template <, >
typename SelfType::ValueType n ()
The N value in the link M/N ratio transmitted in the MSA packet. This is
also transmitted in the VB-ID (Vertical Blanking ID).
Defined at line 764 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
template <, >
SelfType & set_n (typename SelfType::ValueType val)
The N value in the link M/N ratio transmitted in the MSA packet. This is
also transmitted in the VB-ID (Vertical Blanking ID).
Defined at line 764 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
hwreg::RegisterAddr<TranscoderLinkN> GetForKabyLakeTranscoder (intel_display::TranscoderId transcoder_id)
Defined at line 766 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
hwreg::RegisterAddr<TranscoderLinkN> GetForTigerLakeTranscoder (intel_display::TranscoderId transcoder_id)
Defined at line 777 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h