class TranscoderLinkM
Defined at line 718 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
LINKM / TRANS_LINKM1 (Transcoder Link M Value 1)
This register is double-buffered and the update triggers when the first
MSA (Main Stream Attributes packet) that is sent after LINKN is modified.
All unassigned bits in this register are MBZ (must be zero), so it's safe to
assign this register without reading its old value.
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 1 page 1300
Kaby Lake: IHD-OS-KBL-Vol 2c-1.17 Part 1 page 1123
Skylake: IHD-OS-SKL-Vol 2c-05.16 Part 1 pages 1112-1113
Public Members
field_RsvdZ_720 field_m_723Public Methods
template <, >typename SelfType::ValueType m ()The M value in the link M/N ratio transmitted in the MSA packet.
Defined at line 723 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
template <, >SelfType & set_m (typename SelfType::ValueType val)The M value in the link M/N ratio transmitted in the MSA packet.
Defined at line 723 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
hwreg::RegisterAddr<TranscoderLinkM> GetForKabyLakeTranscoder (intel_display::TranscoderId transcoder_id)Defined at line 725 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h
hwreg::RegisterAddr<TranscoderLinkM> GetForTigerLakeTranscoder (intel_display::TranscoderId transcoder_id)Defined at line 736 of file ../../src/graphics/display/drivers/intel-display/registers-transcoder.h