class PortCommonLane5
Defined at line 106 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
PORT_CL_DW5 (PHY Common Lane config double-word 5?)
"Common Lane" functionality is centralized across all lanes in a PHY, and
placed in a single power gate.
All the bits in this register are documented, so it is safe to update this
register without reading it first.
This register is not documented on Kaby Lake or Skylake.
Tiger Lake: IHD-OS-TGL-Vol 2c-1.22-Rev2.0 Part 2 pages 885-886
DG1: IHD-OS-DG1-Vol 2c-2.21 Part 2 pages 897-898
Ice Lake: IHD-OS-ICLLP-Vol 2c-1.22-Rev2.0 Part 2 pages 553-554
Public Members
field_force_109 field_RsvdZ_111 field_fuse_valid_reset_113 field_fuse_valid_override_114 field_fuse_repull_115 field_common_register_interface_clock_count_max_116 field_RsvdZ_117 field_onchip_system_fabric_presence_detection_count_120 field_RsvdZ_121 field_onchip_system_fabric_clock_divider_select_122 field_downlink_broadcast_enable_125 field_RsvdZ_127 field_port_staggering_enabled_128 field_power_gate_staggering_control_disabled_129 field_common_lane_power_down_enabled_130 field_common_register_interface_clock_select_131 field_phy_power_ack_override_132 field_suspend_clock_config_133Public Methods
template <, >typename SelfType::ValueType force ()Undocumented semantics.
Defined at line 109 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_force (typename SelfType::ValueType val)Undocumented semantics.
Defined at line 109 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType fuse_valid_reset ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 113 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_fuse_valid_reset (typename SelfType::ValueType val)Defined at line 113 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType fuse_valid_override ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 114 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_fuse_valid_override (typename SelfType::ValueType val)Defined at line 114 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType fuse_repull ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 115 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_fuse_repull (typename SelfType::ValueType val)Defined at line 115 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType common_register_interface_clock_count_max ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 116 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_common_register_interface_clock_count_max (typename SelfType::ValueType val)Defined at line 116 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType onchip_system_fabric_presence_detection_count ()IOSF PD (Intel On-chip System Fabric Presence Detection) count.
Defined at line 120 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_onchip_system_fabric_presence_detection_count (typename SelfType::ValueType val)IOSF PD (Intel On-chip System Fabric Presence Detection) count.
Defined at line 120 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType onchip_system_fabric_clock_divider_select ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 122 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_onchip_system_fabric_clock_divider_select (typename SelfType::ValueType val)Defined at line 122 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType downlink_broadcast_enable ()If true, all transmitters are programmed by writes to group addresses.
Defined at line 125 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_downlink_broadcast_enable (typename SelfType::ValueType val)If true, all transmitters are programmed by writes to group addresses.
Defined at line 125 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType port_staggering_enabled ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 128 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_port_staggering_enabled (typename SelfType::ValueType val)Defined at line 128 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType power_gate_staggering_control_disabled ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 129 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_power_gate_staggering_control_disabled (typename SelfType::ValueType val)Defined at line 129 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType common_lane_power_down_enabled ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 130 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_common_lane_power_down_enabled (typename SelfType::ValueType val)Defined at line 130 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType common_register_interface_clock_select ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 131 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_common_register_interface_clock_select (typename SelfType::ValueType val)Defined at line 131 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType phy_power_ack_override ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 132 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_phy_power_ack_override (typename SelfType::ValueType val)Defined at line 132 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >SelfType & set_suspend_clock_config (typename SelfType::ValueType val)Defined at line 133 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
template <, >typename SelfType::ValueType suspend_clock_config ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 133 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h
hwreg::RegisterAddr<PortCommonLane5> GetForDdi (intel_display::DdiId ddi_id)Defined at line 135 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h