class PortCommonLane0

Defined at line 80 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h

Undocumented register PORT_CL_DW0 / PHY Common Lane config double-word 0?

This definition is currently only used as a host for MmioAddressForDdi().

Public Methods

uint32_t MmioAddressForDdi (intel_display::DdiId ddi_id)

Returns the base address of the PORT_CL_ configuration registers for a intel_display::DdiId.

Defined at line 83 of file ../../src/graphics/display/drivers/intel-display/registers-ddi-phy-tiger-lake.h