struct
Defined at line 219 of file ../../src/graphics/display/drivers/intel-display/registers-pch.h
The raw clock frequency in MHz.
This must be set to 24MHz on Kaby Lake and Skylake. Must be zero on Tiger
Lake and DG1.
Kaby Lake: IHD-OS-KBL-Vol 12-1.17 page 195
Skylake: IHD-OS-SKL-Vol 12-05.16 page 188
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Field field