struct DdiPllConfig

Defined at line 32 of file ../../src/graphics/display/drivers/intel-display/dpll.h

High-level configuration of a PLL that serves as a DDI clock source.

The information included here is used to decide whether a PLL (Phase-Locked

Loop circuit) that is already configured in a certain way can serve as the

clock source for a DDI that is being configured.

This structure omits some low-level details needed to configure a PLL for DDI

usage. The omitted details are fully determined by (and can be derived from)

the information here.

The default-constructed instance is an empty value.

Public Members

int32_t ddi_clock_khz

bool spread_spectrum_clocking

bool admits_display_port

bool admits_hdmi

bool IsValid ()

True for configurations that may lead to correct hardware operation.

This method is intended to be used as a precondition check. Invalid

configurations are definitely not suitable for use with hardware.

Defined at line 25 of file ../../src/graphics/display/drivers/intel-display/dpll.cc

bool IsEmpty ()

True for invalid configurations that mean "no value".

The empty value is intended for reporting "not found" errors, such as

not finding a valid configuration that meets some constraints.

Defined at line 58 of file ../../src/graphics/display/drivers/intel-display/dpll.h