class DpllSkylake

Defined at line 238 of file ../../src/graphics/display/drivers/intel-display/dpll.h

DPLL (Display PLL) for Kaby Lake and Skylake display engines.

DPLLs are shareable across multiple DDIs. DPLL 0 is special-cased on Kaby

Lake and Skylake, because its VCO (Voltage-Controlled Oscillator) output is

also used to drive the CDCLK (core display clock).

Public Methods

void DpllSkylake (fdf::MmioBuffer * mmio_space, PllId pll_id)

Defined at line 197 of file ../../src/graphics/display/drivers/intel-display/dpll.cc

void ~DpllSkylake ()

Defined at line 241 of file ../../src/graphics/display/drivers/intel-display/dpll.h

bool DoEnable (const DdiPllConfig & pll_config)

DisplayPll overrides:

Defined at line 200 of file ../../src/graphics/display/drivers/intel-display/dpll.cc

bool DoDisable ()

Defined at line 308 of file ../../src/graphics/display/drivers/intel-display/dpll.cc