struct ExamplePagingTraits

Defined at line 95 of file ../../zircon/kernel/lib/arch/include/lib/arch/paging.h

ExamplePagingTraits defines the "PagingTraits" API, being a coded examplar

intended for documentation purposes only. Parameterizing the creation of

virtual memory spaces, the traits are used to abstract away finicky paging

business logic across that differs across CPU architectures (or IOMMU

translation schemes). The resulting uniform API can than be used for a

generic approach to address translation and page mapping.

Public Members

static const unsigned int kMaxPhysicalAddressSize

static const std::array kLevels

static const unsigned int kTableAlignmentLog2

static const unsigned int kNumTableEntriesLog2

static const bool kExecuteOnlyAllowed

static const bool kNonTerminalAccessPermissions

static const auto kVirtualAddressExtension

template <LevelType Level>

bool LevelCanBeTerminal (const SystemState & state)

Whether the given level can generally feature terminal entries.

Defined at line 271 of file ../../zircon/kernel/lib/arch/include/lib/arch/paging.h

enum LevelType

Name	Value
kExampleLevel	0

An enum or integral type describing the levels of paging. Rather than

mandate that this be an integral type, we leave room for the enum to

support the use of context-specific names for each level. This is done

for two reasons:

* Some architectures do not label their paging levels with numbers

(e.g., x86's "page directory pointer table"), so allowing for the use

of more recognizable names aids in readability (especially when it

comes to cross-referencing with the manual);

* Architectures that do label levels with numbers have inconsistent

conventions: for example, ARM paging levels range from -1 up to 3,

while RISC-V's range from 4 down to 0.

Defined at line 110 of file ../../zircon/kernel/lib/arch/include/lib/arch/paging.h