template <RiscvPagingLevel Level>class TableEntry
Defined at line 163 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
Public Members
field_n_176 field_pbmt_180 field_ppn_187 field_rsw_190 field_d_192 field_a_193 field_g_194 field_u_195 field_x_200 field_w_201 field_r_202 field_v_206Public Methods
template <, >typename SelfType::ValueType n ()When the Svnapot extension is available, setting the N bit means that
this PTE is part of a larger Naturally Aligned Power-of-2 (NAPOT) range.
The low bits of PPN indicate what power of 2 is the actual granularity of
range. The hardware is free to assume that all the PTEs for the whole
range all have the N bit set and the access control bits (5..0) set the
same, so it can use a single TLB entry to represent the multiple PTEs in
the whole NAPOT range.
Defined at line 176 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_n (typename SelfType::ValueType val)When the Svnapot extension is available, setting the N bit means that
this PTE is part of a larger Naturally Aligned Power-of-2 (NAPOT) range.
The low bits of PPN indicate what power of 2 is the actual granularity of
range. The hardware is free to assume that all the PTEs for the whole
range all have the N bit set and the access control bits (5..0) set the
same, so it can use a single TLB entry to represent the multiple PTEs in
the whole NAPOT range.
Defined at line 176 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >MemoryType pbmt ()These bits are always RES0 in non-leaf PTEs. When the Svpbmt extension
is available, in leaf PTEs they set the type of physical memory access.
Defined at line 180 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_pbmt (MemoryType val)These bits are always RES0 in non-leaf PTEs. When the Svpbmt extension
is available, in leaf PTEs they set the type of physical memory access.
Defined at line 180 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType ppn ()In an entry acting as the last level the physical address must have the
same alignment as the virtual address: 4KiB, 2MiB, 1GiB, or 512GiB. The
low 12 bits that must always be zero aren't stored in the PTE.
Defined at line 187 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_ppn (typename SelfType::ValueType val)In an entry acting as the last level the physical address must have the
same alignment as the virtual address: 4KiB, 2MiB, 1GiB, or 512GiB. The
low 12 bits that must always be zero aren't stored in the PTE.
Defined at line 187 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType rsw ()These bits are available for software use. The hardware ignores them.
Defined at line 190 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_rsw (typename SelfType::ValueType val)These bits are available for software use. The hardware ignores them.
Defined at line 190 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType d ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 192 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_d (typename SelfType::ValueType val)Defined at line 192 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType a ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 193 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_a (typename SelfType::ValueType val)Defined at line 193 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType g ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 194 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_g (typename SelfType::ValueType val)Defined at line 194 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_u (typename SelfType::ValueType val)Defined at line 195 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType u ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 195 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_x (typename SelfType::ValueType val)--- (XWR all clear) means the PPN is a next-level page table.
-W- and XW- (R clear) are reserved for future use.
All other combinations have their natural meanings.
Defined at line 200 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType x ()--- (XWR all clear) means the PPN is a next-level page table.
-W- and XW- (R clear) are reserved for future use.
All other combinations have their natural meanings.
Defined at line 200 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_w (typename SelfType::ValueType val)Defined at line 201 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType w ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 201 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType r ()NOLINTEND(misc-non-private-member-variables-in-classes)
Defined at line 202 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_r (typename SelfType::ValueType val)Defined at line 202 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >SelfType & set_v (typename SelfType::ValueType val)If V is clear, then hardware ignores all other bits and they can be used
for software purposes.
Defined at line 206 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
template <, >typename SelfType::ValueType v ()If V is clear, then hardware ignores all other bits and they can be used
for software purposes.
Defined at line 206 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool present ()This implements the PagingTraits::TableEntry API defined in
<lib
/arch/paging.h>.
Defined at line 213 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
uint64_t address ()Defined at line 215 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool terminal ()Defined at line 217 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool readable ()Defined at line 219 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool writable ()Defined at line 220 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool executable ()Defined at line 221 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool user_accessible ()Defined at line 222 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
RiscvMemoryType Memory (const SystemState & state)Defined at line 224 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool accessed ()Defined at line 226 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
bool global ()Defined at line 228 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h
SelfType & Set (const SystemState & state, const PagingSettings & settings)Defined at line 230 of file ../../zircon/kernel/lib/arch/include/lib/arch/riscv64/paging-traits.h