use fidl::unpersist;
use fidl_cf_sc_internal_timekeeperconfig::Config as FidlConfig;
use fuchsia_inspect::Node;
use fuchsia_runtime::{take_startup_handle, HandleInfo, HandleType};
use fuchsia_zircon as zx;
#[derive(Debug)]
pub struct Config {
pub back_off_time_between_pull_samples_sec: i64,
pub disable_delays: bool,
pub early_exit: bool,
pub first_sampling_delay_sec: i64,
pub initial_frequency_ppm: u32,
pub max_frequency_error_ppm: u32,
pub monitor_time_source_url: String,
pub monitor_uses_pull: bool,
pub oscillator_error_std_dev_ppm: u32,
pub power_topology_integration_enabled: bool,
pub primary_time_source_url: String,
pub primary_uses_pull: bool,
pub rtc_is_read_only: bool,
pub utc_start_at_startup: bool,
}
impl Config {
pub fn take_from_startup_handle() -> Self {
let config_vmo: zx::Vmo =
take_startup_handle(HandleInfo::new(HandleType::ComponentConfigVmo, 0))
.expect("Config VMO handle must be provided and cannot already have been taken.")
.into();
let config_size =
config_vmo.get_content_size().expect("must be able to read config vmo content size");
assert_ne!(config_size, 0, "config vmo must be non-empty");
let mut config_bytes = Vec::new();
config_bytes.resize(config_size as usize, 0);
config_vmo.read(&mut config_bytes, 0).expect("must be able to read config vmo");
let checksum_length = u16::from_le_bytes([config_bytes[0], config_bytes[1]]) as usize;
let fidl_start = 2 + checksum_length;
let observed_checksum = &config_bytes[2..fidl_start];
let expected_checksum = vec![
0x74, 0xdc, 0x93, 0xf6, 0x61, 0xd8, 0x2c, 0x20, 0x26, 0xc4, 0x18, 0xda, 0x2f, 0xfa,
0xe3, 0xbc, 0x19, 0x04, 0xf9, 0xed, 0x75, 0x68, 0x38, 0x13, 0xf8, 0x5d, 0x33, 0x5d,
0xff, 0xea, 0xfc, 0xd0,
];
assert_eq!(
observed_checksum, expected_checksum,
"checksum from config VMO does not match expected checksum"
);
let fidl_config: FidlConfig = unpersist(&config_bytes[fidl_start..])
.expect("must be able to parse bytes as config FIDL");
Self {
back_off_time_between_pull_samples_sec: fidl_config
.back_off_time_between_pull_samples_sec,
disable_delays: fidl_config.disable_delays,
early_exit: fidl_config.early_exit,
first_sampling_delay_sec: fidl_config.first_sampling_delay_sec,
initial_frequency_ppm: fidl_config.initial_frequency_ppm,
max_frequency_error_ppm: fidl_config.max_frequency_error_ppm,
monitor_time_source_url: fidl_config.monitor_time_source_url,
monitor_uses_pull: fidl_config.monitor_uses_pull,
oscillator_error_std_dev_ppm: fidl_config.oscillator_error_std_dev_ppm,
power_topology_integration_enabled: fidl_config.power_topology_integration_enabled,
primary_time_source_url: fidl_config.primary_time_source_url,
primary_uses_pull: fidl_config.primary_uses_pull,
rtc_is_read_only: fidl_config.rtc_is_read_only,
utc_start_at_startup: fidl_config.utc_start_at_startup,
}
}
pub fn record_inspect(&self, inspector_node: &Node) {
inspector_node.record_int(
"back_off_time_between_pull_samples_sec",
self.back_off_time_between_pull_samples_sec,
);
inspector_node.record_bool("disable_delays", self.disable_delays);
inspector_node.record_bool("early_exit", self.early_exit);
inspector_node.record_int("first_sampling_delay_sec", self.first_sampling_delay_sec);
inspector_node.record_uint("initial_frequency_ppm", self.initial_frequency_ppm as u64);
inspector_node.record_uint("max_frequency_error_ppm", self.max_frequency_error_ppm as u64);
inspector_node.record_string("monitor_time_source_url", &self.monitor_time_source_url);
inspector_node.record_bool("monitor_uses_pull", self.monitor_uses_pull);
inspector_node
.record_uint("oscillator_error_std_dev_ppm", self.oscillator_error_std_dev_ppm as u64);
inspector_node.record_bool(
"power_topology_integration_enabled",
self.power_topology_integration_enabled,
);
inspector_node.record_string("primary_time_source_url", &self.primary_time_source_url);
inspector_node.record_bool("primary_uses_pull", self.primary_uses_pull);
inspector_node.record_bool("rtc_is_read_only", self.rtc_is_read_only);
inspector_node.record_bool("utc_start_at_startup", self.utc_start_at_startup);
}
}