1#![warn(clippy::all)]
3#![allow(unused_parens, unused_variables, unused_mut, unused_imports, unreachable_code)]
4
5pub mod natural {
6
7 pub use fidl_next_common_fuchsia_hardware_spiimpl::natural::*;
8
9 #[derive(Debug, PartialEq)]
10 pub struct SpiImplRegisterVmoRequest {
11 pub chip_select: u32,
12
13 pub vmo_id: u32,
14
15 pub vmo: ::fidl_next_fuchsia_mem::natural::Range,
16
17 pub rights: ::fidl_next_fuchsia_hardware_sharedmemory::natural::SharedVmoRight,
18 }
19
20 unsafe impl<___E> ::fidl_next::Encode<crate::wire::SpiImplRegisterVmoRequest, ___E>
21 for SpiImplRegisterVmoRequest
22 where
23 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
24 ___E: ::fidl_next::fuchsia::HandleEncoder,
25 {
26 #[inline]
27 fn encode(
28 self,
29 encoder_: &mut ___E,
30 out_: &mut ::core::mem::MaybeUninit<crate::wire::SpiImplRegisterVmoRequest>,
31 _: (),
32 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
33 ::fidl_next::munge! {
34 let crate::wire::SpiImplRegisterVmoRequest {
35 chip_select,
36 vmo_id,
37 vmo,
38 rights,
39
40 } = out_;
41 }
42
43 ::fidl_next::Encode::encode(self.chip_select, encoder_, chip_select, ())?;
44
45 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(chip_select.as_mut_ptr()) };
46
47 ::fidl_next::Encode::encode(self.vmo_id, encoder_, vmo_id, ())?;
48
49 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(vmo_id.as_mut_ptr()) };
50
51 ::fidl_next::Encode::encode(self.vmo, encoder_, vmo, ())?;
52
53 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(vmo.as_mut_ptr()) };
54
55 ::fidl_next::Encode::encode(self.rights, encoder_, rights, ())?;
56
57 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(rights.as_mut_ptr()) };
58
59 Ok(())
60 }
61 }
62
63 unsafe impl<___E>
64 ::fidl_next::EncodeOption<
65 ::fidl_next::wire::Box<'static, crate::wire::SpiImplRegisterVmoRequest>,
66 ___E,
67 > for SpiImplRegisterVmoRequest
68 where
69 ___E: ::fidl_next::Encoder + ?Sized,
70 SpiImplRegisterVmoRequest:
71 ::fidl_next::Encode<crate::wire::SpiImplRegisterVmoRequest, ___E>,
72 {
73 #[inline]
74 fn encode_option(
75 this: ::core::option::Option<Self>,
76 encoder: &mut ___E,
77 out: &mut ::core::mem::MaybeUninit<
78 ::fidl_next::wire::Box<'static, crate::wire::SpiImplRegisterVmoRequest>,
79 >,
80 _: (),
81 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
82 if let Some(inner) = this {
83 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
84 ::fidl_next::wire::Box::encode_present(out);
85 } else {
86 ::fidl_next::wire::Box::encode_absent(out);
87 }
88
89 Ok(())
90 }
91 }
92
93 impl ::fidl_next::FromWire<crate::wire::SpiImplRegisterVmoRequest> for SpiImplRegisterVmoRequest {
94 #[inline]
95 fn from_wire(wire: crate::wire::SpiImplRegisterVmoRequest) -> Self {
96 Self {
97 chip_select: ::fidl_next::FromWire::from_wire(wire.chip_select),
98
99 vmo_id: ::fidl_next::FromWire::from_wire(wire.vmo_id),
100
101 vmo: ::fidl_next::FromWire::from_wire(wire.vmo),
102
103 rights: ::fidl_next::FromWire::from_wire(wire.rights),
104 }
105 }
106 }
107
108 #[derive(Debug, PartialEq)]
109 #[repr(C)]
110 pub struct SpiImplUnregisterVmoResponse {
111 pub vmo: ::fidl_next::fuchsia::zx::Vmo,
112 }
113
114 unsafe impl<___E> ::fidl_next::Encode<crate::wire::SpiImplUnregisterVmoResponse, ___E>
115 for SpiImplUnregisterVmoResponse
116 where
117 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
118 ___E: ::fidl_next::fuchsia::HandleEncoder,
119 {
120 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
121 Self,
122 crate::wire::SpiImplUnregisterVmoResponse,
123 > = unsafe {
124 ::fidl_next::CopyOptimization::enable_if(
125 true && <::fidl_next::fuchsia::zx::Vmo as ::fidl_next::Encode<
126 ::fidl_next::wire::fuchsia::Vmo,
127 ___E,
128 >>::COPY_OPTIMIZATION
129 .is_enabled(),
130 )
131 };
132
133 #[inline]
134 fn encode(
135 self,
136 encoder_: &mut ___E,
137 out_: &mut ::core::mem::MaybeUninit<crate::wire::SpiImplUnregisterVmoResponse>,
138 _: (),
139 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
140 ::fidl_next::munge! {
141 let crate::wire::SpiImplUnregisterVmoResponse {
142 vmo,
143
144 } = out_;
145 }
146
147 ::fidl_next::Encode::encode(self.vmo, encoder_, vmo, ())?;
148
149 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(vmo.as_mut_ptr()) };
150
151 Ok(())
152 }
153 }
154
155 unsafe impl<___E>
156 ::fidl_next::EncodeOption<
157 ::fidl_next::wire::Box<'static, crate::wire::SpiImplUnregisterVmoResponse>,
158 ___E,
159 > for SpiImplUnregisterVmoResponse
160 where
161 ___E: ::fidl_next::Encoder + ?Sized,
162 SpiImplUnregisterVmoResponse:
163 ::fidl_next::Encode<crate::wire::SpiImplUnregisterVmoResponse, ___E>,
164 {
165 #[inline]
166 fn encode_option(
167 this: ::core::option::Option<Self>,
168 encoder: &mut ___E,
169 out: &mut ::core::mem::MaybeUninit<
170 ::fidl_next::wire::Box<'static, crate::wire::SpiImplUnregisterVmoResponse>,
171 >,
172 _: (),
173 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
174 if let Some(inner) = this {
175 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
176 ::fidl_next::wire::Box::encode_present(out);
177 } else {
178 ::fidl_next::wire::Box::encode_absent(out);
179 }
180
181 Ok(())
182 }
183 }
184
185 impl ::fidl_next::FromWire<crate::wire::SpiImplUnregisterVmoResponse>
186 for SpiImplUnregisterVmoResponse
187 {
188 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
189 crate::wire::SpiImplUnregisterVmoResponse,
190 Self,
191 > = unsafe {
192 ::fidl_next::CopyOptimization::enable_if(
193 true && <::fidl_next::fuchsia::zx::Vmo as ::fidl_next::FromWire<
194 ::fidl_next::wire::fuchsia::Vmo,
195 >>::COPY_OPTIMIZATION
196 .is_enabled(),
197 )
198 };
199
200 #[inline]
201 fn from_wire(wire: crate::wire::SpiImplUnregisterVmoResponse) -> Self {
202 Self { vmo: ::fidl_next::FromWire::from_wire(wire.vmo) }
203 }
204 }
205}
206
207pub mod wire {
208
209 pub use fidl_next_common_fuchsia_hardware_spiimpl::wire::*;
210
211 #[derive(Debug)]
213 #[repr(C)]
214 pub struct SpiImplRegisterVmoRequest {
215 pub chip_select: ::fidl_next::wire::Uint32,
216
217 pub vmo_id: ::fidl_next::wire::Uint32,
218
219 pub vmo: ::fidl_next_fuchsia_mem::wire::Range,
220
221 pub rights: ::fidl_next_fuchsia_hardware_sharedmemory::wire::SharedVmoRight,
222 }
223
224 static_assertions::const_assert_eq!(std::mem::size_of::<SpiImplRegisterVmoRequest>(), 40);
225 static_assertions::const_assert_eq!(std::mem::align_of::<SpiImplRegisterVmoRequest>(), 8);
226
227 static_assertions::const_assert_eq!(
228 std::mem::offset_of!(SpiImplRegisterVmoRequest, chip_select),
229 0
230 );
231
232 static_assertions::const_assert_eq!(std::mem::offset_of!(SpiImplRegisterVmoRequest, vmo_id), 4);
233
234 static_assertions::const_assert_eq!(std::mem::offset_of!(SpiImplRegisterVmoRequest, vmo), 8);
235
236 static_assertions::const_assert_eq!(
237 std::mem::offset_of!(SpiImplRegisterVmoRequest, rights),
238 32
239 );
240
241 impl ::fidl_next::Constrained for SpiImplRegisterVmoRequest {
242 type Constraint = ();
243
244 fn validate(
245 _: ::fidl_next::Slot<'_, Self>,
246 _: Self::Constraint,
247 ) -> Result<(), ::fidl_next::ValidationError> {
248 Ok(())
249 }
250 }
251
252 unsafe impl ::fidl_next::Wire for SpiImplRegisterVmoRequest {
253 type Narrowed<'de> = SpiImplRegisterVmoRequest;
254
255 #[inline]
256 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
257 ::fidl_next::munge! {
258 let Self {
259 chip_select,
260 vmo_id,
261 vmo,
262 rights,
263
264 } = &mut *out_;
265 }
266
267 ::fidl_next::Wire::zero_padding(chip_select);
268
269 ::fidl_next::Wire::zero_padding(vmo_id);
270
271 ::fidl_next::Wire::zero_padding(vmo);
272
273 ::fidl_next::Wire::zero_padding(rights);
274
275 unsafe {
276 out_.as_mut_ptr().cast::<u8>().add(36).write_bytes(0, 4);
277 }
278 }
279 }
280
281 unsafe impl<___D> ::fidl_next::Decode<___D> for SpiImplRegisterVmoRequest
282 where
283 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
284 ___D: ::fidl_next::fuchsia::HandleDecoder,
285 {
286 fn decode(
287 slot_: ::fidl_next::Slot<'_, Self>,
288 decoder_: &mut ___D,
289 _: (),
290 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
291 if slot_.as_bytes()[36..40] != [0u8; 4] {
292 return Err(::fidl_next::DecodeError::InvalidPadding);
293 }
294
295 ::fidl_next::munge! {
296 let Self {
297 mut chip_select,
298 mut vmo_id,
299 mut vmo,
300 mut rights,
301
302 } = slot_;
303 }
304
305 let _field = chip_select.as_mut();
306
307 ::fidl_next::Decode::decode(chip_select.as_mut(), decoder_, ())?;
308
309 let _field = vmo_id.as_mut();
310
311 ::fidl_next::Decode::decode(vmo_id.as_mut(), decoder_, ())?;
312
313 let _field = vmo.as_mut();
314
315 ::fidl_next::Decode::decode(vmo.as_mut(), decoder_, ())?;
316
317 let _field = rights.as_mut();
318
319 ::fidl_next::Decode::decode(rights.as_mut(), decoder_, ())?;
320
321 Ok(())
322 }
323 }
324
325 impl ::fidl_next::IntoNatural for SpiImplRegisterVmoRequest {
326 type Natural = crate::natural::SpiImplRegisterVmoRequest;
327 }
328
329 #[derive(Debug)]
331 #[repr(C)]
332 pub struct SpiImplUnregisterVmoResponse {
333 pub vmo: ::fidl_next::wire::fuchsia::Vmo,
334 }
335
336 static_assertions::const_assert_eq!(std::mem::size_of::<SpiImplUnregisterVmoResponse>(), 4);
337 static_assertions::const_assert_eq!(std::mem::align_of::<SpiImplUnregisterVmoResponse>(), 4);
338
339 static_assertions::const_assert_eq!(std::mem::offset_of!(SpiImplUnregisterVmoResponse, vmo), 0);
340
341 impl ::fidl_next::Constrained for SpiImplUnregisterVmoResponse {
342 type Constraint = ();
343
344 fn validate(
345 _: ::fidl_next::Slot<'_, Self>,
346 _: Self::Constraint,
347 ) -> Result<(), ::fidl_next::ValidationError> {
348 Ok(())
349 }
350 }
351
352 unsafe impl ::fidl_next::Wire for SpiImplUnregisterVmoResponse {
353 type Narrowed<'de> = SpiImplUnregisterVmoResponse;
354
355 #[inline]
356 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
357 ::fidl_next::munge! {
358 let Self {
359 vmo,
360
361 } = &mut *out_;
362 }
363
364 ::fidl_next::Wire::zero_padding(vmo);
365 }
366 }
367
368 unsafe impl<___D> ::fidl_next::Decode<___D> for SpiImplUnregisterVmoResponse
369 where
370 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
371 ___D: ::fidl_next::fuchsia::HandleDecoder,
372 {
373 fn decode(
374 slot_: ::fidl_next::Slot<'_, Self>,
375 decoder_: &mut ___D,
376 _: (),
377 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
378 ::fidl_next::munge! {
379 let Self {
380 mut vmo,
381
382 } = slot_;
383 }
384
385 let _field = vmo.as_mut();
386
387 ::fidl_next::Decode::decode(vmo.as_mut(), decoder_, ())?;
388
389 Ok(())
390 }
391 }
392
393 impl ::fidl_next::IntoNatural for SpiImplUnregisterVmoResponse {
394 type Natural = crate::natural::SpiImplUnregisterVmoResponse;
395 }
396}
397
398pub mod wire_optional {
399
400 pub use fidl_next_common_fuchsia_hardware_spiimpl::wire_optional::*;
401}
402
403pub mod generic {
404
405 pub use fidl_next_common_fuchsia_hardware_spiimpl::generic::*;
406
407 pub struct SpiImplRegisterVmoRequest<T0, T1, T2, T3> {
409 pub chip_select: T0,
410
411 pub vmo_id: T1,
412
413 pub vmo: T2,
414
415 pub rights: T3,
416 }
417
418 unsafe impl<___E, T0, T1, T2, T3>
419 ::fidl_next::Encode<crate::wire::SpiImplRegisterVmoRequest, ___E>
420 for SpiImplRegisterVmoRequest<T0, T1, T2, T3>
421 where
422 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
423 ___E: ::fidl_next::fuchsia::HandleEncoder,
424 T0: ::fidl_next::Encode<::fidl_next::wire::Uint32, ___E>,
425 T1: ::fidl_next::Encode<::fidl_next::wire::Uint32, ___E>,
426 T2: ::fidl_next::Encode<::fidl_next_fuchsia_mem::wire::Range, ___E>,
427 T3: ::fidl_next::Encode<
428 ::fidl_next_fuchsia_hardware_sharedmemory::wire::SharedVmoRight,
429 ___E,
430 >,
431 {
432 #[inline]
433 fn encode(
434 self,
435 encoder_: &mut ___E,
436 out_: &mut ::core::mem::MaybeUninit<crate::wire::SpiImplRegisterVmoRequest>,
437 _: (),
438 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
439 ::fidl_next::munge! {
440 let crate::wire::SpiImplRegisterVmoRequest {
441 chip_select,
442 vmo_id,
443 vmo,
444 rights,
445
446 } = out_;
447 }
448
449 ::fidl_next::Encode::encode(self.chip_select, encoder_, chip_select, ())?;
450
451 ::fidl_next::Encode::encode(self.vmo_id, encoder_, vmo_id, ())?;
452
453 ::fidl_next::Encode::encode(self.vmo, encoder_, vmo, ())?;
454
455 ::fidl_next::Encode::encode(self.rights, encoder_, rights, ())?;
456
457 Ok(())
458 }
459 }
460
461 pub struct SpiImplUnregisterVmoResponse<T0> {
463 pub vmo: T0,
464 }
465
466 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::SpiImplUnregisterVmoResponse, ___E>
467 for SpiImplUnregisterVmoResponse<T0>
468 where
469 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
470 ___E: ::fidl_next::fuchsia::HandleEncoder,
471 T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Vmo, ___E>,
472 {
473 #[inline]
474 fn encode(
475 self,
476 encoder_: &mut ___E,
477 out_: &mut ::core::mem::MaybeUninit<crate::wire::SpiImplUnregisterVmoResponse>,
478 _: (),
479 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
480 ::fidl_next::munge! {
481 let crate::wire::SpiImplUnregisterVmoResponse {
482 vmo,
483
484 } = out_;
485 }
486
487 ::fidl_next::Encode::encode(self.vmo, encoder_, vmo, ())?;
488
489 Ok(())
490 }
491 }
492}
493
494pub use self::natural::*;
495
496#[derive(Debug)]
498pub struct Service;
499
500impl ::fidl_next::DiscoverableService for Service {
501 const SERVICE_NAME: &'static str = "fuchsia.hardware.spiimpl.Service";
502 const MEMBER_NAMES: &'static [&'static str] = &["device"];
503}
504
505impl ::fidl_next::HasServiceRequest<::fdf_fidl::DriverChannel> for Service {}
506
507impl<___C> ::fidl_next::Service<___C> for Service
508where
509 ___C: ::fidl_next::protocol::ServiceConnector<::fdf_fidl::DriverChannel>,
510{
511 type Connector = ServiceConnector<___C>;
512}
513
514#[repr(transparent)]
516pub struct ServiceConnector<___C> {
517 #[allow(dead_code)]
518 connector: ___C,
519}
520
521impl<___C> ServiceConnector<___C>
522where
523 ___C: ::fidl_next::protocol::ServiceConnector<::fdf_fidl::DriverChannel>,
524{
525 pub fn device(
527 &self,
528 server_end: ::fidl_next::ServerEnd<crate::SpiImpl, ::fdf_fidl::DriverChannel>,
529 ) -> ::core::result::Result<
530 (),
531 <___C as ::fidl_next::protocol::ServiceConnector<::fdf_fidl::DriverChannel>>::Error,
532 > {
533 ::fidl_next::protocol::ServiceConnector::<::fdf_fidl::DriverChannel>::connect_to_member(
534 &self.connector,
535 "device",
536 server_end.into_untyped(),
537 )
538 }
539}
540
541pub trait ServiceHandler {
543 fn device(&self, server_end: ::fidl_next::ServerEnd<crate::SpiImpl, ::fdf_fidl::DriverChannel>);
545}
546
547impl<___H, ___T> ::fidl_next::DispatchServiceHandler<___H, ___T> for Service
548where
549 ___H: ServiceHandler,
550 ::fdf_fidl::DriverChannel: ::fidl_next::InstanceFromServiceTransport<___T>,
551{
552 fn on_connection(handler: &___H, member: &str, server_end: ___T) {
553 use ::fidl_next::InstanceFromServiceTransport;
554 match member {
555 "device" => handler.device(::fidl_next::ServerEnd::from_untyped(
556 ::fdf_fidl::DriverChannel::from_service_transport(server_end),
557 )),
558
559 _ => unreachable!(),
560 }
561 }
562}
563
564#[doc = " Low-level protocol for spi drivers.\n"]
566#[derive(PartialEq, Debug)]
567pub struct SpiImpl;
568
569impl ::fidl_next::Discoverable for SpiImpl {
570 const PROTOCOL_NAME: &'static str = "fuchsia.hardware.spiimpl.SpiImpl";
571}
572
573#[cfg(feature = "driver")]
574impl ::fidl_next::HasTransport for SpiImpl {
575 type Transport = ::fdf_fidl::DriverChannel;
576}
577
578pub mod spi_impl {
579 pub mod prelude {
580 pub use crate::{
581 SpiImpl, SpiImplClientHandler, SpiImplLocalClientHandler, SpiImplLocalServerHandler,
582 SpiImplServerHandler, spi_impl,
583 };
584
585 pub use crate::natural::SpiImplExchangeVectorRequest;
586
587 pub use crate::natural::SpiImplExchangeVmoRequest;
588
589 pub use crate::natural::SpiImplGetChipSelectCountResponse;
590
591 pub use crate::natural::SpiImplLockBusRequest;
592
593 pub use crate::natural::SpiImplReceiveVectorRequest;
594
595 pub use crate::natural::SpiImplReceiveVmoRequest;
596
597 pub use crate::natural::SpiImplRegisterVmoRequest;
598
599 pub use crate::natural::SpiImplReleaseRegisteredVmosRequest;
600
601 pub use crate::natural::SpiImplTransmitVectorRequest;
602
603 pub use crate::natural::SpiImplTransmitVmoRequest;
604
605 pub use crate::natural::SpiImplUnlockBusRequest;
606
607 pub use crate::natural::SpiImplUnregisterVmoRequest;
608
609 pub use crate::natural::SpiImplExchangeVectorResponse;
610
611 pub use crate::natural::SpiImplExchangeVmoResponse;
612
613 pub use crate::natural::SpiImplLockBusResponse;
614
615 pub use crate::natural::SpiImplReceiveVectorResponse;
616
617 pub use crate::natural::SpiImplReceiveVmoResponse;
618
619 pub use crate::natural::SpiImplRegisterVmoResponse;
620
621 pub use crate::natural::SpiImplTransmitVectorResponse;
622
623 pub use crate::natural::SpiImplTransmitVmoResponse;
624
625 pub use crate::natural::SpiImplUnlockBusResponse;
626
627 pub use crate::natural::SpiImplUnregisterVmoResponse;
628 }
629
630 pub struct GetChipSelectCount;
631
632 impl ::fidl_next::Method for GetChipSelectCount {
633 const ORDINAL: u64 = 4261972386852856527;
634 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
635 ::fidl_next::protocol::Flexibility::Strict;
636
637 type Protocol = crate::SpiImpl;
638
639 type Request = ::fidl_next::wire::EmptyMessageBody;
640 }
641
642 impl ::fidl_next::TwoWayMethod for GetChipSelectCount {
643 type Response = ::fidl_next::wire::Strict<crate::wire::SpiImplGetChipSelectCountResponse>;
644 }
645
646 impl<___R> ::fidl_next::Respond<___R> for GetChipSelectCount {
647 type Output = ::fidl_next::Strict<crate::generic::SpiImplGetChipSelectCountResponse<___R>>;
648
649 fn respond(response: ___R) -> Self::Output {
650 ::fidl_next::Strict(crate::generic::SpiImplGetChipSelectCountResponse {
651 count: response,
652 })
653 }
654 }
655
656 pub struct TransmitVector;
657
658 impl ::fidl_next::Method for TransmitVector {
659 const ORDINAL: u64 = 7287789131276374998;
660 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
661 ::fidl_next::protocol::Flexibility::Strict;
662
663 type Protocol = crate::SpiImpl;
664
665 type Request = crate::wire::SpiImplTransmitVectorRequest<'static>;
666 }
667
668 impl ::fidl_next::TwoWayMethod for TransmitVector {
669 type Response = ::fidl_next::wire::Result<
670 'static,
671 crate::wire::SpiImplTransmitVectorResponse,
672 ::fidl_next::wire::fuchsia::Status,
673 >;
674 }
675
676 impl<___R> ::fidl_next::Respond<___R> for TransmitVector {
677 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
678
679 fn respond(response: ___R) -> Self::Output {
680 ::core::result::Result::Ok(response)
681 }
682 }
683
684 impl<___R> ::fidl_next::RespondErr<___R> for TransmitVector {
685 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
686
687 fn respond_err(response: ___R) -> Self::Output {
688 ::core::result::Result::Err(response)
689 }
690 }
691
692 pub struct ReceiveVector;
693
694 impl ::fidl_next::Method for ReceiveVector {
695 const ORDINAL: u64 = 4813495552606122700;
696 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
697 ::fidl_next::protocol::Flexibility::Strict;
698
699 type Protocol = crate::SpiImpl;
700
701 type Request = crate::wire::SpiImplReceiveVectorRequest;
702 }
703
704 impl ::fidl_next::TwoWayMethod for ReceiveVector {
705 type Response = ::fidl_next::wire::Result<
706 'static,
707 crate::wire::SpiImplReceiveVectorResponse<'static>,
708 ::fidl_next::wire::fuchsia::Status,
709 >;
710 }
711
712 impl<___R> ::fidl_next::Respond<___R> for ReceiveVector {
713 type Output = ::core::result::Result<
714 crate::generic::SpiImplReceiveVectorResponse<___R>,
715 ::fidl_next::never::Never,
716 >;
717
718 fn respond(response: ___R) -> Self::Output {
719 ::core::result::Result::Ok(crate::generic::SpiImplReceiveVectorResponse {
720 data: response,
721 })
722 }
723 }
724
725 impl<___R> ::fidl_next::RespondErr<___R> for ReceiveVector {
726 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
727
728 fn respond_err(response: ___R) -> Self::Output {
729 ::core::result::Result::Err(response)
730 }
731 }
732
733 pub struct ExchangeVector;
734
735 impl ::fidl_next::Method for ExchangeVector {
736 const ORDINAL: u64 = 3844617764012354164;
737 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
738 ::fidl_next::protocol::Flexibility::Strict;
739
740 type Protocol = crate::SpiImpl;
741
742 type Request = crate::wire::SpiImplExchangeVectorRequest<'static>;
743 }
744
745 impl ::fidl_next::TwoWayMethod for ExchangeVector {
746 type Response = ::fidl_next::wire::Result<
747 'static,
748 crate::wire::SpiImplExchangeVectorResponse<'static>,
749 ::fidl_next::wire::fuchsia::Status,
750 >;
751 }
752
753 impl<___R> ::fidl_next::Respond<___R> for ExchangeVector {
754 type Output = ::core::result::Result<
755 crate::generic::SpiImplExchangeVectorResponse<___R>,
756 ::fidl_next::never::Never,
757 >;
758
759 fn respond(response: ___R) -> Self::Output {
760 ::core::result::Result::Ok(crate::generic::SpiImplExchangeVectorResponse {
761 rxdata: response,
762 })
763 }
764 }
765
766 impl<___R> ::fidl_next::RespondErr<___R> for ExchangeVector {
767 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
768
769 fn respond_err(response: ___R) -> Self::Output {
770 ::core::result::Result::Err(response)
771 }
772 }
773
774 pub struct LockBus;
775
776 impl ::fidl_next::Method for LockBus {
777 const ORDINAL: u64 = 9187537331803160557;
778 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
779 ::fidl_next::protocol::Flexibility::Strict;
780
781 type Protocol = crate::SpiImpl;
782
783 type Request = crate::wire::SpiImplLockBusRequest;
784 }
785
786 impl ::fidl_next::TwoWayMethod for LockBus {
787 type Response = ::fidl_next::wire::Result<
788 'static,
789 crate::wire::SpiImplLockBusResponse,
790 ::fidl_next::wire::fuchsia::Status,
791 >;
792 }
793
794 impl<___R> ::fidl_next::Respond<___R> for LockBus {
795 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
796
797 fn respond(response: ___R) -> Self::Output {
798 ::core::result::Result::Ok(response)
799 }
800 }
801
802 impl<___R> ::fidl_next::RespondErr<___R> for LockBus {
803 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
804
805 fn respond_err(response: ___R) -> Self::Output {
806 ::core::result::Result::Err(response)
807 }
808 }
809
810 pub struct UnlockBus;
811
812 impl ::fidl_next::Method for UnlockBus {
813 const ORDINAL: u64 = 3150764477565251378;
814 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
815 ::fidl_next::protocol::Flexibility::Strict;
816
817 type Protocol = crate::SpiImpl;
818
819 type Request = crate::wire::SpiImplUnlockBusRequest;
820 }
821
822 impl ::fidl_next::TwoWayMethod for UnlockBus {
823 type Response = ::fidl_next::wire::Result<
824 'static,
825 crate::wire::SpiImplUnlockBusResponse,
826 ::fidl_next::wire::fuchsia::Status,
827 >;
828 }
829
830 impl<___R> ::fidl_next::Respond<___R> for UnlockBus {
831 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
832
833 fn respond(response: ___R) -> Self::Output {
834 ::core::result::Result::Ok(response)
835 }
836 }
837
838 impl<___R> ::fidl_next::RespondErr<___R> for UnlockBus {
839 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
840
841 fn respond_err(response: ___R) -> Self::Output {
842 ::core::result::Result::Err(response)
843 }
844 }
845
846 pub struct RegisterVmo;
847
848 impl ::fidl_next::Method for RegisterVmo {
849 const ORDINAL: u64 = 2270783649342134233;
850 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
851 ::fidl_next::protocol::Flexibility::Strict;
852
853 type Protocol = crate::SpiImpl;
854
855 type Request = crate::wire::SpiImplRegisterVmoRequest;
856 }
857
858 impl ::fidl_next::TwoWayMethod for RegisterVmo {
859 type Response = ::fidl_next::wire::Result<
860 'static,
861 crate::wire::SpiImplRegisterVmoResponse,
862 ::fidl_next::wire::fuchsia::Status,
863 >;
864 }
865
866 impl<___R> ::fidl_next::Respond<___R> for RegisterVmo {
867 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
868
869 fn respond(response: ___R) -> Self::Output {
870 ::core::result::Result::Ok(response)
871 }
872 }
873
874 impl<___R> ::fidl_next::RespondErr<___R> for RegisterVmo {
875 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
876
877 fn respond_err(response: ___R) -> Self::Output {
878 ::core::result::Result::Err(response)
879 }
880 }
881
882 pub struct UnregisterVmo;
883
884 impl ::fidl_next::Method for UnregisterVmo {
885 const ORDINAL: u64 = 8778583385931240091;
886 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
887 ::fidl_next::protocol::Flexibility::Strict;
888
889 type Protocol = crate::SpiImpl;
890
891 type Request = crate::wire::SpiImplUnregisterVmoRequest;
892 }
893
894 impl ::fidl_next::TwoWayMethod for UnregisterVmo {
895 type Response = ::fidl_next::wire::Result<
896 'static,
897 crate::wire::SpiImplUnregisterVmoResponse,
898 ::fidl_next::wire::fuchsia::Status,
899 >;
900 }
901
902 impl<___R> ::fidl_next::Respond<___R> for UnregisterVmo {
903 type Output = ::core::result::Result<
904 crate::generic::SpiImplUnregisterVmoResponse<___R>,
905 ::fidl_next::never::Never,
906 >;
907
908 fn respond(response: ___R) -> Self::Output {
909 ::core::result::Result::Ok(crate::generic::SpiImplUnregisterVmoResponse {
910 vmo: response,
911 })
912 }
913 }
914
915 impl<___R> ::fidl_next::RespondErr<___R> for UnregisterVmo {
916 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
917
918 fn respond_err(response: ___R) -> Self::Output {
919 ::core::result::Result::Err(response)
920 }
921 }
922
923 pub struct ReleaseRegisteredVmos;
924
925 impl ::fidl_next::Method for ReleaseRegisteredVmos {
926 const ORDINAL: u64 = 5302547493468731494;
927 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
928 ::fidl_next::protocol::Flexibility::Strict;
929
930 type Protocol = crate::SpiImpl;
931
932 type Request = crate::wire::SpiImplReleaseRegisteredVmosRequest;
933 }
934
935 pub struct TransmitVmo;
936
937 impl ::fidl_next::Method for TransmitVmo {
938 const ORDINAL: u64 = 1490935665662854691;
939 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
940 ::fidl_next::protocol::Flexibility::Strict;
941
942 type Protocol = crate::SpiImpl;
943
944 type Request = crate::wire::SpiImplTransmitVmoRequest;
945 }
946
947 impl ::fidl_next::TwoWayMethod for TransmitVmo {
948 type Response = ::fidl_next::wire::Result<
949 'static,
950 crate::wire::SpiImplTransmitVmoResponse,
951 ::fidl_next::wire::fuchsia::Status,
952 >;
953 }
954
955 impl<___R> ::fidl_next::Respond<___R> for TransmitVmo {
956 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
957
958 fn respond(response: ___R) -> Self::Output {
959 ::core::result::Result::Ok(response)
960 }
961 }
962
963 impl<___R> ::fidl_next::RespondErr<___R> for TransmitVmo {
964 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
965
966 fn respond_err(response: ___R) -> Self::Output {
967 ::core::result::Result::Err(response)
968 }
969 }
970
971 pub struct ReceiveVmo;
972
973 impl ::fidl_next::Method for ReceiveVmo {
974 const ORDINAL: u64 = 7091744647492940488;
975 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
976 ::fidl_next::protocol::Flexibility::Strict;
977
978 type Protocol = crate::SpiImpl;
979
980 type Request = crate::wire::SpiImplReceiveVmoRequest;
981 }
982
983 impl ::fidl_next::TwoWayMethod for ReceiveVmo {
984 type Response = ::fidl_next::wire::Result<
985 'static,
986 crate::wire::SpiImplReceiveVmoResponse,
987 ::fidl_next::wire::fuchsia::Status,
988 >;
989 }
990
991 impl<___R> ::fidl_next::Respond<___R> for ReceiveVmo {
992 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
993
994 fn respond(response: ___R) -> Self::Output {
995 ::core::result::Result::Ok(response)
996 }
997 }
998
999 impl<___R> ::fidl_next::RespondErr<___R> for ReceiveVmo {
1000 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1001
1002 fn respond_err(response: ___R) -> Self::Output {
1003 ::core::result::Result::Err(response)
1004 }
1005 }
1006
1007 pub struct ExchangeVmo;
1008
1009 impl ::fidl_next::Method for ExchangeVmo {
1010 const ORDINAL: u64 = 3592177641282126076;
1011 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1012 ::fidl_next::protocol::Flexibility::Strict;
1013
1014 type Protocol = crate::SpiImpl;
1015
1016 type Request = crate::wire::SpiImplExchangeVmoRequest;
1017 }
1018
1019 impl ::fidl_next::TwoWayMethod for ExchangeVmo {
1020 type Response = ::fidl_next::wire::Result<
1021 'static,
1022 crate::wire::SpiImplExchangeVmoResponse,
1023 ::fidl_next::wire::fuchsia::Status,
1024 >;
1025 }
1026
1027 impl<___R> ::fidl_next::Respond<___R> for ExchangeVmo {
1028 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1029
1030 fn respond(response: ___R) -> Self::Output {
1031 ::core::result::Result::Ok(response)
1032 }
1033 }
1034
1035 impl<___R> ::fidl_next::RespondErr<___R> for ExchangeVmo {
1036 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1037
1038 fn respond_err(response: ___R) -> Self::Output {
1039 ::core::result::Result::Err(response)
1040 }
1041 }
1042
1043 mod ___detail {
1044 unsafe impl<___T> ::fidl_next::HasConnectionHandles<___T> for crate::SpiImpl
1045 where
1046 ___T: ::fidl_next::Transport,
1047 {
1048 type Client = SpiImplClient<___T>;
1049 type Server = SpiImplServer<___T>;
1050 }
1051
1052 #[repr(transparent)]
1054 pub struct SpiImplClient<___T: ::fidl_next::Transport> {
1055 #[allow(dead_code)]
1056 client: ::fidl_next::protocol::Client<___T>,
1057 }
1058
1059 impl<___T> SpiImplClient<___T>
1060 where
1061 ___T: ::fidl_next::Transport,
1062 {
1063 #[doc = " Returns the number of chip select lines available or provided by the driver instance.\n To be used as a limit on the acceptable values for the `chip_select\' field in the Exchange()\n and ExchangeVmo() methods.\n"]
1064 pub fn get_chip_select_count(
1065 &self,
1066 ) -> ::fidl_next::TwoWayFuture<'_, super::GetChipSelectCount, ___T> {
1067 ::fidl_next::TwoWayFuture::from_untyped(
1068 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
1069 4261972386852856527,
1070 <super::GetChipSelectCount as ::fidl_next::Method>::FLEXIBILITY,
1071 (),
1072 ),
1073 )
1074 }
1075
1076 #[doc = " Half-duplex transmit data to a SPI device; always transmits the entire buffer on success.\n"]
1077 pub fn transmit_vector(
1078 &self,
1079
1080 chip_select: impl ::fidl_next::Encode<
1081 ::fidl_next::wire::Uint32,
1082 <___T as ::fidl_next::Transport>::SendBuffer,
1083 >,
1084
1085 data: impl ::fidl_next::Encode<
1086 ::fidl_next::wire::Vector<'static, u8>,
1087 <___T as ::fidl_next::Transport>::SendBuffer,
1088 >,
1089 ) -> ::fidl_next::TwoWayFuture<'_, super::TransmitVector, ___T>
1090 where
1091 <___T as ::fidl_next::Transport>::SendBuffer:
1092 ::fidl_next::encoder::InternalHandleEncoder,
1093 <___T as ::fidl_next::Transport>::SendBuffer: ::fidl_next::Encoder,
1094 {
1095 self.transmit_vector_with(crate::generic::SpiImplTransmitVectorRequest {
1096 chip_select,
1097
1098 data,
1099 })
1100 }
1101
1102 #[doc = " Half-duplex transmit data to a SPI device; always transmits the entire buffer on success.\n"]
1103 pub fn transmit_vector_with<___R>(
1104 &self,
1105 request: ___R,
1106 ) -> ::fidl_next::TwoWayFuture<'_, super::TransmitVector, ___T>
1107 where
1108 ___R: ::fidl_next::Encode<
1109 crate::wire::SpiImplTransmitVectorRequest<'static>,
1110 <___T as ::fidl_next::Transport>::SendBuffer,
1111 >,
1112 {
1113 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1114 7287789131276374998,
1115 <super::TransmitVector as ::fidl_next::Method>::FLEXIBILITY,
1116 request,
1117 ))
1118 }
1119
1120 #[doc = " Half-duplex receive data from a SPI device; always reads the full size requested.\n"]
1121 pub fn receive_vector(
1122 &self,
1123
1124 chip_select: impl ::fidl_next::Encode<
1125 ::fidl_next::wire::Uint32,
1126 <___T as ::fidl_next::Transport>::SendBuffer,
1127 >,
1128
1129 size: impl ::fidl_next::Encode<
1130 ::fidl_next::wire::Uint32,
1131 <___T as ::fidl_next::Transport>::SendBuffer,
1132 >,
1133 ) -> ::fidl_next::TwoWayFuture<'_, super::ReceiveVector, ___T>
1134 where
1135 <___T as ::fidl_next::Transport>::SendBuffer:
1136 ::fidl_next::encoder::InternalHandleEncoder,
1137 {
1138 self.receive_vector_with(crate::generic::SpiImplReceiveVectorRequest {
1139 chip_select,
1140
1141 size,
1142 })
1143 }
1144
1145 #[doc = " Half-duplex receive data from a SPI device; always reads the full size requested.\n"]
1146 pub fn receive_vector_with<___R>(
1147 &self,
1148 request: ___R,
1149 ) -> ::fidl_next::TwoWayFuture<'_, super::ReceiveVector, ___T>
1150 where
1151 ___R: ::fidl_next::Encode<
1152 crate::wire::SpiImplReceiveVectorRequest,
1153 <___T as ::fidl_next::Transport>::SendBuffer,
1154 >,
1155 {
1156 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1157 4813495552606122700,
1158 <super::ReceiveVector as ::fidl_next::Method>::FLEXIBILITY,
1159 request,
1160 ))
1161 }
1162
1163 #[doc = " Full-duplex SPI transaction. Received data will exactly equal the length of the transmit\n buffer.\n"]
1164 pub fn exchange_vector(
1165 &self,
1166
1167 chip_select: impl ::fidl_next::Encode<
1168 ::fidl_next::wire::Uint32,
1169 <___T as ::fidl_next::Transport>::SendBuffer,
1170 >,
1171
1172 txdata: impl ::fidl_next::Encode<
1173 ::fidl_next::wire::Vector<'static, u8>,
1174 <___T as ::fidl_next::Transport>::SendBuffer,
1175 >,
1176 ) -> ::fidl_next::TwoWayFuture<'_, super::ExchangeVector, ___T>
1177 where
1178 <___T as ::fidl_next::Transport>::SendBuffer:
1179 ::fidl_next::encoder::InternalHandleEncoder,
1180 <___T as ::fidl_next::Transport>::SendBuffer: ::fidl_next::Encoder,
1181 {
1182 self.exchange_vector_with(crate::generic::SpiImplExchangeVectorRequest {
1183 chip_select,
1184
1185 txdata,
1186 })
1187 }
1188
1189 #[doc = " Full-duplex SPI transaction. Received data will exactly equal the length of the transmit\n buffer.\n"]
1190 pub fn exchange_vector_with<___R>(
1191 &self,
1192 request: ___R,
1193 ) -> ::fidl_next::TwoWayFuture<'_, super::ExchangeVector, ___T>
1194 where
1195 ___R: ::fidl_next::Encode<
1196 crate::wire::SpiImplExchangeVectorRequest<'static>,
1197 <___T as ::fidl_next::Transport>::SendBuffer,
1198 >,
1199 {
1200 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1201 3844617764012354164,
1202 <super::ExchangeVector as ::fidl_next::Method>::FLEXIBILITY,
1203 request,
1204 ))
1205 }
1206
1207 #[doc = " Lock the bus.\n"]
1208 pub fn lock_bus(
1209 &self,
1210
1211 chip_select: impl ::fidl_next::Encode<
1212 ::fidl_next::wire::Uint32,
1213 <___T as ::fidl_next::Transport>::SendBuffer,
1214 >,
1215 ) -> ::fidl_next::TwoWayFuture<'_, super::LockBus, ___T>
1216 where
1217 <___T as ::fidl_next::Transport>::SendBuffer:
1218 ::fidl_next::encoder::InternalHandleEncoder,
1219 {
1220 self.lock_bus_with(crate::generic::SpiImplLockBusRequest { chip_select })
1221 }
1222
1223 #[doc = " Lock the bus.\n"]
1224 pub fn lock_bus_with<___R>(
1225 &self,
1226 request: ___R,
1227 ) -> ::fidl_next::TwoWayFuture<'_, super::LockBus, ___T>
1228 where
1229 ___R: ::fidl_next::Encode<
1230 crate::wire::SpiImplLockBusRequest,
1231 <___T as ::fidl_next::Transport>::SendBuffer,
1232 >,
1233 {
1234 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1235 9187537331803160557,
1236 <super::LockBus as ::fidl_next::Method>::FLEXIBILITY,
1237 request,
1238 ))
1239 }
1240
1241 #[doc = " Unlock the bus.\n"]
1242 pub fn unlock_bus(
1243 &self,
1244
1245 chip_select: impl ::fidl_next::Encode<
1246 ::fidl_next::wire::Uint32,
1247 <___T as ::fidl_next::Transport>::SendBuffer,
1248 >,
1249 ) -> ::fidl_next::TwoWayFuture<'_, super::UnlockBus, ___T>
1250 where
1251 <___T as ::fidl_next::Transport>::SendBuffer:
1252 ::fidl_next::encoder::InternalHandleEncoder,
1253 {
1254 self.unlock_bus_with(crate::generic::SpiImplUnlockBusRequest { chip_select })
1255 }
1256
1257 #[doc = " Unlock the bus.\n"]
1258 pub fn unlock_bus_with<___R>(
1259 &self,
1260 request: ___R,
1261 ) -> ::fidl_next::TwoWayFuture<'_, super::UnlockBus, ___T>
1262 where
1263 ___R: ::fidl_next::Encode<
1264 crate::wire::SpiImplUnlockBusRequest,
1265 <___T as ::fidl_next::Transport>::SendBuffer,
1266 >,
1267 {
1268 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1269 3150764477565251378,
1270 <super::UnlockBus as ::fidl_next::Method>::FLEXIBILITY,
1271 request,
1272 ))
1273 }
1274
1275 #[doc = " rights is a bit field containing SpiVmoRight values, and determines the read/write\n permissions used by the implementation when pinning or mapping the VMO.\n"]
1276 pub fn register_vmo(
1277 &self,
1278
1279 chip_select: impl ::fidl_next::Encode<
1280 ::fidl_next::wire::Uint32,
1281 <___T as ::fidl_next::Transport>::SendBuffer,
1282 >,
1283
1284 vmo_id: impl ::fidl_next::Encode<
1285 ::fidl_next::wire::Uint32,
1286 <___T as ::fidl_next::Transport>::SendBuffer,
1287 >,
1288
1289 vmo: impl ::fidl_next::Encode<
1290 ::fidl_next_fuchsia_mem::wire::Range,
1291 <___T as ::fidl_next::Transport>::SendBuffer,
1292 >,
1293
1294 rights: impl ::fidl_next::Encode<
1295 ::fidl_next_fuchsia_hardware_sharedmemory::wire::SharedVmoRight,
1296 <___T as ::fidl_next::Transport>::SendBuffer,
1297 >,
1298 ) -> ::fidl_next::TwoWayFuture<'_, super::RegisterVmo, ___T>
1299 where
1300 <___T as ::fidl_next::Transport>::SendBuffer:
1301 ::fidl_next::encoder::InternalHandleEncoder,
1302 <___T as ::fidl_next::Transport>::SendBuffer: ::fidl_next::fuchsia::HandleEncoder,
1303 {
1304 self.register_vmo_with(crate::generic::SpiImplRegisterVmoRequest {
1305 chip_select,
1306
1307 vmo_id,
1308
1309 vmo,
1310
1311 rights,
1312 })
1313 }
1314
1315 #[doc = " rights is a bit field containing SpiVmoRight values, and determines the read/write\n permissions used by the implementation when pinning or mapping the VMO.\n"]
1316 pub fn register_vmo_with<___R>(
1317 &self,
1318 request: ___R,
1319 ) -> ::fidl_next::TwoWayFuture<'_, super::RegisterVmo, ___T>
1320 where
1321 ___R: ::fidl_next::Encode<
1322 crate::wire::SpiImplRegisterVmoRequest,
1323 <___T as ::fidl_next::Transport>::SendBuffer,
1324 >,
1325 {
1326 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1327 2270783649342134233,
1328 <super::RegisterVmo as ::fidl_next::Method>::FLEXIBILITY,
1329 request,
1330 ))
1331 }
1332
1333 pub fn unregister_vmo(
1334 &self,
1335
1336 chip_select: impl ::fidl_next::Encode<
1337 ::fidl_next::wire::Uint32,
1338 <___T as ::fidl_next::Transport>::SendBuffer,
1339 >,
1340
1341 vmo_id: impl ::fidl_next::Encode<
1342 ::fidl_next::wire::Uint32,
1343 <___T as ::fidl_next::Transport>::SendBuffer,
1344 >,
1345 ) -> ::fidl_next::TwoWayFuture<'_, super::UnregisterVmo, ___T>
1346 where
1347 <___T as ::fidl_next::Transport>::SendBuffer:
1348 ::fidl_next::encoder::InternalHandleEncoder,
1349 {
1350 self.unregister_vmo_with(crate::generic::SpiImplUnregisterVmoRequest {
1351 chip_select,
1352
1353 vmo_id,
1354 })
1355 }
1356
1357 pub fn unregister_vmo_with<___R>(
1358 &self,
1359 request: ___R,
1360 ) -> ::fidl_next::TwoWayFuture<'_, super::UnregisterVmo, ___T>
1361 where
1362 ___R: ::fidl_next::Encode<
1363 crate::wire::SpiImplUnregisterVmoRequest,
1364 <___T as ::fidl_next::Transport>::SendBuffer,
1365 >,
1366 {
1367 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1368 8778583385931240091,
1369 <super::UnregisterVmo as ::fidl_next::Method>::FLEXIBILITY,
1370 request,
1371 ))
1372 }
1373
1374 #[doc = " Release all VMOs registered to this chip_select. Called by the core driver after the client\n has disconnected and the VMOs are no longer needed.\n"]
1375 pub fn release_registered_vmos(
1376 &self,
1377
1378 chip_select: impl ::fidl_next::Encode<
1379 ::fidl_next::wire::Uint32,
1380 <___T as ::fidl_next::Transport>::SendBuffer,
1381 >,
1382 ) -> ::fidl_next::SendFuture<'_, ___T>
1383 where
1384 <___T as ::fidl_next::Transport>::SendBuffer:
1385 ::fidl_next::encoder::InternalHandleEncoder,
1386 {
1387 self.release_registered_vmos_with(
1388 crate::generic::SpiImplReleaseRegisteredVmosRequest { chip_select },
1389 )
1390 }
1391
1392 #[doc = " Release all VMOs registered to this chip_select. Called by the core driver after the client\n has disconnected and the VMOs are no longer needed.\n"]
1393 pub fn release_registered_vmos_with<___R>(
1394 &self,
1395 request: ___R,
1396 ) -> ::fidl_next::SendFuture<'_, ___T>
1397 where
1398 ___R: ::fidl_next::Encode<
1399 crate::wire::SpiImplReleaseRegisteredVmosRequest,
1400 <___T as ::fidl_next::Transport>::SendBuffer,
1401 >,
1402 {
1403 ::fidl_next::SendFuture::from_untyped(self.client.send_one_way(
1404 5302547493468731494,
1405 <super::ReleaseRegisteredVmos as ::fidl_next::Method>::FLEXIBILITY,
1406 request,
1407 ))
1408 }
1409
1410 pub fn transmit_vmo(
1411 &self,
1412
1413 chip_select: impl ::fidl_next::Encode<
1414 ::fidl_next::wire::Uint32,
1415 <___T as ::fidl_next::Transport>::SendBuffer,
1416 >,
1417
1418 buffer: impl ::fidl_next::Encode<
1419 ::fidl_next_fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer,
1420 <___T as ::fidl_next::Transport>::SendBuffer,
1421 >,
1422 ) -> ::fidl_next::TwoWayFuture<'_, super::TransmitVmo, ___T>
1423 where
1424 <___T as ::fidl_next::Transport>::SendBuffer:
1425 ::fidl_next::encoder::InternalHandleEncoder,
1426 {
1427 self.transmit_vmo_with(crate::generic::SpiImplTransmitVmoRequest {
1428 chip_select,
1429
1430 buffer,
1431 })
1432 }
1433
1434 pub fn transmit_vmo_with<___R>(
1435 &self,
1436 request: ___R,
1437 ) -> ::fidl_next::TwoWayFuture<'_, super::TransmitVmo, ___T>
1438 where
1439 ___R: ::fidl_next::Encode<
1440 crate::wire::SpiImplTransmitVmoRequest,
1441 <___T as ::fidl_next::Transport>::SendBuffer,
1442 >,
1443 {
1444 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1445 1490935665662854691,
1446 <super::TransmitVmo as ::fidl_next::Method>::FLEXIBILITY,
1447 request,
1448 ))
1449 }
1450
1451 pub fn receive_vmo(
1452 &self,
1453
1454 chip_select: impl ::fidl_next::Encode<
1455 ::fidl_next::wire::Uint32,
1456 <___T as ::fidl_next::Transport>::SendBuffer,
1457 >,
1458
1459 buffer: impl ::fidl_next::Encode<
1460 ::fidl_next_fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer,
1461 <___T as ::fidl_next::Transport>::SendBuffer,
1462 >,
1463 ) -> ::fidl_next::TwoWayFuture<'_, super::ReceiveVmo, ___T>
1464 where
1465 <___T as ::fidl_next::Transport>::SendBuffer:
1466 ::fidl_next::encoder::InternalHandleEncoder,
1467 {
1468 self.receive_vmo_with(crate::generic::SpiImplReceiveVmoRequest {
1469 chip_select,
1470
1471 buffer,
1472 })
1473 }
1474
1475 pub fn receive_vmo_with<___R>(
1476 &self,
1477 request: ___R,
1478 ) -> ::fidl_next::TwoWayFuture<'_, super::ReceiveVmo, ___T>
1479 where
1480 ___R: ::fidl_next::Encode<
1481 crate::wire::SpiImplReceiveVmoRequest,
1482 <___T as ::fidl_next::Transport>::SendBuffer,
1483 >,
1484 {
1485 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1486 7091744647492940488,
1487 <super::ReceiveVmo as ::fidl_next::Method>::FLEXIBILITY,
1488 request,
1489 ))
1490 }
1491
1492 pub fn exchange_vmo(
1493 &self,
1494
1495 chip_select: impl ::fidl_next::Encode<
1496 ::fidl_next::wire::Uint32,
1497 <___T as ::fidl_next::Transport>::SendBuffer,
1498 >,
1499
1500 tx_buffer: impl ::fidl_next::Encode<
1501 ::fidl_next_fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer,
1502 <___T as ::fidl_next::Transport>::SendBuffer,
1503 >,
1504
1505 rx_buffer: impl ::fidl_next::Encode<
1506 ::fidl_next_fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer,
1507 <___T as ::fidl_next::Transport>::SendBuffer,
1508 >,
1509 ) -> ::fidl_next::TwoWayFuture<'_, super::ExchangeVmo, ___T>
1510 where
1511 <___T as ::fidl_next::Transport>::SendBuffer:
1512 ::fidl_next::encoder::InternalHandleEncoder,
1513 {
1514 self.exchange_vmo_with(crate::generic::SpiImplExchangeVmoRequest {
1515 chip_select,
1516
1517 tx_buffer,
1518
1519 rx_buffer,
1520 })
1521 }
1522
1523 pub fn exchange_vmo_with<___R>(
1524 &self,
1525 request: ___R,
1526 ) -> ::fidl_next::TwoWayFuture<'_, super::ExchangeVmo, ___T>
1527 where
1528 ___R: ::fidl_next::Encode<
1529 crate::wire::SpiImplExchangeVmoRequest,
1530 <___T as ::fidl_next::Transport>::SendBuffer,
1531 >,
1532 {
1533 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
1534 3592177641282126076,
1535 <super::ExchangeVmo as ::fidl_next::Method>::FLEXIBILITY,
1536 request,
1537 ))
1538 }
1539 }
1540
1541 #[repr(transparent)]
1543 pub struct SpiImplServer<___T: ::fidl_next::Transport> {
1544 server: ::fidl_next::protocol::Server<___T>,
1545 }
1546
1547 impl<___T> SpiImplServer<___T> where ___T: ::fidl_next::Transport {}
1548 }
1549}
1550
1551#[diagnostic::on_unimplemented(
1552 note = "If {Self} implements the non-local SpiImplClientHandler trait, use `spawn_as_local` or the `Local` adapter type"
1553)]
1554
1555pub trait SpiImplLocalClientHandler<
1559 #[cfg(feature = "driver")] ___T: ::fidl_next::Transport = ::fdf_fidl::DriverChannel,
1560 #[cfg(not(feature = "driver"))] ___T: ::fidl_next::Transport,
1561>
1562{
1563}
1564
1565impl<___H, ___T> ::fidl_next::DispatchLocalClientMessage<___H, ___T> for SpiImpl
1566where
1567 ___H: SpiImplLocalClientHandler<___T>,
1568 ___T: ::fidl_next::Transport,
1569{
1570 async fn on_event(
1571 handler: &mut ___H,
1572 mut message: ::fidl_next::Message<___T>,
1573 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
1574 match *message.header().ordinal {
1575 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
1576 }
1577 }
1578}
1579
1580#[diagnostic::on_unimplemented(
1581 note = "If {Self} implements the non-local SpiImplServerHandler trait, use `spawn_as_local` or the `Local` adapter type"
1582)]
1583
1584pub trait SpiImplLocalServerHandler<
1588 #[cfg(feature = "driver")] ___T: ::fidl_next::Transport = ::fdf_fidl::DriverChannel,
1589 #[cfg(not(feature = "driver"))] ___T: ::fidl_next::Transport,
1590>
1591{
1592 #[doc = " Returns the number of chip select lines available or provided by the driver instance.\n To be used as a limit on the acceptable values for the `chip_select\' field in the Exchange()\n and ExchangeVmo() methods.\n"]
1593 fn get_chip_select_count(
1594 &mut self,
1595
1596 responder: ::fidl_next::Responder<spi_impl::GetChipSelectCount, ___T>,
1597 ) -> impl ::core::future::Future<Output = ()>;
1598
1599 #[doc = " Half-duplex transmit data to a SPI device; always transmits the entire buffer on success.\n"]
1600 fn transmit_vector(
1601 &mut self,
1602
1603 request: ::fidl_next::Request<spi_impl::TransmitVector, ___T>,
1604
1605 responder: ::fidl_next::Responder<spi_impl::TransmitVector, ___T>,
1606 ) -> impl ::core::future::Future<Output = ()>;
1607
1608 #[doc = " Half-duplex receive data from a SPI device; always reads the full size requested.\n"]
1609 fn receive_vector(
1610 &mut self,
1611
1612 request: ::fidl_next::Request<spi_impl::ReceiveVector, ___T>,
1613
1614 responder: ::fidl_next::Responder<spi_impl::ReceiveVector, ___T>,
1615 ) -> impl ::core::future::Future<Output = ()>;
1616
1617 #[doc = " Full-duplex SPI transaction. Received data will exactly equal the length of the transmit\n buffer.\n"]
1618 fn exchange_vector(
1619 &mut self,
1620
1621 request: ::fidl_next::Request<spi_impl::ExchangeVector, ___T>,
1622
1623 responder: ::fidl_next::Responder<spi_impl::ExchangeVector, ___T>,
1624 ) -> impl ::core::future::Future<Output = ()>;
1625
1626 #[doc = " Lock the bus.\n"]
1627 fn lock_bus(
1628 &mut self,
1629
1630 request: ::fidl_next::Request<spi_impl::LockBus, ___T>,
1631
1632 responder: ::fidl_next::Responder<spi_impl::LockBus, ___T>,
1633 ) -> impl ::core::future::Future<Output = ()>;
1634
1635 #[doc = " Unlock the bus.\n"]
1636 fn unlock_bus(
1637 &mut self,
1638
1639 request: ::fidl_next::Request<spi_impl::UnlockBus, ___T>,
1640
1641 responder: ::fidl_next::Responder<spi_impl::UnlockBus, ___T>,
1642 ) -> impl ::core::future::Future<Output = ()>;
1643
1644 #[doc = " rights is a bit field containing SpiVmoRight values, and determines the read/write\n permissions used by the implementation when pinning or mapping the VMO.\n"]
1645 fn register_vmo(
1646 &mut self,
1647
1648 request: ::fidl_next::Request<spi_impl::RegisterVmo, ___T>,
1649
1650 responder: ::fidl_next::Responder<spi_impl::RegisterVmo, ___T>,
1651 ) -> impl ::core::future::Future<Output = ()>;
1652
1653 fn unregister_vmo(
1654 &mut self,
1655
1656 request: ::fidl_next::Request<spi_impl::UnregisterVmo, ___T>,
1657
1658 responder: ::fidl_next::Responder<spi_impl::UnregisterVmo, ___T>,
1659 ) -> impl ::core::future::Future<Output = ()>;
1660
1661 #[doc = " Release all VMOs registered to this chip_select. Called by the core driver after the client\n has disconnected and the VMOs are no longer needed.\n"]
1662 fn release_registered_vmos(
1663 &mut self,
1664
1665 request: ::fidl_next::Request<spi_impl::ReleaseRegisteredVmos, ___T>,
1666 ) -> impl ::core::future::Future<Output = ()>;
1667
1668 fn transmit_vmo(
1669 &mut self,
1670
1671 request: ::fidl_next::Request<spi_impl::TransmitVmo, ___T>,
1672
1673 responder: ::fidl_next::Responder<spi_impl::TransmitVmo, ___T>,
1674 ) -> impl ::core::future::Future<Output = ()>;
1675
1676 fn receive_vmo(
1677 &mut self,
1678
1679 request: ::fidl_next::Request<spi_impl::ReceiveVmo, ___T>,
1680
1681 responder: ::fidl_next::Responder<spi_impl::ReceiveVmo, ___T>,
1682 ) -> impl ::core::future::Future<Output = ()>;
1683
1684 fn exchange_vmo(
1685 &mut self,
1686
1687 request: ::fidl_next::Request<spi_impl::ExchangeVmo, ___T>,
1688
1689 responder: ::fidl_next::Responder<spi_impl::ExchangeVmo, ___T>,
1690 ) -> impl ::core::future::Future<Output = ()>;
1691}
1692
1693impl<___H, ___T> ::fidl_next::DispatchLocalServerMessage<___H, ___T> for SpiImpl
1694where
1695 ___H: SpiImplLocalServerHandler<___T>,
1696 ___T: ::fidl_next::Transport,
1697 for<'de> crate::wire::SpiImplTransmitVectorRequest<'de>: ::fidl_next::Decode<
1698 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1699 Constraint = (),
1700 >,
1701 for<'de> crate::wire::SpiImplReceiveVectorRequest: ::fidl_next::Decode<
1702 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1703 Constraint = (),
1704 >,
1705 for<'de> crate::wire::SpiImplExchangeVectorRequest<'de>: ::fidl_next::Decode<
1706 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1707 Constraint = (),
1708 >,
1709 for<'de> crate::wire::SpiImplLockBusRequest: ::fidl_next::Decode<
1710 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1711 Constraint = (),
1712 >,
1713 for<'de> crate::wire::SpiImplUnlockBusRequest: ::fidl_next::Decode<
1714 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1715 Constraint = (),
1716 >,
1717 for<'de> crate::wire::SpiImplRegisterVmoRequest: ::fidl_next::Decode<
1718 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1719 Constraint = (),
1720 >,
1721 for<'de> crate::wire::SpiImplUnregisterVmoRequest: ::fidl_next::Decode<
1722 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1723 Constraint = (),
1724 >,
1725 for<'de> crate::wire::SpiImplReleaseRegisteredVmosRequest: ::fidl_next::Decode<
1726 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1727 Constraint = (),
1728 >,
1729 for<'de> crate::wire::SpiImplTransmitVmoRequest: ::fidl_next::Decode<
1730 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1731 Constraint = (),
1732 >,
1733 for<'de> crate::wire::SpiImplReceiveVmoRequest: ::fidl_next::Decode<
1734 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1735 Constraint = (),
1736 >,
1737 for<'de> crate::wire::SpiImplExchangeVmoRequest: ::fidl_next::Decode<
1738 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
1739 Constraint = (),
1740 >,
1741{
1742 async fn on_one_way(
1743 handler: &mut ___H,
1744 mut message: ::fidl_next::Message<___T>,
1745 ) -> ::core::result::Result<
1746 (),
1747 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
1748 > {
1749 match *message.header().ordinal {
1750 5302547493468731494 => match ::fidl_next::AsDecoderExt::into_decoded(message) {
1751 Ok(decoded) => {
1752 handler
1753 .release_registered_vmos(::fidl_next::Request::from_decoded(decoded))
1754 .await;
1755 Ok(())
1756 }
1757 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1758 ordinal: 5302547493468731494,
1759 error,
1760 }),
1761 },
1762
1763 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
1764 }
1765 }
1766
1767 async fn on_two_way(
1768 handler: &mut ___H,
1769 mut message: ::fidl_next::Message<___T>,
1770 responder: ::fidl_next::protocol::Responder<___T>,
1771 ) -> ::core::result::Result<
1772 (),
1773 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
1774 > {
1775 match *message.header().ordinal {
1776 4261972386852856527 => {
1777 let responder = ::fidl_next::Responder::from_untyped(responder);
1778
1779 handler.get_chip_select_count(responder).await;
1780 Ok(())
1781 }
1782
1783 7287789131276374998 => {
1784 let responder = ::fidl_next::Responder::from_untyped(responder);
1785
1786 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1787 Ok(decoded) => {
1788 handler
1789 .transmit_vector(::fidl_next::Request::from_decoded(decoded), responder)
1790 .await;
1791 Ok(())
1792 }
1793 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1794 ordinal: 7287789131276374998,
1795 error,
1796 }),
1797 }
1798 }
1799
1800 4813495552606122700 => {
1801 let responder = ::fidl_next::Responder::from_untyped(responder);
1802
1803 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1804 Ok(decoded) => {
1805 handler
1806 .receive_vector(::fidl_next::Request::from_decoded(decoded), responder)
1807 .await;
1808 Ok(())
1809 }
1810 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1811 ordinal: 4813495552606122700,
1812 error,
1813 }),
1814 }
1815 }
1816
1817 3844617764012354164 => {
1818 let responder = ::fidl_next::Responder::from_untyped(responder);
1819
1820 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1821 Ok(decoded) => {
1822 handler
1823 .exchange_vector(::fidl_next::Request::from_decoded(decoded), responder)
1824 .await;
1825 Ok(())
1826 }
1827 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1828 ordinal: 3844617764012354164,
1829 error,
1830 }),
1831 }
1832 }
1833
1834 9187537331803160557 => {
1835 let responder = ::fidl_next::Responder::from_untyped(responder);
1836
1837 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1838 Ok(decoded) => {
1839 handler
1840 .lock_bus(::fidl_next::Request::from_decoded(decoded), responder)
1841 .await;
1842 Ok(())
1843 }
1844 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1845 ordinal: 9187537331803160557,
1846 error,
1847 }),
1848 }
1849 }
1850
1851 3150764477565251378 => {
1852 let responder = ::fidl_next::Responder::from_untyped(responder);
1853
1854 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1855 Ok(decoded) => {
1856 handler
1857 .unlock_bus(::fidl_next::Request::from_decoded(decoded), responder)
1858 .await;
1859 Ok(())
1860 }
1861 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1862 ordinal: 3150764477565251378,
1863 error,
1864 }),
1865 }
1866 }
1867
1868 2270783649342134233 => {
1869 let responder = ::fidl_next::Responder::from_untyped(responder);
1870
1871 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1872 Ok(decoded) => {
1873 handler
1874 .register_vmo(::fidl_next::Request::from_decoded(decoded), responder)
1875 .await;
1876 Ok(())
1877 }
1878 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1879 ordinal: 2270783649342134233,
1880 error,
1881 }),
1882 }
1883 }
1884
1885 8778583385931240091 => {
1886 let responder = ::fidl_next::Responder::from_untyped(responder);
1887
1888 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1889 Ok(decoded) => {
1890 handler
1891 .unregister_vmo(::fidl_next::Request::from_decoded(decoded), responder)
1892 .await;
1893 Ok(())
1894 }
1895 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1896 ordinal: 8778583385931240091,
1897 error,
1898 }),
1899 }
1900 }
1901
1902 1490935665662854691 => {
1903 let responder = ::fidl_next::Responder::from_untyped(responder);
1904
1905 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1906 Ok(decoded) => {
1907 handler
1908 .transmit_vmo(::fidl_next::Request::from_decoded(decoded), responder)
1909 .await;
1910 Ok(())
1911 }
1912 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1913 ordinal: 1490935665662854691,
1914 error,
1915 }),
1916 }
1917 }
1918
1919 7091744647492940488 => {
1920 let responder = ::fidl_next::Responder::from_untyped(responder);
1921
1922 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1923 Ok(decoded) => {
1924 handler
1925 .receive_vmo(::fidl_next::Request::from_decoded(decoded), responder)
1926 .await;
1927 Ok(())
1928 }
1929 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1930 ordinal: 7091744647492940488,
1931 error,
1932 }),
1933 }
1934 }
1935
1936 3592177641282126076 => {
1937 let responder = ::fidl_next::Responder::from_untyped(responder);
1938
1939 match ::fidl_next::AsDecoderExt::into_decoded(message) {
1940 Ok(decoded) => {
1941 handler
1942 .exchange_vmo(::fidl_next::Request::from_decoded(decoded), responder)
1943 .await;
1944 Ok(())
1945 }
1946 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
1947 ordinal: 3592177641282126076,
1948 error,
1949 }),
1950 }
1951 }
1952
1953 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
1954 }
1955 }
1956}
1957
1958pub trait SpiImplClientHandler<
1962 #[cfg(feature = "driver")] ___T: ::fidl_next::Transport = ::fdf_fidl::DriverChannel,
1963 #[cfg(not(feature = "driver"))] ___T: ::fidl_next::Transport,
1964>
1965{
1966}
1967
1968impl<___H, ___T> ::fidl_next::DispatchClientMessage<___H, ___T> for SpiImpl
1969where
1970 ___H: SpiImplClientHandler<___T> + ::core::marker::Send,
1971 ___T: ::fidl_next::Transport,
1972{
1973 async fn on_event(
1974 handler: &mut ___H,
1975 mut message: ::fidl_next::Message<___T>,
1976 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
1977 match *message.header().ordinal {
1978 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
1979 }
1980 }
1981}
1982
1983pub trait SpiImplServerHandler<
1987 #[cfg(feature = "driver")] ___T: ::fidl_next::Transport = ::fdf_fidl::DriverChannel,
1988 #[cfg(not(feature = "driver"))] ___T: ::fidl_next::Transport,
1989>
1990{
1991 #[doc = " Returns the number of chip select lines available or provided by the driver instance.\n To be used as a limit on the acceptable values for the `chip_select\' field in the Exchange()\n and ExchangeVmo() methods.\n"]
1992 fn get_chip_select_count(
1993 &mut self,
1994
1995 responder: ::fidl_next::Responder<spi_impl::GetChipSelectCount, ___T>,
1996 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
1997
1998 #[doc = " Half-duplex transmit data to a SPI device; always transmits the entire buffer on success.\n"]
1999 fn transmit_vector(
2000 &mut self,
2001
2002 request: ::fidl_next::Request<spi_impl::TransmitVector, ___T>,
2003
2004 responder: ::fidl_next::Responder<spi_impl::TransmitVector, ___T>,
2005 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2006
2007 #[doc = " Half-duplex receive data from a SPI device; always reads the full size requested.\n"]
2008 fn receive_vector(
2009 &mut self,
2010
2011 request: ::fidl_next::Request<spi_impl::ReceiveVector, ___T>,
2012
2013 responder: ::fidl_next::Responder<spi_impl::ReceiveVector, ___T>,
2014 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2015
2016 #[doc = " Full-duplex SPI transaction. Received data will exactly equal the length of the transmit\n buffer.\n"]
2017 fn exchange_vector(
2018 &mut self,
2019
2020 request: ::fidl_next::Request<spi_impl::ExchangeVector, ___T>,
2021
2022 responder: ::fidl_next::Responder<spi_impl::ExchangeVector, ___T>,
2023 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2024
2025 #[doc = " Lock the bus.\n"]
2026 fn lock_bus(
2027 &mut self,
2028
2029 request: ::fidl_next::Request<spi_impl::LockBus, ___T>,
2030
2031 responder: ::fidl_next::Responder<spi_impl::LockBus, ___T>,
2032 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2033
2034 #[doc = " Unlock the bus.\n"]
2035 fn unlock_bus(
2036 &mut self,
2037
2038 request: ::fidl_next::Request<spi_impl::UnlockBus, ___T>,
2039
2040 responder: ::fidl_next::Responder<spi_impl::UnlockBus, ___T>,
2041 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2042
2043 #[doc = " rights is a bit field containing SpiVmoRight values, and determines the read/write\n permissions used by the implementation when pinning or mapping the VMO.\n"]
2044 fn register_vmo(
2045 &mut self,
2046
2047 request: ::fidl_next::Request<spi_impl::RegisterVmo, ___T>,
2048
2049 responder: ::fidl_next::Responder<spi_impl::RegisterVmo, ___T>,
2050 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2051
2052 fn unregister_vmo(
2053 &mut self,
2054
2055 request: ::fidl_next::Request<spi_impl::UnregisterVmo, ___T>,
2056
2057 responder: ::fidl_next::Responder<spi_impl::UnregisterVmo, ___T>,
2058 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2059
2060 #[doc = " Release all VMOs registered to this chip_select. Called by the core driver after the client\n has disconnected and the VMOs are no longer needed.\n"]
2061 fn release_registered_vmos(
2062 &mut self,
2063
2064 request: ::fidl_next::Request<spi_impl::ReleaseRegisteredVmos, ___T>,
2065 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2066
2067 fn transmit_vmo(
2068 &mut self,
2069
2070 request: ::fidl_next::Request<spi_impl::TransmitVmo, ___T>,
2071
2072 responder: ::fidl_next::Responder<spi_impl::TransmitVmo, ___T>,
2073 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2074
2075 fn receive_vmo(
2076 &mut self,
2077
2078 request: ::fidl_next::Request<spi_impl::ReceiveVmo, ___T>,
2079
2080 responder: ::fidl_next::Responder<spi_impl::ReceiveVmo, ___T>,
2081 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2082
2083 fn exchange_vmo(
2084 &mut self,
2085
2086 request: ::fidl_next::Request<spi_impl::ExchangeVmo, ___T>,
2087
2088 responder: ::fidl_next::Responder<spi_impl::ExchangeVmo, ___T>,
2089 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
2090}
2091
2092impl<___H, ___T> ::fidl_next::DispatchServerMessage<___H, ___T> for SpiImpl
2093where
2094 ___H: SpiImplServerHandler<___T> + ::core::marker::Send,
2095 ___T: ::fidl_next::Transport,
2096 for<'de> crate::wire::SpiImplTransmitVectorRequest<'de>: ::fidl_next::Decode<
2097 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2098 Constraint = (),
2099 >,
2100 for<'de> crate::wire::SpiImplReceiveVectorRequest: ::fidl_next::Decode<
2101 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2102 Constraint = (),
2103 >,
2104 for<'de> crate::wire::SpiImplExchangeVectorRequest<'de>: ::fidl_next::Decode<
2105 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2106 Constraint = (),
2107 >,
2108 for<'de> crate::wire::SpiImplLockBusRequest: ::fidl_next::Decode<
2109 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2110 Constraint = (),
2111 >,
2112 for<'de> crate::wire::SpiImplUnlockBusRequest: ::fidl_next::Decode<
2113 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2114 Constraint = (),
2115 >,
2116 for<'de> crate::wire::SpiImplRegisterVmoRequest: ::fidl_next::Decode<
2117 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2118 Constraint = (),
2119 >,
2120 for<'de> crate::wire::SpiImplUnregisterVmoRequest: ::fidl_next::Decode<
2121 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2122 Constraint = (),
2123 >,
2124 for<'de> crate::wire::SpiImplReleaseRegisteredVmosRequest: ::fidl_next::Decode<
2125 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2126 Constraint = (),
2127 >,
2128 for<'de> crate::wire::SpiImplTransmitVmoRequest: ::fidl_next::Decode<
2129 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2130 Constraint = (),
2131 >,
2132 for<'de> crate::wire::SpiImplReceiveVmoRequest: ::fidl_next::Decode<
2133 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2134 Constraint = (),
2135 >,
2136 for<'de> crate::wire::SpiImplExchangeVmoRequest: ::fidl_next::Decode<
2137 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2138 Constraint = (),
2139 >,
2140{
2141 async fn on_one_way(
2142 handler: &mut ___H,
2143 mut message: ::fidl_next::Message<___T>,
2144 ) -> ::core::result::Result<
2145 (),
2146 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
2147 > {
2148 match *message.header().ordinal {
2149 5302547493468731494 => match ::fidl_next::AsDecoderExt::into_decoded(message) {
2150 Ok(decoded) => {
2151 handler
2152 .release_registered_vmos(::fidl_next::Request::from_decoded(decoded))
2153 .await;
2154 Ok(())
2155 }
2156 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2157 ordinal: 5302547493468731494,
2158 error,
2159 }),
2160 },
2161
2162 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
2163 }
2164 }
2165
2166 async fn on_two_way(
2167 handler: &mut ___H,
2168 mut message: ::fidl_next::Message<___T>,
2169 responder: ::fidl_next::protocol::Responder<___T>,
2170 ) -> ::core::result::Result<
2171 (),
2172 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
2173 > {
2174 match *message.header().ordinal {
2175 4261972386852856527 => {
2176 let responder = ::fidl_next::Responder::from_untyped(responder);
2177
2178 handler.get_chip_select_count(responder).await;
2179 Ok(())
2180 }
2181
2182 7287789131276374998 => {
2183 let responder = ::fidl_next::Responder::from_untyped(responder);
2184
2185 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2186 Ok(decoded) => {
2187 handler
2188 .transmit_vector(::fidl_next::Request::from_decoded(decoded), responder)
2189 .await;
2190 Ok(())
2191 }
2192 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2193 ordinal: 7287789131276374998,
2194 error,
2195 }),
2196 }
2197 }
2198
2199 4813495552606122700 => {
2200 let responder = ::fidl_next::Responder::from_untyped(responder);
2201
2202 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2203 Ok(decoded) => {
2204 handler
2205 .receive_vector(::fidl_next::Request::from_decoded(decoded), responder)
2206 .await;
2207 Ok(())
2208 }
2209 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2210 ordinal: 4813495552606122700,
2211 error,
2212 }),
2213 }
2214 }
2215
2216 3844617764012354164 => {
2217 let responder = ::fidl_next::Responder::from_untyped(responder);
2218
2219 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2220 Ok(decoded) => {
2221 handler
2222 .exchange_vector(::fidl_next::Request::from_decoded(decoded), responder)
2223 .await;
2224 Ok(())
2225 }
2226 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2227 ordinal: 3844617764012354164,
2228 error,
2229 }),
2230 }
2231 }
2232
2233 9187537331803160557 => {
2234 let responder = ::fidl_next::Responder::from_untyped(responder);
2235
2236 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2237 Ok(decoded) => {
2238 handler
2239 .lock_bus(::fidl_next::Request::from_decoded(decoded), responder)
2240 .await;
2241 Ok(())
2242 }
2243 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2244 ordinal: 9187537331803160557,
2245 error,
2246 }),
2247 }
2248 }
2249
2250 3150764477565251378 => {
2251 let responder = ::fidl_next::Responder::from_untyped(responder);
2252
2253 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2254 Ok(decoded) => {
2255 handler
2256 .unlock_bus(::fidl_next::Request::from_decoded(decoded), responder)
2257 .await;
2258 Ok(())
2259 }
2260 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2261 ordinal: 3150764477565251378,
2262 error,
2263 }),
2264 }
2265 }
2266
2267 2270783649342134233 => {
2268 let responder = ::fidl_next::Responder::from_untyped(responder);
2269
2270 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2271 Ok(decoded) => {
2272 handler
2273 .register_vmo(::fidl_next::Request::from_decoded(decoded), responder)
2274 .await;
2275 Ok(())
2276 }
2277 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2278 ordinal: 2270783649342134233,
2279 error,
2280 }),
2281 }
2282 }
2283
2284 8778583385931240091 => {
2285 let responder = ::fidl_next::Responder::from_untyped(responder);
2286
2287 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2288 Ok(decoded) => {
2289 handler
2290 .unregister_vmo(::fidl_next::Request::from_decoded(decoded), responder)
2291 .await;
2292 Ok(())
2293 }
2294 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2295 ordinal: 8778583385931240091,
2296 error,
2297 }),
2298 }
2299 }
2300
2301 1490935665662854691 => {
2302 let responder = ::fidl_next::Responder::from_untyped(responder);
2303
2304 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2305 Ok(decoded) => {
2306 handler
2307 .transmit_vmo(::fidl_next::Request::from_decoded(decoded), responder)
2308 .await;
2309 Ok(())
2310 }
2311 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2312 ordinal: 1490935665662854691,
2313 error,
2314 }),
2315 }
2316 }
2317
2318 7091744647492940488 => {
2319 let responder = ::fidl_next::Responder::from_untyped(responder);
2320
2321 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2322 Ok(decoded) => {
2323 handler
2324 .receive_vmo(::fidl_next::Request::from_decoded(decoded), responder)
2325 .await;
2326 Ok(())
2327 }
2328 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2329 ordinal: 7091744647492940488,
2330 error,
2331 }),
2332 }
2333 }
2334
2335 3592177641282126076 => {
2336 let responder = ::fidl_next::Responder::from_untyped(responder);
2337
2338 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2339 Ok(decoded) => {
2340 handler
2341 .exchange_vmo(::fidl_next::Request::from_decoded(decoded), responder)
2342 .await;
2343 Ok(())
2344 }
2345 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2346 ordinal: 3592177641282126076,
2347 error,
2348 }),
2349 }
2350 }
2351
2352 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
2353 }
2354 }
2355}
2356
2357impl<___T> SpiImplClientHandler<___T> for ::fidl_next::IgnoreEvents where
2358 ___T: ::fidl_next::Transport
2359{
2360}
2361
2362impl<___H, ___T> SpiImplLocalClientHandler<___T> for ::fidl_next::Local<___H>
2363where
2364 ___H: SpiImplClientHandler<___T>,
2365 ___T: ::fidl_next::Transport,
2366{
2367}
2368
2369impl<___H, ___T> SpiImplLocalServerHandler<___T> for ::fidl_next::Local<___H>
2370where
2371 ___H: SpiImplServerHandler<___T>,
2372 ___T: ::fidl_next::Transport,
2373{
2374 async fn get_chip_select_count(
2375 &mut self,
2376
2377 responder: ::fidl_next::Responder<spi_impl::GetChipSelectCount, ___T>,
2378 ) {
2379 ___H::get_chip_select_count(&mut self.0, responder).await
2380 }
2381
2382 async fn transmit_vector(
2383 &mut self,
2384
2385 request: ::fidl_next::Request<spi_impl::TransmitVector, ___T>,
2386
2387 responder: ::fidl_next::Responder<spi_impl::TransmitVector, ___T>,
2388 ) {
2389 ___H::transmit_vector(&mut self.0, request, responder).await
2390 }
2391
2392 async fn receive_vector(
2393 &mut self,
2394
2395 request: ::fidl_next::Request<spi_impl::ReceiveVector, ___T>,
2396
2397 responder: ::fidl_next::Responder<spi_impl::ReceiveVector, ___T>,
2398 ) {
2399 ___H::receive_vector(&mut self.0, request, responder).await
2400 }
2401
2402 async fn exchange_vector(
2403 &mut self,
2404
2405 request: ::fidl_next::Request<spi_impl::ExchangeVector, ___T>,
2406
2407 responder: ::fidl_next::Responder<spi_impl::ExchangeVector, ___T>,
2408 ) {
2409 ___H::exchange_vector(&mut self.0, request, responder).await
2410 }
2411
2412 async fn lock_bus(
2413 &mut self,
2414
2415 request: ::fidl_next::Request<spi_impl::LockBus, ___T>,
2416
2417 responder: ::fidl_next::Responder<spi_impl::LockBus, ___T>,
2418 ) {
2419 ___H::lock_bus(&mut self.0, request, responder).await
2420 }
2421
2422 async fn unlock_bus(
2423 &mut self,
2424
2425 request: ::fidl_next::Request<spi_impl::UnlockBus, ___T>,
2426
2427 responder: ::fidl_next::Responder<spi_impl::UnlockBus, ___T>,
2428 ) {
2429 ___H::unlock_bus(&mut self.0, request, responder).await
2430 }
2431
2432 async fn register_vmo(
2433 &mut self,
2434
2435 request: ::fidl_next::Request<spi_impl::RegisterVmo, ___T>,
2436
2437 responder: ::fidl_next::Responder<spi_impl::RegisterVmo, ___T>,
2438 ) {
2439 ___H::register_vmo(&mut self.0, request, responder).await
2440 }
2441
2442 async fn unregister_vmo(
2443 &mut self,
2444
2445 request: ::fidl_next::Request<spi_impl::UnregisterVmo, ___T>,
2446
2447 responder: ::fidl_next::Responder<spi_impl::UnregisterVmo, ___T>,
2448 ) {
2449 ___H::unregister_vmo(&mut self.0, request, responder).await
2450 }
2451
2452 async fn release_registered_vmos(
2453 &mut self,
2454
2455 request: ::fidl_next::Request<spi_impl::ReleaseRegisteredVmos, ___T>,
2456 ) {
2457 ___H::release_registered_vmos(&mut self.0, request).await
2458 }
2459
2460 async fn transmit_vmo(
2461 &mut self,
2462
2463 request: ::fidl_next::Request<spi_impl::TransmitVmo, ___T>,
2464
2465 responder: ::fidl_next::Responder<spi_impl::TransmitVmo, ___T>,
2466 ) {
2467 ___H::transmit_vmo(&mut self.0, request, responder).await
2468 }
2469
2470 async fn receive_vmo(
2471 &mut self,
2472
2473 request: ::fidl_next::Request<spi_impl::ReceiveVmo, ___T>,
2474
2475 responder: ::fidl_next::Responder<spi_impl::ReceiveVmo, ___T>,
2476 ) {
2477 ___H::receive_vmo(&mut self.0, request, responder).await
2478 }
2479
2480 async fn exchange_vmo(
2481 &mut self,
2482
2483 request: ::fidl_next::Request<spi_impl::ExchangeVmo, ___T>,
2484
2485 responder: ::fidl_next::Responder<spi_impl::ExchangeVmo, ___T>,
2486 ) {
2487 ___H::exchange_vmo(&mut self.0, request, responder).await
2488 }
2489}
2490
2491pub use fidl_next_common_fuchsia_hardware_spiimpl::*;