1#![warn(clippy::all)]
3#![allow(unused_parens, unused_variables, unused_mut, unused_imports, unreachable_code)]
4
5pub mod natural {
6
7 pub use fidl_next_common_fuchsia_hardware_pci::natural::*;
8
9 #[derive(Debug, PartialEq)]
10 pub struct IoBar {
11 pub address: u64,
12
13 pub resource: ::fidl_next::fuchsia::zx::Resource,
14 }
15
16 unsafe impl<___E> ::fidl_next::Encode<crate::wire::IoBar, ___E> for IoBar
17 where
18 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
19 ___E: ::fidl_next::fuchsia::HandleEncoder,
20 {
21 #[inline]
22 fn encode(
23 self,
24 encoder_: &mut ___E,
25 out_: &mut ::core::mem::MaybeUninit<crate::wire::IoBar>,
26 _: (),
27 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
28 ::fidl_next::munge! {
29 let crate::wire::IoBar {
30 address,
31 resource,
32
33 } = out_;
34 }
35
36 ::fidl_next::Encode::encode(self.address, encoder_, address, ())?;
37
38 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(address.as_mut_ptr()) };
39
40 ::fidl_next::Encode::encode(self.resource, encoder_, resource, ())?;
41
42 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(resource.as_mut_ptr()) };
43
44 Ok(())
45 }
46 }
47
48 unsafe impl<___E>
49 ::fidl_next::EncodeOption<::fidl_next::wire::Box<'static, crate::wire::IoBar>, ___E>
50 for IoBar
51 where
52 ___E: ::fidl_next::Encoder + ?Sized,
53 IoBar: ::fidl_next::Encode<crate::wire::IoBar, ___E>,
54 {
55 #[inline]
56 fn encode_option(
57 this: ::core::option::Option<Self>,
58 encoder: &mut ___E,
59 out: &mut ::core::mem::MaybeUninit<::fidl_next::wire::Box<'static, crate::wire::IoBar>>,
60 _: (),
61 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
62 if let Some(inner) = this {
63 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
64 ::fidl_next::wire::Box::encode_present(out);
65 } else {
66 ::fidl_next::wire::Box::encode_absent(out);
67 }
68
69 Ok(())
70 }
71 }
72
73 impl ::fidl_next::FromWire<crate::wire::IoBar> for IoBar {
74 #[inline]
75 fn from_wire(wire: crate::wire::IoBar) -> Self {
76 Self {
77 address: ::fidl_next::FromWire::from_wire(wire.address),
78
79 resource: ::fidl_next::FromWire::from_wire(wire.resource),
80 }
81 }
82 }
83
84 #[derive(Debug, PartialEq)]
85 pub enum BarResult {
86 Io(crate::natural::IoBar),
87
88 Vmo(::fidl_next::fuchsia::zx::Vmo),
89
90 UnknownOrdinal_(u64),
91 }
92
93 impl BarResult {
94 pub fn is_unknown(&self) -> bool {
95 #[allow(unreachable_patterns)]
96 match self {
97 Self::UnknownOrdinal_(_) => true,
98 _ => false,
99 }
100 }
101 }
102
103 unsafe impl<___E> ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E> for BarResult
104 where
105 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
106 ___E: ::fidl_next::Encoder,
107 ___E: ::fidl_next::fuchsia::HandleEncoder,
108 {
109 #[inline]
110 fn encode(
111 self,
112 encoder: &mut ___E,
113 out: &mut ::core::mem::MaybeUninit<crate::wire::BarResult<'static>>,
114 _: (),
115 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
116 ::fidl_next::munge!(let crate::wire::BarResult { raw, _phantom: _ } = out);
117
118 match self {
119 Self::Io(value) => ::fidl_next::wire::Union::encode_as::<___E, crate::wire::IoBar>(
120 value,
121 1,
122 encoder,
123 raw,
124 (),
125 )?,
126
127 Self::Vmo(value) => ::fidl_next::wire::Union::encode_as::<
128 ___E,
129 ::fidl_next::wire::fuchsia::Vmo,
130 >(value, 2, encoder, raw, ())?,
131
132 Self::UnknownOrdinal_(ordinal) => {
133 return Err(::fidl_next::EncodeError::UnknownUnionOrdinal(ordinal as usize));
134 }
135 }
136
137 Ok(())
138 }
139 }
140
141 unsafe impl<___E> ::fidl_next::EncodeOption<crate::wire_optional::BarResult<'static>, ___E>
142 for BarResult
143 where
144 ___E: ?Sized,
145 BarResult: ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E>,
146 {
147 #[inline]
148 fn encode_option(
149 this: ::core::option::Option<Self>,
150 encoder: &mut ___E,
151 out: &mut ::core::mem::MaybeUninit<crate::wire_optional::BarResult<'static>>,
152 _: (),
153 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
154 ::fidl_next::munge!(let crate::wire_optional::BarResult { raw, _phantom: _ } = &mut *out);
155
156 if let Some(inner) = this {
157 let value_out = unsafe { &mut *out.as_mut_ptr().cast() };
158 ::fidl_next::Encode::encode(inner, encoder, value_out, ())?;
159 } else {
160 ::fidl_next::wire::Union::encode_absent(raw);
161 }
162
163 Ok(())
164 }
165 }
166
167 impl<'de> ::fidl_next::FromWire<crate::wire::BarResult<'de>> for BarResult {
168 #[inline]
169 fn from_wire(wire: crate::wire::BarResult<'de>) -> Self {
170 let wire = ::core::mem::ManuallyDrop::new(wire);
171 match wire.raw.ordinal() {
172 1 => Self::Io(::fidl_next::FromWire::from_wire(unsafe {
173 wire.raw.get().read_unchecked::<crate::wire::IoBar>()
174 })),
175
176 2 => Self::Vmo(::fidl_next::FromWire::from_wire(unsafe {
177 wire.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
178 })),
179
180 ord => return Self::UnknownOrdinal_(ord as u64),
181 }
182 }
183 }
184
185 impl<'de> ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>> for BarResult {
186 #[inline]
187 fn from_wire_option(
188 wire: crate::wire_optional::BarResult<'de>,
189 ) -> ::core::option::Option<Self> {
190 if let Some(inner) = wire.into_option() {
191 Some(::fidl_next::FromWire::from_wire(inner))
192 } else {
193 None
194 }
195 }
196 }
197
198 impl<'de> ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>> for Box<BarResult> {
199 #[inline]
200 fn from_wire_option(
201 wire: crate::wire_optional::BarResult<'de>,
202 ) -> ::core::option::Option<Self> {
203 <
204 BarResult as ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>>
205 >::from_wire_option(wire).map(Box::new)
206 }
207 }
208
209 #[doc = " Describes and provides access to a given Base Address Register for the device.\n"]
210 #[derive(Debug, PartialEq)]
211 pub struct Bar {
212 pub bar_id: u32,
213
214 pub size: u64,
215
216 pub result: crate::natural::BarResult,
217 }
218
219 unsafe impl<___E> ::fidl_next::Encode<crate::wire::Bar<'static>, ___E> for Bar
220 where
221 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
222 ___E: ::fidl_next::Encoder,
223 ___E: ::fidl_next::fuchsia::HandleEncoder,
224 {
225 #[inline]
226 fn encode(
227 self,
228 encoder_: &mut ___E,
229 out_: &mut ::core::mem::MaybeUninit<crate::wire::Bar<'static>>,
230 _: (),
231 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
232 ::fidl_next::munge! {
233 let crate::wire::Bar {
234 bar_id,
235 size,
236 result,
237
238 } = out_;
239 }
240
241 ::fidl_next::Encode::encode(self.bar_id, encoder_, bar_id, ())?;
242
243 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(bar_id.as_mut_ptr()) };
244
245 ::fidl_next::Encode::encode(self.size, encoder_, size, ())?;
246
247 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(size.as_mut_ptr()) };
248
249 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
250
251 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(result.as_mut_ptr()) };
252
253 Ok(())
254 }
255 }
256
257 unsafe impl<___E>
258 ::fidl_next::EncodeOption<::fidl_next::wire::Box<'static, crate::wire::Bar<'static>>, ___E>
259 for Bar
260 where
261 ___E: ::fidl_next::Encoder + ?Sized,
262 Bar: ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>,
263 {
264 #[inline]
265 fn encode_option(
266 this: ::core::option::Option<Self>,
267 encoder: &mut ___E,
268 out: &mut ::core::mem::MaybeUninit<
269 ::fidl_next::wire::Box<'static, crate::wire::Bar<'static>>,
270 >,
271 _: (),
272 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
273 if let Some(inner) = this {
274 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
275 ::fidl_next::wire::Box::encode_present(out);
276 } else {
277 ::fidl_next::wire::Box::encode_absent(out);
278 }
279
280 Ok(())
281 }
282 }
283
284 impl<'de> ::fidl_next::FromWire<crate::wire::Bar<'de>> for Bar {
285 #[inline]
286 fn from_wire(wire: crate::wire::Bar<'de>) -> Self {
287 Self {
288 bar_id: ::fidl_next::FromWire::from_wire(wire.bar_id),
289
290 size: ::fidl_next::FromWire::from_wire(wire.size),
291
292 result: ::fidl_next::FromWire::from_wire(wire.result),
293 }
294 }
295 }
296
297 #[derive(Debug, PartialEq)]
298 pub struct DeviceGetBarResponse {
299 pub result: crate::natural::Bar,
300 }
301
302 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>
303 for DeviceGetBarResponse
304 where
305 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
306 ___E: ::fidl_next::Encoder,
307 ___E: ::fidl_next::fuchsia::HandleEncoder,
308 {
309 #[inline]
310 fn encode(
311 self,
312 encoder_: &mut ___E,
313 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBarResponse<'static>>,
314 _: (),
315 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
316 ::fidl_next::munge! {
317 let crate::wire::DeviceGetBarResponse {
318 result,
319
320 } = out_;
321 }
322
323 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
324
325 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(result.as_mut_ptr()) };
326
327 Ok(())
328 }
329 }
330
331 unsafe impl<___E>
332 ::fidl_next::EncodeOption<
333 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBarResponse<'static>>,
334 ___E,
335 > for DeviceGetBarResponse
336 where
337 ___E: ::fidl_next::Encoder + ?Sized,
338 DeviceGetBarResponse: ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>,
339 {
340 #[inline]
341 fn encode_option(
342 this: ::core::option::Option<Self>,
343 encoder: &mut ___E,
344 out: &mut ::core::mem::MaybeUninit<
345 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBarResponse<'static>>,
346 >,
347 _: (),
348 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
349 if let Some(inner) = this {
350 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
351 ::fidl_next::wire::Box::encode_present(out);
352 } else {
353 ::fidl_next::wire::Box::encode_absent(out);
354 }
355
356 Ok(())
357 }
358 }
359
360 impl<'de> ::fidl_next::FromWire<crate::wire::DeviceGetBarResponse<'de>> for DeviceGetBarResponse {
361 #[inline]
362 fn from_wire(wire: crate::wire::DeviceGetBarResponse<'de>) -> Self {
363 Self { result: ::fidl_next::FromWire::from_wire(wire.result) }
364 }
365 }
366
367 #[derive(Debug, PartialEq)]
368 #[repr(C)]
369 pub struct DeviceMapInterruptResponse {
370 pub interrupt: ::fidl_next::fuchsia::zx::Interrupt,
371 }
372
373 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>
374 for DeviceMapInterruptResponse
375 where
376 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
377 ___E: ::fidl_next::fuchsia::HandleEncoder,
378 {
379 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
380 Self,
381 crate::wire::DeviceMapInterruptResponse,
382 > = unsafe {
383 ::fidl_next::CopyOptimization::enable_if(
384 true && <::fidl_next::fuchsia::zx::Interrupt as ::fidl_next::Encode<
385 ::fidl_next::wire::fuchsia::Interrupt,
386 ___E,
387 >>::COPY_OPTIMIZATION
388 .is_enabled(),
389 )
390 };
391
392 #[inline]
393 fn encode(
394 self,
395 encoder_: &mut ___E,
396 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceMapInterruptResponse>,
397 _: (),
398 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
399 ::fidl_next::munge! {
400 let crate::wire::DeviceMapInterruptResponse {
401 interrupt,
402
403 } = out_;
404 }
405
406 ::fidl_next::Encode::encode(self.interrupt, encoder_, interrupt, ())?;
407
408 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(interrupt.as_mut_ptr()) };
409
410 Ok(())
411 }
412 }
413
414 unsafe impl<___E>
415 ::fidl_next::EncodeOption<
416 ::fidl_next::wire::Box<'static, crate::wire::DeviceMapInterruptResponse>,
417 ___E,
418 > for DeviceMapInterruptResponse
419 where
420 ___E: ::fidl_next::Encoder + ?Sized,
421 DeviceMapInterruptResponse:
422 ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>,
423 {
424 #[inline]
425 fn encode_option(
426 this: ::core::option::Option<Self>,
427 encoder: &mut ___E,
428 out: &mut ::core::mem::MaybeUninit<
429 ::fidl_next::wire::Box<'static, crate::wire::DeviceMapInterruptResponse>,
430 >,
431 _: (),
432 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
433 if let Some(inner) = this {
434 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
435 ::fidl_next::wire::Box::encode_present(out);
436 } else {
437 ::fidl_next::wire::Box::encode_absent(out);
438 }
439
440 Ok(())
441 }
442 }
443
444 impl ::fidl_next::FromWire<crate::wire::DeviceMapInterruptResponse> for DeviceMapInterruptResponse {
445 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
446 crate::wire::DeviceMapInterruptResponse,
447 Self,
448 > = unsafe {
449 ::fidl_next::CopyOptimization::enable_if(
450 true && <::fidl_next::fuchsia::zx::Interrupt as ::fidl_next::FromWire<
451 ::fidl_next::wire::fuchsia::Interrupt,
452 >>::COPY_OPTIMIZATION
453 .is_enabled(),
454 )
455 };
456
457 #[inline]
458 fn from_wire(wire: crate::wire::DeviceMapInterruptResponse) -> Self {
459 Self { interrupt: ::fidl_next::FromWire::from_wire(wire.interrupt) }
460 }
461 }
462
463 #[derive(Debug, PartialEq)]
464 #[repr(C)]
465 pub struct DeviceGetBtiResponse {
466 pub bti: ::fidl_next::fuchsia::zx::Bti,
467 }
468
469 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>
470 for DeviceGetBtiResponse
471 where
472 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
473 ___E: ::fidl_next::fuchsia::HandleEncoder,
474 {
475 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
476 Self,
477 crate::wire::DeviceGetBtiResponse,
478 > = unsafe {
479 ::fidl_next::CopyOptimization::enable_if(
480 true && <::fidl_next::fuchsia::zx::Bti as ::fidl_next::Encode<
481 ::fidl_next::wire::fuchsia::Bti,
482 ___E,
483 >>::COPY_OPTIMIZATION
484 .is_enabled(),
485 )
486 };
487
488 #[inline]
489 fn encode(
490 self,
491 encoder_: &mut ___E,
492 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBtiResponse>,
493 _: (),
494 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
495 ::fidl_next::munge! {
496 let crate::wire::DeviceGetBtiResponse {
497 bti,
498
499 } = out_;
500 }
501
502 ::fidl_next::Encode::encode(self.bti, encoder_, bti, ())?;
503
504 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(bti.as_mut_ptr()) };
505
506 Ok(())
507 }
508 }
509
510 unsafe impl<___E>
511 ::fidl_next::EncodeOption<
512 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBtiResponse>,
513 ___E,
514 > for DeviceGetBtiResponse
515 where
516 ___E: ::fidl_next::Encoder + ?Sized,
517 DeviceGetBtiResponse: ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>,
518 {
519 #[inline]
520 fn encode_option(
521 this: ::core::option::Option<Self>,
522 encoder: &mut ___E,
523 out: &mut ::core::mem::MaybeUninit<
524 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBtiResponse>,
525 >,
526 _: (),
527 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
528 if let Some(inner) = this {
529 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
530 ::fidl_next::wire::Box::encode_present(out);
531 } else {
532 ::fidl_next::wire::Box::encode_absent(out);
533 }
534
535 Ok(())
536 }
537 }
538
539 impl ::fidl_next::FromWire<crate::wire::DeviceGetBtiResponse> for DeviceGetBtiResponse {
540 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
541 crate::wire::DeviceGetBtiResponse,
542 Self,
543 > = unsafe {
544 ::fidl_next::CopyOptimization::enable_if(
545 true && <::fidl_next::fuchsia::zx::Bti as ::fidl_next::FromWire<
546 ::fidl_next::wire::fuchsia::Bti,
547 >>::COPY_OPTIMIZATION
548 .is_enabled(),
549 )
550 };
551
552 #[inline]
553 fn from_wire(wire: crate::wire::DeviceGetBtiResponse) -> Self {
554 Self { bti: ::fidl_next::FromWire::from_wire(wire.bti) }
555 }
556 }
557}
558
559pub mod wire {
560
561 pub use fidl_next_common_fuchsia_hardware_pci::wire::*;
562
563 #[derive(Debug)]
565 #[repr(C)]
566 pub struct IoBar {
567 pub address: ::fidl_next::wire::Uint64,
568
569 pub resource: ::fidl_next::wire::fuchsia::Resource,
570 }
571
572 static_assertions::const_assert_eq!(std::mem::size_of::<IoBar>(), 16);
573 static_assertions::const_assert_eq!(std::mem::align_of::<IoBar>(), 8);
574
575 static_assertions::const_assert_eq!(std::mem::offset_of!(IoBar, address), 0);
576
577 static_assertions::const_assert_eq!(std::mem::offset_of!(IoBar, resource), 8);
578
579 impl ::fidl_next::Constrained for IoBar {
580 type Constraint = ();
581
582 fn validate(
583 _: ::fidl_next::Slot<'_, Self>,
584 _: Self::Constraint,
585 ) -> Result<(), ::fidl_next::ValidationError> {
586 Ok(())
587 }
588 }
589
590 unsafe impl ::fidl_next::Wire for IoBar {
591 type Narrowed<'de> = IoBar;
592
593 #[inline]
594 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
595 ::fidl_next::munge! {
596 let Self {
597 address,
598 resource,
599
600 } = &mut *out_;
601 }
602
603 ::fidl_next::Wire::zero_padding(address);
604
605 ::fidl_next::Wire::zero_padding(resource);
606
607 unsafe {
608 out_.as_mut_ptr().cast::<u8>().add(12).write_bytes(0, 4);
609 }
610 }
611 }
612
613 unsafe impl<___D> ::fidl_next::Decode<___D> for IoBar
614 where
615 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
616 ___D: ::fidl_next::fuchsia::HandleDecoder,
617 {
618 fn decode(
619 slot_: ::fidl_next::Slot<'_, Self>,
620 decoder_: &mut ___D,
621 _: (),
622 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
623 if slot_.as_bytes()[12..16] != [0u8; 4] {
624 return Err(::fidl_next::DecodeError::InvalidPadding);
625 }
626
627 ::fidl_next::munge! {
628 let Self {
629 mut address,
630 mut resource,
631
632 } = slot_;
633 }
634
635 let _field = address.as_mut();
636
637 ::fidl_next::Decode::decode(address.as_mut(), decoder_, ())?;
638
639 let _field = resource.as_mut();
640
641 ::fidl_next::Decode::decode(resource.as_mut(), decoder_, ())?;
642
643 Ok(())
644 }
645 }
646
647 impl ::fidl_next::IntoNatural for IoBar {
648 type Natural = crate::natural::IoBar;
649 }
650
651 #[repr(transparent)]
653 pub struct BarResult<'de> {
654 pub(crate) raw: ::fidl_next::wire::Union,
655 pub(crate) _phantom: ::core::marker::PhantomData<&'de mut [::fidl_next::Chunk]>,
656 }
657
658 impl<'de> Drop for BarResult<'de> {
659 fn drop(&mut self) {
660 match self.raw.ordinal() {
661 1 => {
662 let _ = unsafe { self.raw.get().read_unchecked::<crate::wire::IoBar>() };
663 }
664
665 2 => {
666 let _ = unsafe {
667 self.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
668 };
669 }
670
671 _ => (),
672 }
673 }
674 }
675
676 impl ::fidl_next::Constrained for BarResult<'_> {
677 type Constraint = ();
678
679 fn validate(
680 _: ::fidl_next::Slot<'_, Self>,
681 _: Self::Constraint,
682 ) -> Result<(), ::fidl_next::ValidationError> {
683 Ok(())
684 }
685 }
686
687 unsafe impl ::fidl_next::Wire for BarResult<'static> {
688 type Narrowed<'de> = BarResult<'de>;
689
690 #[inline]
691 fn zero_padding(out: &mut ::core::mem::MaybeUninit<Self>) {
692 ::fidl_next::munge!(let Self { raw, _phantom: _ } = out);
693 ::fidl_next::wire::Union::zero_padding(raw);
694 }
695 }
696
697 pub mod bar_result {
698 pub enum Ref<'de> {
699 Io(&'de crate::wire::IoBar),
700
701 Vmo(&'de ::fidl_next::wire::fuchsia::Vmo),
702
703 UnknownOrdinal_(u64),
704 }
705
706 pub enum Value {
707 Io(crate::wire::IoBar),
708
709 Vmo(::fidl_next::wire::fuchsia::Vmo),
710
711 UnknownOrdinal_(u64),
712 }
713 }
714
715 impl<'de> BarResult<'de> {
716 pub fn as_ref(&self) -> crate::wire::bar_result::Ref<'_> {
717 match self.raw.ordinal() {
718 1 => crate::wire::bar_result::Ref::Io(unsafe {
719 self.raw.get().deref_unchecked::<crate::wire::IoBar>()
720 }),
721
722 2 => crate::wire::bar_result::Ref::Vmo(unsafe {
723 self.raw.get().deref_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
724 }),
725
726 unknown => crate::wire::bar_result::Ref::UnknownOrdinal_(unknown),
727 }
728 }
729
730 pub fn into_inner(self) -> crate::wire::bar_result::Value {
731 let this = ::core::mem::ManuallyDrop::new(self);
732
733 match this.raw.ordinal() {
734 1 => crate::wire::bar_result::Value::Io(unsafe {
735 this.raw.get().read_unchecked::<crate::wire::IoBar>()
736 }),
737
738 2 => crate::wire::bar_result::Value::Vmo(unsafe {
739 this.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
740 }),
741
742 unknown => crate::wire::bar_result::Value::UnknownOrdinal_(unknown),
743 }
744 }
745 }
746
747 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for BarResult<'de>
748 where
749 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
750 ___D: ::fidl_next::Decoder<'de>,
751 ___D: ::fidl_next::fuchsia::HandleDecoder,
752 {
753 fn decode(
754 mut slot: ::fidl_next::Slot<'_, Self>,
755 decoder: &mut ___D,
756 _: (),
757 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
758 ::fidl_next::munge!(let Self { mut raw, _phantom: _ } = slot.as_mut());
759 match ::fidl_next::wire::Union::encoded_ordinal(raw.as_mut()) {
760 1 => ::fidl_next::wire::Union::decode_as::<___D, crate::wire::IoBar>(
761 raw,
762 decoder,
763 (),
764 )?,
765
766 2 => ::fidl_next::wire::Union::decode_as::<___D, ::fidl_next::wire::fuchsia::Vmo>(
767 raw,
768 decoder,
769 (),
770 )?,
771
772 _ => ::fidl_next::wire::Union::decode_unknown(raw, decoder)?,
773 }
774
775 Ok(())
776 }
777 }
778
779 impl<'de> ::core::fmt::Debug for BarResult<'de> {
780 fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
781 match self.raw.ordinal() {
782 1 => unsafe { self.raw.get().deref_unchecked::<crate::wire::IoBar>().fmt(f) },
783 2 => unsafe {
784 self.raw.get().deref_unchecked::<::fidl_next::wire::fuchsia::Vmo>().fmt(f)
785 },
786 _ => unsafe { ::core::hint::unreachable_unchecked() },
787 }
788 }
789 }
790
791 impl<'de> ::fidl_next::IntoNatural for BarResult<'de> {
792 type Natural = crate::natural::BarResult;
793 }
794
795 #[derive(Debug)]
797 #[repr(C)]
798 pub struct Bar<'de> {
799 pub bar_id: ::fidl_next::wire::Uint32,
800
801 pub size: ::fidl_next::wire::Uint64,
802
803 pub result: crate::wire::BarResult<'de>,
804 }
805
806 static_assertions::const_assert_eq!(std::mem::size_of::<Bar<'_>>(), 32);
807 static_assertions::const_assert_eq!(std::mem::align_of::<Bar<'_>>(), 8);
808
809 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, bar_id), 0);
810
811 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, size), 8);
812
813 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, result), 16);
814
815 impl ::fidl_next::Constrained for Bar<'_> {
816 type Constraint = ();
817
818 fn validate(
819 _: ::fidl_next::Slot<'_, Self>,
820 _: Self::Constraint,
821 ) -> Result<(), ::fidl_next::ValidationError> {
822 Ok(())
823 }
824 }
825
826 unsafe impl ::fidl_next::Wire for Bar<'static> {
827 type Narrowed<'de> = Bar<'de>;
828
829 #[inline]
830 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
831 ::fidl_next::munge! {
832 let Self {
833 bar_id,
834 size,
835 result,
836
837 } = &mut *out_;
838 }
839
840 ::fidl_next::Wire::zero_padding(bar_id);
841
842 ::fidl_next::Wire::zero_padding(size);
843
844 ::fidl_next::Wire::zero_padding(result);
845
846 unsafe {
847 out_.as_mut_ptr().cast::<u8>().add(4).write_bytes(0, 4);
848 }
849 }
850 }
851
852 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for Bar<'de>
853 where
854 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
855 ___D: ::fidl_next::Decoder<'de>,
856 ___D: ::fidl_next::fuchsia::HandleDecoder,
857 {
858 fn decode(
859 slot_: ::fidl_next::Slot<'_, Self>,
860 decoder_: &mut ___D,
861 _: (),
862 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
863 if slot_.as_bytes()[4..8] != [0u8; 4] {
864 return Err(::fidl_next::DecodeError::InvalidPadding);
865 }
866
867 ::fidl_next::munge! {
868 let Self {
869 mut bar_id,
870 mut size,
871 mut result,
872
873 } = slot_;
874 }
875
876 let _field = bar_id.as_mut();
877
878 ::fidl_next::Decode::decode(bar_id.as_mut(), decoder_, ())?;
879
880 let _field = size.as_mut();
881
882 ::fidl_next::Decode::decode(size.as_mut(), decoder_, ())?;
883
884 let _field = result.as_mut();
885
886 ::fidl_next::Decode::decode(result.as_mut(), decoder_, ())?;
887
888 Ok(())
889 }
890 }
891
892 impl<'de> ::fidl_next::IntoNatural for Bar<'de> {
893 type Natural = crate::natural::Bar;
894 }
895
896 #[derive(Debug)]
898 #[repr(C)]
899 pub struct DeviceGetBarResponse<'de> {
900 pub result: crate::wire::Bar<'de>,
901 }
902
903 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceGetBarResponse<'_>>(), 32);
904 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceGetBarResponse<'_>>(), 8);
905
906 static_assertions::const_assert_eq!(std::mem::offset_of!(DeviceGetBarResponse<'_>, result), 0);
907
908 impl ::fidl_next::Constrained for DeviceGetBarResponse<'_> {
909 type Constraint = ();
910
911 fn validate(
912 _: ::fidl_next::Slot<'_, Self>,
913 _: Self::Constraint,
914 ) -> Result<(), ::fidl_next::ValidationError> {
915 Ok(())
916 }
917 }
918
919 unsafe impl ::fidl_next::Wire for DeviceGetBarResponse<'static> {
920 type Narrowed<'de> = DeviceGetBarResponse<'de>;
921
922 #[inline]
923 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
924 ::fidl_next::munge! {
925 let Self {
926 result,
927
928 } = &mut *out_;
929 }
930
931 ::fidl_next::Wire::zero_padding(result);
932 }
933 }
934
935 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for DeviceGetBarResponse<'de>
936 where
937 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
938 ___D: ::fidl_next::Decoder<'de>,
939 ___D: ::fidl_next::fuchsia::HandleDecoder,
940 {
941 fn decode(
942 slot_: ::fidl_next::Slot<'_, Self>,
943 decoder_: &mut ___D,
944 _: (),
945 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
946 ::fidl_next::munge! {
947 let Self {
948 mut result,
949
950 } = slot_;
951 }
952
953 let _field = result.as_mut();
954
955 ::fidl_next::Decode::decode(result.as_mut(), decoder_, ())?;
956
957 Ok(())
958 }
959 }
960
961 impl<'de> ::fidl_next::IntoNatural for DeviceGetBarResponse<'de> {
962 type Natural = crate::natural::DeviceGetBarResponse;
963 }
964
965 #[derive(Debug)]
967 #[repr(C)]
968 pub struct DeviceMapInterruptResponse {
969 pub interrupt: ::fidl_next::wire::fuchsia::Interrupt,
970 }
971
972 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceMapInterruptResponse>(), 4);
973 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceMapInterruptResponse>(), 4);
974
975 static_assertions::const_assert_eq!(
976 std::mem::offset_of!(DeviceMapInterruptResponse, interrupt),
977 0
978 );
979
980 impl ::fidl_next::Constrained for DeviceMapInterruptResponse {
981 type Constraint = ();
982
983 fn validate(
984 _: ::fidl_next::Slot<'_, Self>,
985 _: Self::Constraint,
986 ) -> Result<(), ::fidl_next::ValidationError> {
987 Ok(())
988 }
989 }
990
991 unsafe impl ::fidl_next::Wire for DeviceMapInterruptResponse {
992 type Narrowed<'de> = DeviceMapInterruptResponse;
993
994 #[inline]
995 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
996 ::fidl_next::munge! {
997 let Self {
998 interrupt,
999
1000 } = &mut *out_;
1001 }
1002
1003 ::fidl_next::Wire::zero_padding(interrupt);
1004 }
1005 }
1006
1007 unsafe impl<___D> ::fidl_next::Decode<___D> for DeviceMapInterruptResponse
1008 where
1009 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1010 ___D: ::fidl_next::fuchsia::HandleDecoder,
1011 {
1012 fn decode(
1013 slot_: ::fidl_next::Slot<'_, Self>,
1014 decoder_: &mut ___D,
1015 _: (),
1016 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1017 ::fidl_next::munge! {
1018 let Self {
1019 mut interrupt,
1020
1021 } = slot_;
1022 }
1023
1024 let _field = interrupt.as_mut();
1025
1026 ::fidl_next::Decode::decode(interrupt.as_mut(), decoder_, ())?;
1027
1028 Ok(())
1029 }
1030 }
1031
1032 impl ::fidl_next::IntoNatural for DeviceMapInterruptResponse {
1033 type Natural = crate::natural::DeviceMapInterruptResponse;
1034 }
1035
1036 #[derive(Debug)]
1038 #[repr(C)]
1039 pub struct DeviceGetBtiResponse {
1040 pub bti: ::fidl_next::wire::fuchsia::Bti,
1041 }
1042
1043 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceGetBtiResponse>(), 4);
1044 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceGetBtiResponse>(), 4);
1045
1046 static_assertions::const_assert_eq!(std::mem::offset_of!(DeviceGetBtiResponse, bti), 0);
1047
1048 impl ::fidl_next::Constrained for DeviceGetBtiResponse {
1049 type Constraint = ();
1050
1051 fn validate(
1052 _: ::fidl_next::Slot<'_, Self>,
1053 _: Self::Constraint,
1054 ) -> Result<(), ::fidl_next::ValidationError> {
1055 Ok(())
1056 }
1057 }
1058
1059 unsafe impl ::fidl_next::Wire for DeviceGetBtiResponse {
1060 type Narrowed<'de> = DeviceGetBtiResponse;
1061
1062 #[inline]
1063 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
1064 ::fidl_next::munge! {
1065 let Self {
1066 bti,
1067
1068 } = &mut *out_;
1069 }
1070
1071 ::fidl_next::Wire::zero_padding(bti);
1072 }
1073 }
1074
1075 unsafe impl<___D> ::fidl_next::Decode<___D> for DeviceGetBtiResponse
1076 where
1077 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1078 ___D: ::fidl_next::fuchsia::HandleDecoder,
1079 {
1080 fn decode(
1081 slot_: ::fidl_next::Slot<'_, Self>,
1082 decoder_: &mut ___D,
1083 _: (),
1084 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1085 ::fidl_next::munge! {
1086 let Self {
1087 mut bti,
1088
1089 } = slot_;
1090 }
1091
1092 let _field = bti.as_mut();
1093
1094 ::fidl_next::Decode::decode(bti.as_mut(), decoder_, ())?;
1095
1096 Ok(())
1097 }
1098 }
1099
1100 impl ::fidl_next::IntoNatural for DeviceGetBtiResponse {
1101 type Natural = crate::natural::DeviceGetBtiResponse;
1102 }
1103}
1104
1105pub mod wire_optional {
1106
1107 pub use fidl_next_common_fuchsia_hardware_pci::wire_optional::*;
1108
1109 #[repr(transparent)]
1110 pub struct BarResult<'de> {
1111 pub(crate) raw: ::fidl_next::wire::Union,
1112 pub(crate) _phantom: ::core::marker::PhantomData<&'de mut [::fidl_next::Chunk]>,
1113 }
1114
1115 impl ::fidl_next::Constrained for BarResult<'_> {
1116 type Constraint = ();
1117
1118 fn validate(
1119 _: ::fidl_next::Slot<'_, Self>,
1120 _: Self::Constraint,
1121 ) -> Result<(), ::fidl_next::ValidationError> {
1122 Ok(())
1123 }
1124 }
1125
1126 unsafe impl ::fidl_next::Wire for BarResult<'static> {
1127 type Narrowed<'de> = BarResult<'de>;
1128
1129 #[inline]
1130 fn zero_padding(out: &mut ::core::mem::MaybeUninit<Self>) {
1131 ::fidl_next::munge!(let Self { raw, _phantom: _ } = out);
1132 ::fidl_next::wire::Union::zero_padding(raw);
1133 }
1134 }
1135
1136 impl<'de> BarResult<'de> {
1137 pub fn is_some(&self) -> bool {
1138 self.raw.is_some()
1139 }
1140
1141 pub fn is_none(&self) -> bool {
1142 self.raw.is_none()
1143 }
1144
1145 pub fn as_ref(&self) -> ::core::option::Option<&crate::wire::BarResult<'de>> {
1146 if self.is_some() { Some(unsafe { &*(self as *const Self).cast() }) } else { None }
1147 }
1148
1149 pub fn into_option(self) -> ::core::option::Option<crate::wire::BarResult<'de>> {
1150 if self.is_some() {
1151 Some(crate::wire::BarResult {
1152 raw: self.raw,
1153 _phantom: ::core::marker::PhantomData,
1154 })
1155 } else {
1156 None
1157 }
1158 }
1159 }
1160
1161 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for BarResult<'de>
1162 where
1163 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1164 ___D: ::fidl_next::Decoder<'de>,
1165 ___D: ::fidl_next::fuchsia::HandleDecoder,
1166 {
1167 fn decode(
1168 mut slot: ::fidl_next::Slot<'_, Self>,
1169 decoder: &mut ___D,
1170 _: (),
1171 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1172 ::fidl_next::munge!(let Self { mut raw, _phantom: _ } = slot.as_mut());
1173 match ::fidl_next::wire::Union::encoded_ordinal(raw.as_mut()) {
1174 1 => ::fidl_next::wire::Union::decode_as::<___D, crate::wire::IoBar>(
1175 raw,
1176 decoder,
1177 (),
1178 )?,
1179
1180 2 => ::fidl_next::wire::Union::decode_as::<___D, ::fidl_next::wire::fuchsia::Vmo>(
1181 raw,
1182 decoder,
1183 (),
1184 )?,
1185
1186 0 => ::fidl_next::wire::Union::decode_absent(raw)?,
1187 _ => ::fidl_next::wire::Union::decode_unknown(raw, decoder)?,
1188 }
1189
1190 Ok(())
1191 }
1192 }
1193
1194 impl<'de> ::core::fmt::Debug for BarResult<'de> {
1195 fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
1196 self.as_ref().fmt(f)
1197 }
1198 }
1199
1200 impl<'de> ::fidl_next::IntoNatural for BarResult<'de> {
1201 type Natural = ::core::option::Option<crate::natural::BarResult>;
1202 }
1203}
1204
1205pub mod generic {
1206
1207 pub use fidl_next_common_fuchsia_hardware_pci::generic::*;
1208
1209 pub struct IoBar<T0, T1> {
1211 pub address: T0,
1212
1213 pub resource: T1,
1214 }
1215
1216 unsafe impl<___E, T0, T1> ::fidl_next::Encode<crate::wire::IoBar, ___E> for IoBar<T0, T1>
1217 where
1218 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1219 ___E: ::fidl_next::fuchsia::HandleEncoder,
1220 T0: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1221 T1: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Resource, ___E>,
1222 {
1223 #[inline]
1224 fn encode(
1225 self,
1226 encoder_: &mut ___E,
1227 out_: &mut ::core::mem::MaybeUninit<crate::wire::IoBar>,
1228 _: (),
1229 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1230 ::fidl_next::munge! {
1231 let crate::wire::IoBar {
1232 address,
1233 resource,
1234
1235 } = out_;
1236 }
1237
1238 ::fidl_next::Encode::encode(self.address, encoder_, address, ())?;
1239
1240 ::fidl_next::Encode::encode(self.resource, encoder_, resource, ())?;
1241
1242 Ok(())
1243 }
1244 }
1245
1246 unsafe impl<'a, ___E, T0, T1> ::fidl_next::Encode<crate::wire::IoBar, ___E> for &'a IoBar<T0, T1>
1247 where
1248 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1249 ___E: ::fidl_next::fuchsia::HandleEncoder,
1250 &'a T0: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1251 &'a T1: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Resource, ___E>,
1252 {
1253 #[inline]
1254 fn encode(
1255 self,
1256 encoder_: &mut ___E,
1257 out_: &mut ::core::mem::MaybeUninit<crate::wire::IoBar>,
1258 _: (),
1259 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1260 ::fidl_next::munge! {
1261 let crate::wire::IoBar {
1262 address,
1263 resource,
1264
1265 } = out_;
1266 }
1267
1268 ::fidl_next::Encode::encode(&self.address, encoder_, address, ())?;
1269
1270 ::fidl_next::Encode::encode(&self.resource, encoder_, resource, ())?;
1271
1272 Ok(())
1273 }
1274 }
1275
1276 pub struct Bar<T0, T1, T2> {
1278 pub bar_id: T0,
1279
1280 pub size: T1,
1281
1282 pub result: T2,
1283 }
1284
1285 unsafe impl<___E, T0, T1, T2> ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>
1286 for Bar<T0, T1, T2>
1287 where
1288 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1289 ___E: ::fidl_next::Encoder,
1290 ___E: ::fidl_next::fuchsia::HandleEncoder,
1291 T0: ::fidl_next::Encode<::fidl_next::wire::Uint32, ___E>,
1292 T1: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1293 T2: ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E>,
1294 {
1295 #[inline]
1296 fn encode(
1297 self,
1298 encoder_: &mut ___E,
1299 out_: &mut ::core::mem::MaybeUninit<crate::wire::Bar<'static>>,
1300 _: (),
1301 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1302 ::fidl_next::munge! {
1303 let crate::wire::Bar {
1304 bar_id,
1305 size,
1306 result,
1307
1308 } = out_;
1309 }
1310
1311 ::fidl_next::Encode::encode(self.bar_id, encoder_, bar_id, ())?;
1312
1313 ::fidl_next::Encode::encode(self.size, encoder_, size, ())?;
1314
1315 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
1316
1317 Ok(())
1318 }
1319 }
1320
1321 unsafe impl<'a, ___E, T0, T1, T2> ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>
1322 for &'a Bar<T0, T1, T2>
1323 where
1324 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1325 ___E: ::fidl_next::Encoder,
1326 ___E: ::fidl_next::fuchsia::HandleEncoder,
1327 &'a T0: ::fidl_next::Encode<::fidl_next::wire::Uint32, ___E>,
1328 &'a T1: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1329 &'a T2: ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E>,
1330 {
1331 #[inline]
1332 fn encode(
1333 self,
1334 encoder_: &mut ___E,
1335 out_: &mut ::core::mem::MaybeUninit<crate::wire::Bar<'static>>,
1336 _: (),
1337 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1338 ::fidl_next::munge! {
1339 let crate::wire::Bar {
1340 bar_id,
1341 size,
1342 result,
1343
1344 } = out_;
1345 }
1346
1347 ::fidl_next::Encode::encode(&self.bar_id, encoder_, bar_id, ())?;
1348
1349 ::fidl_next::Encode::encode(&self.size, encoder_, size, ())?;
1350
1351 ::fidl_next::Encode::encode(&self.result, encoder_, result, ())?;
1352
1353 Ok(())
1354 }
1355 }
1356
1357 pub struct DeviceGetBarResponse<T0> {
1359 pub result: T0,
1360 }
1361
1362 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>
1363 for DeviceGetBarResponse<T0>
1364 where
1365 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1366 ___E: ::fidl_next::Encoder,
1367 ___E: ::fidl_next::fuchsia::HandleEncoder,
1368 T0: ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>,
1369 {
1370 #[inline]
1371 fn encode(
1372 self,
1373 encoder_: &mut ___E,
1374 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBarResponse<'static>>,
1375 _: (),
1376 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1377 ::fidl_next::munge! {
1378 let crate::wire::DeviceGetBarResponse {
1379 result,
1380
1381 } = out_;
1382 }
1383
1384 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
1385
1386 Ok(())
1387 }
1388 }
1389
1390 unsafe impl<'a, ___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>
1391 for &'a DeviceGetBarResponse<T0>
1392 where
1393 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1394 ___E: ::fidl_next::Encoder,
1395 ___E: ::fidl_next::fuchsia::HandleEncoder,
1396 &'a T0: ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>,
1397 {
1398 #[inline]
1399 fn encode(
1400 self,
1401 encoder_: &mut ___E,
1402 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBarResponse<'static>>,
1403 _: (),
1404 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1405 ::fidl_next::munge! {
1406 let crate::wire::DeviceGetBarResponse {
1407 result,
1408
1409 } = out_;
1410 }
1411
1412 ::fidl_next::Encode::encode(&self.result, encoder_, result, ())?;
1413
1414 Ok(())
1415 }
1416 }
1417
1418 pub struct DeviceMapInterruptResponse<T0> {
1420 pub interrupt: T0,
1421 }
1422
1423 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>
1424 for DeviceMapInterruptResponse<T0>
1425 where
1426 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1427 ___E: ::fidl_next::fuchsia::HandleEncoder,
1428 T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Interrupt, ___E>,
1429 {
1430 #[inline]
1431 fn encode(
1432 self,
1433 encoder_: &mut ___E,
1434 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceMapInterruptResponse>,
1435 _: (),
1436 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1437 ::fidl_next::munge! {
1438 let crate::wire::DeviceMapInterruptResponse {
1439 interrupt,
1440
1441 } = out_;
1442 }
1443
1444 ::fidl_next::Encode::encode(self.interrupt, encoder_, interrupt, ())?;
1445
1446 Ok(())
1447 }
1448 }
1449
1450 unsafe impl<'a, ___E, T0> ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>
1451 for &'a DeviceMapInterruptResponse<T0>
1452 where
1453 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1454 ___E: ::fidl_next::fuchsia::HandleEncoder,
1455 &'a T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Interrupt, ___E>,
1456 {
1457 #[inline]
1458 fn encode(
1459 self,
1460 encoder_: &mut ___E,
1461 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceMapInterruptResponse>,
1462 _: (),
1463 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1464 ::fidl_next::munge! {
1465 let crate::wire::DeviceMapInterruptResponse {
1466 interrupt,
1467
1468 } = out_;
1469 }
1470
1471 ::fidl_next::Encode::encode(&self.interrupt, encoder_, interrupt, ())?;
1472
1473 Ok(())
1474 }
1475 }
1476
1477 pub struct DeviceGetBtiResponse<T0> {
1479 pub bti: T0,
1480 }
1481
1482 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>
1483 for DeviceGetBtiResponse<T0>
1484 where
1485 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1486 ___E: ::fidl_next::fuchsia::HandleEncoder,
1487 T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Bti, ___E>,
1488 {
1489 #[inline]
1490 fn encode(
1491 self,
1492 encoder_: &mut ___E,
1493 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBtiResponse>,
1494 _: (),
1495 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1496 ::fidl_next::munge! {
1497 let crate::wire::DeviceGetBtiResponse {
1498 bti,
1499
1500 } = out_;
1501 }
1502
1503 ::fidl_next::Encode::encode(self.bti, encoder_, bti, ())?;
1504
1505 Ok(())
1506 }
1507 }
1508
1509 unsafe impl<'a, ___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>
1510 for &'a DeviceGetBtiResponse<T0>
1511 where
1512 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1513 ___E: ::fidl_next::fuchsia::HandleEncoder,
1514 &'a T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Bti, ___E>,
1515 {
1516 #[inline]
1517 fn encode(
1518 self,
1519 encoder_: &mut ___E,
1520 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBtiResponse>,
1521 _: (),
1522 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1523 ::fidl_next::munge! {
1524 let crate::wire::DeviceGetBtiResponse {
1525 bti,
1526
1527 } = out_;
1528 }
1529
1530 ::fidl_next::Encode::encode(&self.bti, encoder_, bti, ())?;
1531
1532 Ok(())
1533 }
1534 }
1535}
1536
1537pub use self::natural::*;
1538
1539#[derive(Debug)]
1541pub struct DebugService;
1542
1543impl ::fidl_next::DiscoverableService for DebugService {
1544 const SERVICE_NAME: &'static str = "fuchsia.hardware.pci.DebugService";
1545 const MEMBER_NAMES: &'static [&'static str] = &["debug"];
1546}
1547
1548impl ::fidl_next::HasServiceRequest<::fidl_next::fuchsia::zx::Channel> for DebugService {}
1549
1550impl<___C> ::fidl_next::Service<___C> for DebugService
1551where
1552 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
1553{
1554 type Connector = DebugServiceConnector<___C>;
1555}
1556
1557#[repr(transparent)]
1559pub struct DebugServiceConnector<___C> {
1560 #[allow(dead_code)]
1561 connector: ___C,
1562}
1563
1564impl<___C> DebugServiceConnector<___C>
1565where
1566 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
1567{
1568 pub fn debug(
1570 &self,
1571 server_end: ::fidl_next::ServerEnd<crate::Debug, ::fidl_next::fuchsia::zx::Channel>,
1572 ) -> ::core::result::Result<
1573 (),
1574 <___C as ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>>::Error,
1575 > {
1576 ::fidl_next::protocol::ServiceConnector::<
1577 ::fidl_next::fuchsia::zx::Channel
1578 >::connect_to_member(
1579 &self.connector,
1580 "debug",
1581 server_end.into_untyped(),
1582 )
1583 }
1584}
1585
1586pub trait DebugServiceHandler {
1588 fn debug(
1590 &self,
1591 server_end: ::fidl_next::ServerEnd<crate::Debug, ::fidl_next::fuchsia::zx::Channel>,
1592 );
1593}
1594
1595impl<___H, ___T> ::fidl_next::DispatchServiceHandler<___H, ___T> for DebugService
1596where
1597 ___H: DebugServiceHandler,
1598 ::fidl_next::fuchsia::zx::Channel: ::fidl_next::InstanceFromServiceTransport<___T>,
1599{
1600 fn on_connection(handler: &___H, member: &str, server_end: ___T) {
1601 use ::fidl_next::InstanceFromServiceTransport;
1602 match member {
1603 "debug" => handler.debug(::fidl_next::ServerEnd::from_untyped(
1604 ::fidl_next::fuchsia::zx::Channel::from_service_transport(server_end),
1605 )),
1606
1607 _ => unreachable!(),
1608 }
1609 }
1610}
1611
1612#[derive(PartialEq, Debug)]
1614pub struct Device;
1615
1616impl ::fidl_next::Discoverable for Device {
1617 const PROTOCOL_NAME: &'static str = "fuchsia.hardware.pci.Device";
1618}
1619
1620#[cfg(target_os = "fuchsia")]
1621impl ::fidl_next::HasTransport for Device {
1622 type Transport = ::fidl_next::fuchsia::zx::Channel;
1623}
1624
1625pub mod device {
1626 pub mod prelude {
1627 pub use crate::{
1628 Device, DeviceClientHandler, DeviceLocalClientHandler, DeviceLocalServerHandler,
1629 DeviceServerHandler, device,
1630 };
1631
1632 pub use crate::natural::DeviceGetBarRequest;
1633
1634 pub use crate::natural::DeviceGetBtiRequest;
1635
1636 pub use crate::natural::DeviceGetCapabilitiesRequest;
1637
1638 pub use crate::natural::DeviceGetCapabilitiesResponse;
1639
1640 pub use crate::natural::DeviceGetDeviceInfoResponse;
1641
1642 pub use crate::natural::DeviceGetExtendedCapabilitiesRequest;
1643
1644 pub use crate::natural::DeviceGetExtendedCapabilitiesResponse;
1645
1646 pub use crate::natural::DeviceGetInterruptModesResponse;
1647
1648 pub use crate::natural::DeviceMapInterruptRequest;
1649
1650 pub use crate::natural::DeviceReadConfig16Request;
1651
1652 pub use crate::natural::DeviceReadConfig32Request;
1653
1654 pub use crate::natural::DeviceReadConfig8Request;
1655
1656 pub use crate::natural::DeviceSetBusMasteringRequest;
1657
1658 pub use crate::natural::DeviceSetInterruptModeRequest;
1659
1660 pub use crate::natural::DeviceWriteConfig16Request;
1661
1662 pub use crate::natural::DeviceWriteConfig32Request;
1663
1664 pub use crate::natural::DeviceWriteConfig8Request;
1665
1666 pub use crate::natural::DeviceAckInterruptResponse;
1667
1668 pub use crate::natural::DeviceGetBarResponse;
1669
1670 pub use crate::natural::DeviceGetBtiResponse;
1671
1672 pub use crate::natural::DeviceMapInterruptResponse;
1673
1674 pub use crate::natural::DeviceReadConfig16Response;
1675
1676 pub use crate::natural::DeviceReadConfig32Response;
1677
1678 pub use crate::natural::DeviceReadConfig8Response;
1679
1680 pub use crate::natural::DeviceResetDeviceResponse;
1681
1682 pub use crate::natural::DeviceSetBusMasteringResponse;
1683
1684 pub use crate::natural::DeviceSetInterruptModeResponse;
1685
1686 pub use crate::natural::DeviceWriteConfig16Response;
1687
1688 pub use crate::natural::DeviceWriteConfig32Response;
1689
1690 pub use crate::natural::DeviceWriteConfig8Response;
1691 }
1692
1693 pub struct GetDeviceInfo;
1694
1695 impl ::fidl_next::Method for GetDeviceInfo {
1696 const ORDINAL: u64 = 6168191258208672022;
1697 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1698 ::fidl_next::protocol::Flexibility::Strict;
1699
1700 type Protocol = crate::Device;
1701
1702 type Request = ::fidl_next::wire::EmptyMessageBody;
1703 }
1704
1705 impl ::fidl_next::TwoWayMethod for GetDeviceInfo {
1706 type Response = ::fidl_next::wire::Strict<crate::wire::DeviceGetDeviceInfoResponse>;
1707 }
1708
1709 impl<___R> ::fidl_next::Respond<___R> for GetDeviceInfo {
1710 type Output = ::fidl_next::Strict<crate::generic::DeviceGetDeviceInfoResponse<___R>>;
1711
1712 fn respond(response: ___R) -> Self::Output {
1713 ::fidl_next::Strict(crate::generic::DeviceGetDeviceInfoResponse { info: response })
1714 }
1715 }
1716
1717 pub struct GetBar;
1718
1719 impl ::fidl_next::Method for GetBar {
1720 const ORDINAL: u64 = 7721003707982149241;
1721 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1722 ::fidl_next::protocol::Flexibility::Strict;
1723
1724 type Protocol = crate::Device;
1725
1726 type Request = crate::wire::DeviceGetBarRequest;
1727 }
1728
1729 impl ::fidl_next::TwoWayMethod for GetBar {
1730 type Response = ::fidl_next::wire::Result<
1731 'static,
1732 crate::wire::DeviceGetBarResponse<'static>,
1733 ::fidl_next::wire::fuchsia::Status,
1734 >;
1735 }
1736
1737 impl<___R> ::fidl_next::Respond<___R> for GetBar {
1738 type Output = ::core::result::Result<
1739 crate::generic::DeviceGetBarResponse<___R>,
1740 ::fidl_next::never::Never,
1741 >;
1742
1743 fn respond(response: ___R) -> Self::Output {
1744 ::core::result::Result::Ok(crate::generic::DeviceGetBarResponse { result: response })
1745 }
1746 }
1747
1748 impl<___R> ::fidl_next::RespondErr<___R> for GetBar {
1749 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1750
1751 fn respond_err(response: ___R) -> Self::Output {
1752 ::core::result::Result::Err(response)
1753 }
1754 }
1755
1756 pub struct SetBusMastering;
1757
1758 impl ::fidl_next::Method for SetBusMastering {
1759 const ORDINAL: u64 = 3756540713293123587;
1760 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1761 ::fidl_next::protocol::Flexibility::Strict;
1762
1763 type Protocol = crate::Device;
1764
1765 type Request = crate::wire::DeviceSetBusMasteringRequest;
1766 }
1767
1768 impl ::fidl_next::TwoWayMethod for SetBusMastering {
1769 type Response = ::fidl_next::wire::Result<
1770 'static,
1771 crate::wire::DeviceSetBusMasteringResponse,
1772 ::fidl_next::wire::fuchsia::Status,
1773 >;
1774 }
1775
1776 impl<___R> ::fidl_next::Respond<___R> for SetBusMastering {
1777 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1778
1779 fn respond(response: ___R) -> Self::Output {
1780 ::core::result::Result::Ok(response)
1781 }
1782 }
1783
1784 impl<___R> ::fidl_next::RespondErr<___R> for SetBusMastering {
1785 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1786
1787 fn respond_err(response: ___R) -> Self::Output {
1788 ::core::result::Result::Err(response)
1789 }
1790 }
1791
1792 pub struct ResetDevice;
1793
1794 impl ::fidl_next::Method for ResetDevice {
1795 const ORDINAL: u64 = 4349199030852488095;
1796 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1797 ::fidl_next::protocol::Flexibility::Strict;
1798
1799 type Protocol = crate::Device;
1800
1801 type Request = ::fidl_next::wire::EmptyMessageBody;
1802 }
1803
1804 impl ::fidl_next::TwoWayMethod for ResetDevice {
1805 type Response = ::fidl_next::wire::Result<
1806 'static,
1807 crate::wire::DeviceResetDeviceResponse,
1808 ::fidl_next::wire::fuchsia::Status,
1809 >;
1810 }
1811
1812 impl<___R> ::fidl_next::Respond<___R> for ResetDevice {
1813 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1814
1815 fn respond(response: ___R) -> Self::Output {
1816 ::core::result::Result::Ok(response)
1817 }
1818 }
1819
1820 impl<___R> ::fidl_next::RespondErr<___R> for ResetDevice {
1821 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1822
1823 fn respond_err(response: ___R) -> Self::Output {
1824 ::core::result::Result::Err(response)
1825 }
1826 }
1827
1828 pub struct AckInterrupt;
1829
1830 impl ::fidl_next::Method for AckInterrupt {
1831 const ORDINAL: u64 = 8103153737854179947;
1832 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1833 ::fidl_next::protocol::Flexibility::Strict;
1834
1835 type Protocol = crate::Device;
1836
1837 type Request = ::fidl_next::wire::EmptyMessageBody;
1838 }
1839
1840 impl ::fidl_next::TwoWayMethod for AckInterrupt {
1841 type Response = ::fidl_next::wire::Result<
1842 'static,
1843 crate::wire::DeviceAckInterruptResponse,
1844 ::fidl_next::wire::fuchsia::Status,
1845 >;
1846 }
1847
1848 impl<___R> ::fidl_next::Respond<___R> for AckInterrupt {
1849 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1850
1851 fn respond(response: ___R) -> Self::Output {
1852 ::core::result::Result::Ok(response)
1853 }
1854 }
1855
1856 impl<___R> ::fidl_next::RespondErr<___R> for AckInterrupt {
1857 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1858
1859 fn respond_err(response: ___R) -> Self::Output {
1860 ::core::result::Result::Err(response)
1861 }
1862 }
1863
1864 pub struct MapInterrupt;
1865
1866 impl ::fidl_next::Method for MapInterrupt {
1867 const ORDINAL: u64 = 2733403074518448659;
1868 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1869 ::fidl_next::protocol::Flexibility::Strict;
1870
1871 type Protocol = crate::Device;
1872
1873 type Request = crate::wire::DeviceMapInterruptRequest;
1874 }
1875
1876 impl ::fidl_next::TwoWayMethod for MapInterrupt {
1877 type Response = ::fidl_next::wire::Result<
1878 'static,
1879 crate::wire::DeviceMapInterruptResponse,
1880 ::fidl_next::wire::fuchsia::Status,
1881 >;
1882 }
1883
1884 impl<___R> ::fidl_next::Respond<___R> for MapInterrupt {
1885 type Output = ::core::result::Result<
1886 crate::generic::DeviceMapInterruptResponse<___R>,
1887 ::fidl_next::never::Never,
1888 >;
1889
1890 fn respond(response: ___R) -> Self::Output {
1891 ::core::result::Result::Ok(crate::generic::DeviceMapInterruptResponse {
1892 interrupt: response,
1893 })
1894 }
1895 }
1896
1897 impl<___R> ::fidl_next::RespondErr<___R> for MapInterrupt {
1898 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1899
1900 fn respond_err(response: ___R) -> Self::Output {
1901 ::core::result::Result::Err(response)
1902 }
1903 }
1904
1905 pub struct GetInterruptModes;
1906
1907 impl ::fidl_next::Method for GetInterruptModes {
1908 const ORDINAL: u64 = 666335764625137482;
1909 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1910 ::fidl_next::protocol::Flexibility::Strict;
1911
1912 type Protocol = crate::Device;
1913
1914 type Request = ::fidl_next::wire::EmptyMessageBody;
1915 }
1916
1917 impl ::fidl_next::TwoWayMethod for GetInterruptModes {
1918 type Response = ::fidl_next::wire::Strict<crate::wire::DeviceGetInterruptModesResponse>;
1919 }
1920
1921 impl<___R> ::fidl_next::Respond<___R> for GetInterruptModes {
1922 type Output = ::fidl_next::Strict<crate::generic::DeviceGetInterruptModesResponse<___R>>;
1923
1924 fn respond(response: ___R) -> Self::Output {
1925 ::fidl_next::Strict(crate::generic::DeviceGetInterruptModesResponse { modes: response })
1926 }
1927 }
1928
1929 pub struct SetInterruptMode;
1930
1931 impl ::fidl_next::Method for SetInterruptMode {
1932 const ORDINAL: u64 = 602334104497834086;
1933 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1934 ::fidl_next::protocol::Flexibility::Strict;
1935
1936 type Protocol = crate::Device;
1937
1938 type Request = crate::wire::DeviceSetInterruptModeRequest;
1939 }
1940
1941 impl ::fidl_next::TwoWayMethod for SetInterruptMode {
1942 type Response = ::fidl_next::wire::Result<
1943 'static,
1944 crate::wire::DeviceSetInterruptModeResponse,
1945 ::fidl_next::wire::fuchsia::Status,
1946 >;
1947 }
1948
1949 impl<___R> ::fidl_next::Respond<___R> for SetInterruptMode {
1950 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1951
1952 fn respond(response: ___R) -> Self::Output {
1953 ::core::result::Result::Ok(response)
1954 }
1955 }
1956
1957 impl<___R> ::fidl_next::RespondErr<___R> for SetInterruptMode {
1958 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1959
1960 fn respond_err(response: ___R) -> Self::Output {
1961 ::core::result::Result::Err(response)
1962 }
1963 }
1964
1965 pub struct ReadConfig8;
1966
1967 impl ::fidl_next::Method for ReadConfig8 {
1968 const ORDINAL: u64 = 2952650096395541020;
1969 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1970 ::fidl_next::protocol::Flexibility::Strict;
1971
1972 type Protocol = crate::Device;
1973
1974 type Request = crate::wire::DeviceReadConfig8Request;
1975 }
1976
1977 impl ::fidl_next::TwoWayMethod for ReadConfig8 {
1978 type Response = ::fidl_next::wire::Result<
1979 'static,
1980 crate::wire::DeviceReadConfig8Response,
1981 ::fidl_next::wire::fuchsia::Status,
1982 >;
1983 }
1984
1985 impl<___R> ::fidl_next::Respond<___R> for ReadConfig8 {
1986 type Output = ::core::result::Result<
1987 crate::generic::DeviceReadConfig8Response<___R>,
1988 ::fidl_next::never::Never,
1989 >;
1990
1991 fn respond(response: ___R) -> Self::Output {
1992 ::core::result::Result::Ok(crate::generic::DeviceReadConfig8Response {
1993 value: response,
1994 })
1995 }
1996 }
1997
1998 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig8 {
1999 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2000
2001 fn respond_err(response: ___R) -> Self::Output {
2002 ::core::result::Result::Err(response)
2003 }
2004 }
2005
2006 pub struct ReadConfig16;
2007
2008 impl ::fidl_next::Method for ReadConfig16 {
2009 const ORDINAL: u64 = 4309283036617404603;
2010 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2011 ::fidl_next::protocol::Flexibility::Strict;
2012
2013 type Protocol = crate::Device;
2014
2015 type Request = crate::wire::DeviceReadConfig16Request;
2016 }
2017
2018 impl ::fidl_next::TwoWayMethod for ReadConfig16 {
2019 type Response = ::fidl_next::wire::Result<
2020 'static,
2021 crate::wire::DeviceReadConfig16Response,
2022 ::fidl_next::wire::fuchsia::Status,
2023 >;
2024 }
2025
2026 impl<___R> ::fidl_next::Respond<___R> for ReadConfig16 {
2027 type Output = ::core::result::Result<
2028 crate::generic::DeviceReadConfig16Response<___R>,
2029 ::fidl_next::never::Never,
2030 >;
2031
2032 fn respond(response: ___R) -> Self::Output {
2033 ::core::result::Result::Ok(crate::generic::DeviceReadConfig16Response {
2034 value: response,
2035 })
2036 }
2037 }
2038
2039 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig16 {
2040 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2041
2042 fn respond_err(response: ___R) -> Self::Output {
2043 ::core::result::Result::Err(response)
2044 }
2045 }
2046
2047 pub struct ReadConfig32;
2048
2049 impl ::fidl_next::Method for ReadConfig32 {
2050 const ORDINAL: u64 = 6139942538560107783;
2051 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2052 ::fidl_next::protocol::Flexibility::Strict;
2053
2054 type Protocol = crate::Device;
2055
2056 type Request = crate::wire::DeviceReadConfig32Request;
2057 }
2058
2059 impl ::fidl_next::TwoWayMethod for ReadConfig32 {
2060 type Response = ::fidl_next::wire::Result<
2061 'static,
2062 crate::wire::DeviceReadConfig32Response,
2063 ::fidl_next::wire::fuchsia::Status,
2064 >;
2065 }
2066
2067 impl<___R> ::fidl_next::Respond<___R> for ReadConfig32 {
2068 type Output = ::core::result::Result<
2069 crate::generic::DeviceReadConfig32Response<___R>,
2070 ::fidl_next::never::Never,
2071 >;
2072
2073 fn respond(response: ___R) -> Self::Output {
2074 ::core::result::Result::Ok(crate::generic::DeviceReadConfig32Response {
2075 value: response,
2076 })
2077 }
2078 }
2079
2080 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig32 {
2081 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2082
2083 fn respond_err(response: ___R) -> Self::Output {
2084 ::core::result::Result::Err(response)
2085 }
2086 }
2087
2088 pub struct WriteConfig8;
2089
2090 impl ::fidl_next::Method for WriteConfig8 {
2091 const ORDINAL: u64 = 331585330300009727;
2092 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2093 ::fidl_next::protocol::Flexibility::Strict;
2094
2095 type Protocol = crate::Device;
2096
2097 type Request = crate::wire::DeviceWriteConfig8Request;
2098 }
2099
2100 impl ::fidl_next::TwoWayMethod for WriteConfig8 {
2101 type Response = ::fidl_next::wire::Result<
2102 'static,
2103 crate::wire::DeviceWriteConfig8Response,
2104 ::fidl_next::wire::fuchsia::Status,
2105 >;
2106 }
2107
2108 impl<___R> ::fidl_next::Respond<___R> for WriteConfig8 {
2109 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
2110
2111 fn respond(response: ___R) -> Self::Output {
2112 ::core::result::Result::Ok(response)
2113 }
2114 }
2115
2116 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig8 {
2117 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2118
2119 fn respond_err(response: ___R) -> Self::Output {
2120 ::core::result::Result::Err(response)
2121 }
2122 }
2123
2124 pub struct WriteConfig16;
2125
2126 impl ::fidl_next::Method for WriteConfig16 {
2127 const ORDINAL: u64 = 4481291721614851839;
2128 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2129 ::fidl_next::protocol::Flexibility::Strict;
2130
2131 type Protocol = crate::Device;
2132
2133 type Request = crate::wire::DeviceWriteConfig16Request;
2134 }
2135
2136 impl ::fidl_next::TwoWayMethod for WriteConfig16 {
2137 type Response = ::fidl_next::wire::Result<
2138 'static,
2139 crate::wire::DeviceWriteConfig16Response,
2140 ::fidl_next::wire::fuchsia::Status,
2141 >;
2142 }
2143
2144 impl<___R> ::fidl_next::Respond<___R> for WriteConfig16 {
2145 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
2146
2147 fn respond(response: ___R) -> Self::Output {
2148 ::core::result::Result::Ok(response)
2149 }
2150 }
2151
2152 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig16 {
2153 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2154
2155 fn respond_err(response: ___R) -> Self::Output {
2156 ::core::result::Result::Err(response)
2157 }
2158 }
2159
2160 pub struct WriteConfig32;
2161
2162 impl ::fidl_next::Method for WriteConfig32 {
2163 const ORDINAL: u64 = 99457760178582408;
2164 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2165 ::fidl_next::protocol::Flexibility::Strict;
2166
2167 type Protocol = crate::Device;
2168
2169 type Request = crate::wire::DeviceWriteConfig32Request;
2170 }
2171
2172 impl ::fidl_next::TwoWayMethod for WriteConfig32 {
2173 type Response = ::fidl_next::wire::Result<
2174 'static,
2175 crate::wire::DeviceWriteConfig32Response,
2176 ::fidl_next::wire::fuchsia::Status,
2177 >;
2178 }
2179
2180 impl<___R> ::fidl_next::Respond<___R> for WriteConfig32 {
2181 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
2182
2183 fn respond(response: ___R) -> Self::Output {
2184 ::core::result::Result::Ok(response)
2185 }
2186 }
2187
2188 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig32 {
2189 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2190
2191 fn respond_err(response: ___R) -> Self::Output {
2192 ::core::result::Result::Err(response)
2193 }
2194 }
2195
2196 pub struct GetCapabilities;
2197
2198 impl ::fidl_next::Method for GetCapabilities {
2199 const ORDINAL: u64 = 4180765276430907919;
2200 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2201 ::fidl_next::protocol::Flexibility::Strict;
2202
2203 type Protocol = crate::Device;
2204
2205 type Request = crate::wire::DeviceGetCapabilitiesRequest;
2206 }
2207
2208 impl ::fidl_next::TwoWayMethod for GetCapabilities {
2209 type Response =
2210 ::fidl_next::wire::Strict<crate::wire::DeviceGetCapabilitiesResponse<'static>>;
2211 }
2212
2213 impl<___R> ::fidl_next::Respond<___R> for GetCapabilities {
2214 type Output = ::fidl_next::Strict<crate::generic::DeviceGetCapabilitiesResponse<___R>>;
2215
2216 fn respond(response: ___R) -> Self::Output {
2217 ::fidl_next::Strict(crate::generic::DeviceGetCapabilitiesResponse { offsets: response })
2218 }
2219 }
2220
2221 pub struct GetExtendedCapabilities;
2222
2223 impl ::fidl_next::Method for GetExtendedCapabilities {
2224 const ORDINAL: u64 = 830197180054506553;
2225 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2226 ::fidl_next::protocol::Flexibility::Strict;
2227
2228 type Protocol = crate::Device;
2229
2230 type Request = crate::wire::DeviceGetExtendedCapabilitiesRequest;
2231 }
2232
2233 impl ::fidl_next::TwoWayMethod for GetExtendedCapabilities {
2234 type Response =
2235 ::fidl_next::wire::Strict<crate::wire::DeviceGetExtendedCapabilitiesResponse<'static>>;
2236 }
2237
2238 impl<___R> ::fidl_next::Respond<___R> for GetExtendedCapabilities {
2239 type Output =
2240 ::fidl_next::Strict<crate::generic::DeviceGetExtendedCapabilitiesResponse<___R>>;
2241
2242 fn respond(response: ___R) -> Self::Output {
2243 ::fidl_next::Strict(crate::generic::DeviceGetExtendedCapabilitiesResponse {
2244 offsets: response,
2245 })
2246 }
2247 }
2248
2249 pub struct GetBti;
2250
2251 impl ::fidl_next::Method for GetBti {
2252 const ORDINAL: u64 = 6795907578404380387;
2253 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2254 ::fidl_next::protocol::Flexibility::Strict;
2255
2256 type Protocol = crate::Device;
2257
2258 type Request = crate::wire::DeviceGetBtiRequest;
2259 }
2260
2261 impl ::fidl_next::TwoWayMethod for GetBti {
2262 type Response = ::fidl_next::wire::Result<
2263 'static,
2264 crate::wire::DeviceGetBtiResponse,
2265 ::fidl_next::wire::fuchsia::Status,
2266 >;
2267 }
2268
2269 impl<___R> ::fidl_next::Respond<___R> for GetBti {
2270 type Output = ::core::result::Result<
2271 crate::generic::DeviceGetBtiResponse<___R>,
2272 ::fidl_next::never::Never,
2273 >;
2274
2275 fn respond(response: ___R) -> Self::Output {
2276 ::core::result::Result::Ok(crate::generic::DeviceGetBtiResponse { bti: response })
2277 }
2278 }
2279
2280 impl<___R> ::fidl_next::RespondErr<___R> for GetBti {
2281 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2282
2283 fn respond_err(response: ___R) -> Self::Output {
2284 ::core::result::Result::Err(response)
2285 }
2286 }
2287
2288 mod ___detail {
2289 unsafe impl<___T> ::fidl_next::HasConnectionHandles<___T> for crate::Device
2290 where
2291 ___T: ::fidl_next::Transport,
2292 {
2293 type Client = DeviceClient<___T>;
2294 type Server = DeviceServer<___T>;
2295 }
2296
2297 #[repr(transparent)]
2299 pub struct DeviceClient<___T: ::fidl_next::Transport> {
2300 #[allow(dead_code)]
2301 client: ::fidl_next::protocol::Client<___T>,
2302 }
2303
2304 impl<___T> DeviceClient<___T>
2305 where
2306 ___T: ::fidl_next::Transport,
2307 {
2308 #[doc = " Returns a structure containing device information from the configuration header.\n"]
2309 pub fn get_device_info(
2310 &self,
2311 ) -> ::fidl_next::TwoWayFuture<'_, super::GetDeviceInfo, ___T> {
2312 ::fidl_next::TwoWayFuture::from_untyped(
2313 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2314 6168191258208672022,
2315 <super::GetDeviceInfo as ::fidl_next::Method>::FLEXIBILITY,
2316 (),
2317 ),
2318 )
2319 }
2320
2321 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2322 pub fn get_bar(
2323 &self,
2324
2325 bar_id: impl ::fidl_next::Encode<
2326 ::fidl_next::wire::Uint32,
2327 <___T as ::fidl_next::Transport>::SendBuffer,
2328 >,
2329 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBar, ___T>
2330 where
2331 <___T as ::fidl_next::Transport>::SendBuffer:
2332 ::fidl_next::encoder::InternalHandleEncoder,
2333 {
2334 self.get_bar_with(crate::generic::DeviceGetBarRequest { bar_id })
2335 }
2336
2337 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2338 pub fn get_bar_with<___R>(
2339 &self,
2340 request: ___R,
2341 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBar, ___T>
2342 where
2343 ___R: ::fidl_next::Encode<
2344 crate::wire::DeviceGetBarRequest,
2345 <___T as ::fidl_next::Transport>::SendBuffer,
2346 >,
2347 {
2348 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2349 7721003707982149241,
2350 <super::GetBar as ::fidl_next::Method>::FLEXIBILITY,
2351 request,
2352 ))
2353 }
2354
2355 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2356 pub fn set_bus_mastering(
2357 &self,
2358
2359 enabled: impl ::fidl_next::Encode<bool, <___T as ::fidl_next::Transport>::SendBuffer>,
2360 ) -> ::fidl_next::TwoWayFuture<'_, super::SetBusMastering, ___T>
2361 where
2362 <___T as ::fidl_next::Transport>::SendBuffer:
2363 ::fidl_next::encoder::InternalHandleEncoder,
2364 {
2365 self.set_bus_mastering_with(crate::generic::DeviceSetBusMasteringRequest {
2366 enabled,
2367 })
2368 }
2369
2370 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2371 pub fn set_bus_mastering_with<___R>(
2372 &self,
2373 request: ___R,
2374 ) -> ::fidl_next::TwoWayFuture<'_, super::SetBusMastering, ___T>
2375 where
2376 ___R: ::fidl_next::Encode<
2377 crate::wire::DeviceSetBusMasteringRequest,
2378 <___T as ::fidl_next::Transport>::SendBuffer,
2379 >,
2380 {
2381 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2382 3756540713293123587,
2383 <super::SetBusMastering as ::fidl_next::Method>::FLEXIBILITY,
2384 request,
2385 ))
2386 }
2387
2388 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
2389 pub fn reset_device(&self) -> ::fidl_next::TwoWayFuture<'_, super::ResetDevice, ___T> {
2390 ::fidl_next::TwoWayFuture::from_untyped(
2391 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2392 4349199030852488095,
2393 <super::ResetDevice as ::fidl_next::Method>::FLEXIBILITY,
2394 (),
2395 ),
2396 )
2397 }
2398
2399 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
2400 pub fn ack_interrupt(
2401 &self,
2402 ) -> ::fidl_next::TwoWayFuture<'_, super::AckInterrupt, ___T> {
2403 ::fidl_next::TwoWayFuture::from_untyped(
2404 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2405 8103153737854179947,
2406 <super::AckInterrupt as ::fidl_next::Method>::FLEXIBILITY,
2407 (),
2408 ),
2409 )
2410 }
2411
2412 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2413 pub fn map_interrupt(
2414 &self,
2415
2416 which_irq: impl ::fidl_next::Encode<
2417 ::fidl_next::wire::Uint32,
2418 <___T as ::fidl_next::Transport>::SendBuffer,
2419 >,
2420 ) -> ::fidl_next::TwoWayFuture<'_, super::MapInterrupt, ___T>
2421 where
2422 <___T as ::fidl_next::Transport>::SendBuffer:
2423 ::fidl_next::encoder::InternalHandleEncoder,
2424 {
2425 self.map_interrupt_with(crate::generic::DeviceMapInterruptRequest { which_irq })
2426 }
2427
2428 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2429 pub fn map_interrupt_with<___R>(
2430 &self,
2431 request: ___R,
2432 ) -> ::fidl_next::TwoWayFuture<'_, super::MapInterrupt, ___T>
2433 where
2434 ___R: ::fidl_next::Encode<
2435 crate::wire::DeviceMapInterruptRequest,
2436 <___T as ::fidl_next::Transport>::SendBuffer,
2437 >,
2438 {
2439 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2440 2733403074518448659,
2441 <super::MapInterrupt as ::fidl_next::Method>::FLEXIBILITY,
2442 request,
2443 ))
2444 }
2445
2446 #[doc = " Returns the supported interrupt modes for a device.\n"]
2447 pub fn get_interrupt_modes(
2448 &self,
2449 ) -> ::fidl_next::TwoWayFuture<'_, super::GetInterruptModes, ___T> {
2450 ::fidl_next::TwoWayFuture::from_untyped(
2451 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2452 666335764625137482,
2453 <super::GetInterruptModes as ::fidl_next::Method>::FLEXIBILITY,
2454 (),
2455 ),
2456 )
2457 }
2458
2459 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2460 pub fn set_interrupt_mode(
2461 &self,
2462
2463 mode: impl ::fidl_next::Encode<
2464 crate::wire::InterruptMode,
2465 <___T as ::fidl_next::Transport>::SendBuffer,
2466 >,
2467
2468 requested_irq_count: impl ::fidl_next::Encode<
2469 ::fidl_next::wire::Uint32,
2470 <___T as ::fidl_next::Transport>::SendBuffer,
2471 >,
2472 ) -> ::fidl_next::TwoWayFuture<'_, super::SetInterruptMode, ___T>
2473 where
2474 <___T as ::fidl_next::Transport>::SendBuffer:
2475 ::fidl_next::encoder::InternalHandleEncoder,
2476 {
2477 self.set_interrupt_mode_with(crate::generic::DeviceSetInterruptModeRequest {
2478 mode,
2479
2480 requested_irq_count,
2481 })
2482 }
2483
2484 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2485 pub fn set_interrupt_mode_with<___R>(
2486 &self,
2487 request: ___R,
2488 ) -> ::fidl_next::TwoWayFuture<'_, super::SetInterruptMode, ___T>
2489 where
2490 ___R: ::fidl_next::Encode<
2491 crate::wire::DeviceSetInterruptModeRequest,
2492 <___T as ::fidl_next::Transport>::SendBuffer,
2493 >,
2494 {
2495 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2496 602334104497834086,
2497 <super::SetInterruptMode as ::fidl_next::Method>::FLEXIBILITY,
2498 request,
2499 ))
2500 }
2501
2502 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2503 pub fn read_config8(
2504 &self,
2505
2506 offset: impl ::fidl_next::Encode<
2507 ::fidl_next::wire::Uint16,
2508 <___T as ::fidl_next::Transport>::SendBuffer,
2509 >,
2510 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig8, ___T>
2511 where
2512 <___T as ::fidl_next::Transport>::SendBuffer:
2513 ::fidl_next::encoder::InternalHandleEncoder,
2514 {
2515 self.read_config8_with(crate::generic::DeviceReadConfig8Request { offset })
2516 }
2517
2518 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2519 pub fn read_config8_with<___R>(
2520 &self,
2521 request: ___R,
2522 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig8, ___T>
2523 where
2524 ___R: ::fidl_next::Encode<
2525 crate::wire::DeviceReadConfig8Request,
2526 <___T as ::fidl_next::Transport>::SendBuffer,
2527 >,
2528 {
2529 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2530 2952650096395541020,
2531 <super::ReadConfig8 as ::fidl_next::Method>::FLEXIBILITY,
2532 request,
2533 ))
2534 }
2535
2536 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2537 pub fn read_config16(
2538 &self,
2539
2540 offset: impl ::fidl_next::Encode<
2541 ::fidl_next::wire::Uint16,
2542 <___T as ::fidl_next::Transport>::SendBuffer,
2543 >,
2544 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig16, ___T>
2545 where
2546 <___T as ::fidl_next::Transport>::SendBuffer:
2547 ::fidl_next::encoder::InternalHandleEncoder,
2548 {
2549 self.read_config16_with(crate::generic::DeviceReadConfig16Request { offset })
2550 }
2551
2552 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2553 pub fn read_config16_with<___R>(
2554 &self,
2555 request: ___R,
2556 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig16, ___T>
2557 where
2558 ___R: ::fidl_next::Encode<
2559 crate::wire::DeviceReadConfig16Request,
2560 <___T as ::fidl_next::Transport>::SendBuffer,
2561 >,
2562 {
2563 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2564 4309283036617404603,
2565 <super::ReadConfig16 as ::fidl_next::Method>::FLEXIBILITY,
2566 request,
2567 ))
2568 }
2569
2570 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2571 pub fn read_config32(
2572 &self,
2573
2574 offset: impl ::fidl_next::Encode<
2575 ::fidl_next::wire::Uint16,
2576 <___T as ::fidl_next::Transport>::SendBuffer,
2577 >,
2578 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig32, ___T>
2579 where
2580 <___T as ::fidl_next::Transport>::SendBuffer:
2581 ::fidl_next::encoder::InternalHandleEncoder,
2582 {
2583 self.read_config32_with(crate::generic::DeviceReadConfig32Request { offset })
2584 }
2585
2586 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2587 pub fn read_config32_with<___R>(
2588 &self,
2589 request: ___R,
2590 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig32, ___T>
2591 where
2592 ___R: ::fidl_next::Encode<
2593 crate::wire::DeviceReadConfig32Request,
2594 <___T as ::fidl_next::Transport>::SendBuffer,
2595 >,
2596 {
2597 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2598 6139942538560107783,
2599 <super::ReadConfig32 as ::fidl_next::Method>::FLEXIBILITY,
2600 request,
2601 ))
2602 }
2603
2604 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2605 pub fn write_config8(
2606 &self,
2607
2608 offset: impl ::fidl_next::Encode<
2609 ::fidl_next::wire::Uint16,
2610 <___T as ::fidl_next::Transport>::SendBuffer,
2611 >,
2612
2613 value: impl ::fidl_next::Encode<u8, <___T as ::fidl_next::Transport>::SendBuffer>,
2614 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig8, ___T>
2615 where
2616 <___T as ::fidl_next::Transport>::SendBuffer:
2617 ::fidl_next::encoder::InternalHandleEncoder,
2618 {
2619 self.write_config8_with(crate::generic::DeviceWriteConfig8Request { offset, value })
2620 }
2621
2622 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2623 pub fn write_config8_with<___R>(
2624 &self,
2625 request: ___R,
2626 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig8, ___T>
2627 where
2628 ___R: ::fidl_next::Encode<
2629 crate::wire::DeviceWriteConfig8Request,
2630 <___T as ::fidl_next::Transport>::SendBuffer,
2631 >,
2632 {
2633 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2634 331585330300009727,
2635 <super::WriteConfig8 as ::fidl_next::Method>::FLEXIBILITY,
2636 request,
2637 ))
2638 }
2639
2640 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2641 pub fn write_config16(
2642 &self,
2643
2644 offset: impl ::fidl_next::Encode<
2645 ::fidl_next::wire::Uint16,
2646 <___T as ::fidl_next::Transport>::SendBuffer,
2647 >,
2648
2649 value: impl ::fidl_next::Encode<
2650 ::fidl_next::wire::Uint16,
2651 <___T as ::fidl_next::Transport>::SendBuffer,
2652 >,
2653 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig16, ___T>
2654 where
2655 <___T as ::fidl_next::Transport>::SendBuffer:
2656 ::fidl_next::encoder::InternalHandleEncoder,
2657 {
2658 self.write_config16_with(crate::generic::DeviceWriteConfig16Request {
2659 offset,
2660
2661 value,
2662 })
2663 }
2664
2665 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2666 pub fn write_config16_with<___R>(
2667 &self,
2668 request: ___R,
2669 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig16, ___T>
2670 where
2671 ___R: ::fidl_next::Encode<
2672 crate::wire::DeviceWriteConfig16Request,
2673 <___T as ::fidl_next::Transport>::SendBuffer,
2674 >,
2675 {
2676 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2677 4481291721614851839,
2678 <super::WriteConfig16 as ::fidl_next::Method>::FLEXIBILITY,
2679 request,
2680 ))
2681 }
2682
2683 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2684 pub fn write_config32(
2685 &self,
2686
2687 offset: impl ::fidl_next::Encode<
2688 ::fidl_next::wire::Uint16,
2689 <___T as ::fidl_next::Transport>::SendBuffer,
2690 >,
2691
2692 value: impl ::fidl_next::Encode<
2693 ::fidl_next::wire::Uint32,
2694 <___T as ::fidl_next::Transport>::SendBuffer,
2695 >,
2696 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig32, ___T>
2697 where
2698 <___T as ::fidl_next::Transport>::SendBuffer:
2699 ::fidl_next::encoder::InternalHandleEncoder,
2700 {
2701 self.write_config32_with(crate::generic::DeviceWriteConfig32Request {
2702 offset,
2703
2704 value,
2705 })
2706 }
2707
2708 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2709 pub fn write_config32_with<___R>(
2710 &self,
2711 request: ___R,
2712 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig32, ___T>
2713 where
2714 ___R: ::fidl_next::Encode<
2715 crate::wire::DeviceWriteConfig32Request,
2716 <___T as ::fidl_next::Transport>::SendBuffer,
2717 >,
2718 {
2719 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2720 99457760178582408,
2721 <super::WriteConfig32 as ::fidl_next::Method>::FLEXIBILITY,
2722 request,
2723 ))
2724 }
2725
2726 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2727 pub fn get_capabilities(
2728 &self,
2729
2730 id: impl ::fidl_next::Encode<
2731 crate::wire::CapabilityId,
2732 <___T as ::fidl_next::Transport>::SendBuffer,
2733 >,
2734 ) -> ::fidl_next::TwoWayFuture<'_, super::GetCapabilities, ___T>
2735 where
2736 <___T as ::fidl_next::Transport>::SendBuffer:
2737 ::fidl_next::encoder::InternalHandleEncoder,
2738 {
2739 self.get_capabilities_with(crate::generic::DeviceGetCapabilitiesRequest { id })
2740 }
2741
2742 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2743 pub fn get_capabilities_with<___R>(
2744 &self,
2745 request: ___R,
2746 ) -> ::fidl_next::TwoWayFuture<'_, super::GetCapabilities, ___T>
2747 where
2748 ___R: ::fidl_next::Encode<
2749 crate::wire::DeviceGetCapabilitiesRequest,
2750 <___T as ::fidl_next::Transport>::SendBuffer,
2751 >,
2752 {
2753 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2754 4180765276430907919,
2755 <super::GetCapabilities as ::fidl_next::Method>::FLEXIBILITY,
2756 request,
2757 ))
2758 }
2759
2760 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2761 pub fn get_extended_capabilities(
2762 &self,
2763
2764 id: impl ::fidl_next::Encode<
2765 crate::wire::ExtendedCapabilityId,
2766 <___T as ::fidl_next::Transport>::SendBuffer,
2767 >,
2768 ) -> ::fidl_next::TwoWayFuture<'_, super::GetExtendedCapabilities, ___T>
2769 where
2770 <___T as ::fidl_next::Transport>::SendBuffer:
2771 ::fidl_next::encoder::InternalHandleEncoder,
2772 {
2773 self.get_extended_capabilities_with(
2774 crate::generic::DeviceGetExtendedCapabilitiesRequest { id },
2775 )
2776 }
2777
2778 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2779 pub fn get_extended_capabilities_with<___R>(
2780 &self,
2781 request: ___R,
2782 ) -> ::fidl_next::TwoWayFuture<'_, super::GetExtendedCapabilities, ___T>
2783 where
2784 ___R: ::fidl_next::Encode<
2785 crate::wire::DeviceGetExtendedCapabilitiesRequest,
2786 <___T as ::fidl_next::Transport>::SendBuffer,
2787 >,
2788 {
2789 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2790 830197180054506553,
2791 <super::GetExtendedCapabilities as ::fidl_next::Method>::FLEXIBILITY,
2792 request,
2793 ))
2794 }
2795
2796 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2797 pub fn get_bti(
2798 &self,
2799
2800 index: impl ::fidl_next::Encode<
2801 ::fidl_next::wire::Uint32,
2802 <___T as ::fidl_next::Transport>::SendBuffer,
2803 >,
2804 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBti, ___T>
2805 where
2806 <___T as ::fidl_next::Transport>::SendBuffer:
2807 ::fidl_next::encoder::InternalHandleEncoder,
2808 {
2809 self.get_bti_with(crate::generic::DeviceGetBtiRequest { index })
2810 }
2811
2812 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2813 pub fn get_bti_with<___R>(
2814 &self,
2815 request: ___R,
2816 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBti, ___T>
2817 where
2818 ___R: ::fidl_next::Encode<
2819 crate::wire::DeviceGetBtiRequest,
2820 <___T as ::fidl_next::Transport>::SendBuffer,
2821 >,
2822 {
2823 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2824 6795907578404380387,
2825 <super::GetBti as ::fidl_next::Method>::FLEXIBILITY,
2826 request,
2827 ))
2828 }
2829 }
2830
2831 #[repr(transparent)]
2833 pub struct DeviceServer<___T: ::fidl_next::Transport> {
2834 server: ::fidl_next::protocol::Server<___T>,
2835 }
2836
2837 impl<___T> DeviceServer<___T> where ___T: ::fidl_next::Transport {}
2838 }
2839}
2840
2841#[diagnostic::on_unimplemented(
2842 note = "If {Self} implements the non-local DeviceClientHandler trait, use `spawn_as_local` or the `Local` adapter type"
2843)]
2844
2845pub trait DeviceLocalClientHandler<
2849 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
2850 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
2851>
2852{
2853}
2854
2855impl<___H, ___T> ::fidl_next::DispatchLocalClientMessage<___H, ___T> for Device
2856where
2857 ___H: DeviceLocalClientHandler<___T>,
2858 ___T: ::fidl_next::Transport,
2859{
2860 async fn on_event(
2861 handler: &mut ___H,
2862 mut message: ::fidl_next::Message<___T>,
2863 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
2864 match *message.header().ordinal {
2865 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
2866 }
2867 }
2868}
2869
2870#[diagnostic::on_unimplemented(
2871 note = "If {Self} implements the non-local DeviceServerHandler trait, use `spawn_as_local` or the `Local` adapter type"
2872)]
2873
2874pub trait DeviceLocalServerHandler<
2878 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
2879 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
2880>
2881{
2882 #[doc = " Returns a structure containing device information from the configuration header.\n"]
2883 fn get_device_info(
2884 &mut self,
2885
2886 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
2887 ) -> impl ::core::future::Future<Output = ()>;
2888
2889 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2890 fn get_bar(
2891 &mut self,
2892
2893 request: ::fidl_next::Request<device::GetBar, ___T>,
2894
2895 responder: ::fidl_next::Responder<device::GetBar, ___T>,
2896 ) -> impl ::core::future::Future<Output = ()>;
2897
2898 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2899 fn set_bus_mastering(
2900 &mut self,
2901
2902 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
2903
2904 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
2905 ) -> impl ::core::future::Future<Output = ()>;
2906
2907 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
2908 fn reset_device(
2909 &mut self,
2910
2911 responder: ::fidl_next::Responder<device::ResetDevice, ___T>,
2912 ) -> impl ::core::future::Future<Output = ()>;
2913
2914 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
2915 fn ack_interrupt(
2916 &mut self,
2917
2918 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
2919 ) -> impl ::core::future::Future<Output = ()>;
2920
2921 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2922 fn map_interrupt(
2923 &mut self,
2924
2925 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
2926
2927 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
2928 ) -> impl ::core::future::Future<Output = ()>;
2929
2930 #[doc = " Returns the supported interrupt modes for a device.\n"]
2931 fn get_interrupt_modes(
2932 &mut self,
2933
2934 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
2935 ) -> impl ::core::future::Future<Output = ()>;
2936
2937 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2938 fn set_interrupt_mode(
2939 &mut self,
2940
2941 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
2942
2943 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
2944 ) -> impl ::core::future::Future<Output = ()>;
2945
2946 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2947 fn read_config8(
2948 &mut self,
2949
2950 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
2951
2952 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
2953 ) -> impl ::core::future::Future<Output = ()>;
2954
2955 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2956 fn read_config16(
2957 &mut self,
2958
2959 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
2960
2961 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
2962 ) -> impl ::core::future::Future<Output = ()>;
2963
2964 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2965 fn read_config32(
2966 &mut self,
2967
2968 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
2969
2970 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
2971 ) -> impl ::core::future::Future<Output = ()>;
2972
2973 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2974 fn write_config8(
2975 &mut self,
2976
2977 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
2978
2979 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
2980 ) -> impl ::core::future::Future<Output = ()>;
2981
2982 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2983 fn write_config16(
2984 &mut self,
2985
2986 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
2987
2988 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
2989 ) -> impl ::core::future::Future<Output = ()>;
2990
2991 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2992 fn write_config32(
2993 &mut self,
2994
2995 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
2996
2997 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
2998 ) -> impl ::core::future::Future<Output = ()>;
2999
3000 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
3001 fn get_capabilities(
3002 &mut self,
3003
3004 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
3005
3006 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
3007 ) -> impl ::core::future::Future<Output = ()>;
3008
3009 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
3010 fn get_extended_capabilities(
3011 &mut self,
3012
3013 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
3014
3015 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
3016 ) -> impl ::core::future::Future<Output = ()>;
3017
3018 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
3019 fn get_bti(
3020 &mut self,
3021
3022 request: ::fidl_next::Request<device::GetBti, ___T>,
3023
3024 responder: ::fidl_next::Responder<device::GetBti, ___T>,
3025 ) -> impl ::core::future::Future<Output = ()>;
3026}
3027
3028impl<___H, ___T> ::fidl_next::DispatchLocalServerMessage<___H, ___T> for Device
3029where
3030 ___H: DeviceLocalServerHandler<___T>,
3031 ___T: ::fidl_next::Transport,
3032 for<'de> crate::wire::DeviceGetBarRequest: ::fidl_next::Decode<
3033 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3034 Constraint = (),
3035 >,
3036 for<'de> crate::wire::DeviceSetBusMasteringRequest: ::fidl_next::Decode<
3037 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3038 Constraint = (),
3039 >,
3040 for<'de> crate::wire::DeviceMapInterruptRequest: ::fidl_next::Decode<
3041 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3042 Constraint = (),
3043 >,
3044 for<'de> crate::wire::DeviceSetInterruptModeRequest: ::fidl_next::Decode<
3045 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3046 Constraint = (),
3047 >,
3048 for<'de> crate::wire::DeviceReadConfig8Request: ::fidl_next::Decode<
3049 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3050 Constraint = (),
3051 >,
3052 for<'de> crate::wire::DeviceReadConfig16Request: ::fidl_next::Decode<
3053 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3054 Constraint = (),
3055 >,
3056 for<'de> crate::wire::DeviceReadConfig32Request: ::fidl_next::Decode<
3057 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3058 Constraint = (),
3059 >,
3060 for<'de> crate::wire::DeviceWriteConfig8Request: ::fidl_next::Decode<
3061 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3062 Constraint = (),
3063 >,
3064 for<'de> crate::wire::DeviceWriteConfig16Request: ::fidl_next::Decode<
3065 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3066 Constraint = (),
3067 >,
3068 for<'de> crate::wire::DeviceWriteConfig32Request: ::fidl_next::Decode<
3069 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3070 Constraint = (),
3071 >,
3072 for<'de> crate::wire::DeviceGetCapabilitiesRequest: ::fidl_next::Decode<
3073 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3074 Constraint = (),
3075 >,
3076 for<'de> crate::wire::DeviceGetExtendedCapabilitiesRequest: ::fidl_next::Decode<
3077 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3078 Constraint = (),
3079 >,
3080 for<'de> crate::wire::DeviceGetBtiRequest: ::fidl_next::Decode<
3081 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3082 Constraint = (),
3083 >,
3084{
3085 async fn on_one_way(
3086 handler: &mut ___H,
3087 mut message: ::fidl_next::Message<___T>,
3088 ) -> ::core::result::Result<
3089 (),
3090 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3091 > {
3092 match *message.header().ordinal {
3093 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3094 }
3095 }
3096
3097 async fn on_two_way(
3098 handler: &mut ___H,
3099 mut message: ::fidl_next::Message<___T>,
3100 responder: ::fidl_next::protocol::Responder<___T>,
3101 ) -> ::core::result::Result<
3102 (),
3103 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3104 > {
3105 match *message.header().ordinal {
3106 6168191258208672022 => {
3107 let responder = ::fidl_next::Responder::from_untyped(responder);
3108
3109 handler.get_device_info(responder).await;
3110 Ok(())
3111 }
3112
3113 7721003707982149241 => {
3114 let responder = ::fidl_next::Responder::from_untyped(responder);
3115
3116 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3117 Ok(decoded) => {
3118 handler
3119 .get_bar(::fidl_next::Request::from_decoded(decoded), responder)
3120 .await;
3121 Ok(())
3122 }
3123 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3124 ordinal: 7721003707982149241,
3125 error,
3126 }),
3127 }
3128 }
3129
3130 3756540713293123587 => {
3131 let responder = ::fidl_next::Responder::from_untyped(responder);
3132
3133 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3134 Ok(decoded) => {
3135 handler
3136 .set_bus_mastering(
3137 ::fidl_next::Request::from_decoded(decoded),
3138 responder,
3139 )
3140 .await;
3141 Ok(())
3142 }
3143 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3144 ordinal: 3756540713293123587,
3145 error,
3146 }),
3147 }
3148 }
3149
3150 4349199030852488095 => {
3151 let responder = ::fidl_next::Responder::from_untyped(responder);
3152
3153 handler.reset_device(responder).await;
3154 Ok(())
3155 }
3156
3157 8103153737854179947 => {
3158 let responder = ::fidl_next::Responder::from_untyped(responder);
3159
3160 handler.ack_interrupt(responder).await;
3161 Ok(())
3162 }
3163
3164 2733403074518448659 => {
3165 let responder = ::fidl_next::Responder::from_untyped(responder);
3166
3167 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3168 Ok(decoded) => {
3169 handler
3170 .map_interrupt(::fidl_next::Request::from_decoded(decoded), responder)
3171 .await;
3172 Ok(())
3173 }
3174 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3175 ordinal: 2733403074518448659,
3176 error,
3177 }),
3178 }
3179 }
3180
3181 666335764625137482 => {
3182 let responder = ::fidl_next::Responder::from_untyped(responder);
3183
3184 handler.get_interrupt_modes(responder).await;
3185 Ok(())
3186 }
3187
3188 602334104497834086 => {
3189 let responder = ::fidl_next::Responder::from_untyped(responder);
3190
3191 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3192 Ok(decoded) => {
3193 handler
3194 .set_interrupt_mode(
3195 ::fidl_next::Request::from_decoded(decoded),
3196 responder,
3197 )
3198 .await;
3199 Ok(())
3200 }
3201 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3202 ordinal: 602334104497834086,
3203 error,
3204 }),
3205 }
3206 }
3207
3208 2952650096395541020 => {
3209 let responder = ::fidl_next::Responder::from_untyped(responder);
3210
3211 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3212 Ok(decoded) => {
3213 handler
3214 .read_config8(::fidl_next::Request::from_decoded(decoded), responder)
3215 .await;
3216 Ok(())
3217 }
3218 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3219 ordinal: 2952650096395541020,
3220 error,
3221 }),
3222 }
3223 }
3224
3225 4309283036617404603 => {
3226 let responder = ::fidl_next::Responder::from_untyped(responder);
3227
3228 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3229 Ok(decoded) => {
3230 handler
3231 .read_config16(::fidl_next::Request::from_decoded(decoded), responder)
3232 .await;
3233 Ok(())
3234 }
3235 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3236 ordinal: 4309283036617404603,
3237 error,
3238 }),
3239 }
3240 }
3241
3242 6139942538560107783 => {
3243 let responder = ::fidl_next::Responder::from_untyped(responder);
3244
3245 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3246 Ok(decoded) => {
3247 handler
3248 .read_config32(::fidl_next::Request::from_decoded(decoded), responder)
3249 .await;
3250 Ok(())
3251 }
3252 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3253 ordinal: 6139942538560107783,
3254 error,
3255 }),
3256 }
3257 }
3258
3259 331585330300009727 => {
3260 let responder = ::fidl_next::Responder::from_untyped(responder);
3261
3262 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3263 Ok(decoded) => {
3264 handler
3265 .write_config8(::fidl_next::Request::from_decoded(decoded), responder)
3266 .await;
3267 Ok(())
3268 }
3269 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3270 ordinal: 331585330300009727,
3271 error,
3272 }),
3273 }
3274 }
3275
3276 4481291721614851839 => {
3277 let responder = ::fidl_next::Responder::from_untyped(responder);
3278
3279 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3280 Ok(decoded) => {
3281 handler
3282 .write_config16(::fidl_next::Request::from_decoded(decoded), responder)
3283 .await;
3284 Ok(())
3285 }
3286 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3287 ordinal: 4481291721614851839,
3288 error,
3289 }),
3290 }
3291 }
3292
3293 99457760178582408 => {
3294 let responder = ::fidl_next::Responder::from_untyped(responder);
3295
3296 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3297 Ok(decoded) => {
3298 handler
3299 .write_config32(::fidl_next::Request::from_decoded(decoded), responder)
3300 .await;
3301 Ok(())
3302 }
3303 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3304 ordinal: 99457760178582408,
3305 error,
3306 }),
3307 }
3308 }
3309
3310 4180765276430907919 => {
3311 let responder = ::fidl_next::Responder::from_untyped(responder);
3312
3313 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3314 Ok(decoded) => {
3315 handler
3316 .get_capabilities(
3317 ::fidl_next::Request::from_decoded(decoded),
3318 responder,
3319 )
3320 .await;
3321 Ok(())
3322 }
3323 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3324 ordinal: 4180765276430907919,
3325 error,
3326 }),
3327 }
3328 }
3329
3330 830197180054506553 => {
3331 let responder = ::fidl_next::Responder::from_untyped(responder);
3332
3333 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3334 Ok(decoded) => {
3335 handler
3336 .get_extended_capabilities(
3337 ::fidl_next::Request::from_decoded(decoded),
3338 responder,
3339 )
3340 .await;
3341 Ok(())
3342 }
3343 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3344 ordinal: 830197180054506553,
3345 error,
3346 }),
3347 }
3348 }
3349
3350 6795907578404380387 => {
3351 let responder = ::fidl_next::Responder::from_untyped(responder);
3352
3353 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3354 Ok(decoded) => {
3355 handler
3356 .get_bti(::fidl_next::Request::from_decoded(decoded), responder)
3357 .await;
3358 Ok(())
3359 }
3360 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3361 ordinal: 6795907578404380387,
3362 error,
3363 }),
3364 }
3365 }
3366
3367 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3368 }
3369 }
3370}
3371
3372pub trait DeviceClientHandler<
3376 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
3377 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
3378>
3379{
3380}
3381
3382impl<___H, ___T> ::fidl_next::DispatchClientMessage<___H, ___T> for Device
3383where
3384 ___H: DeviceClientHandler<___T> + ::core::marker::Send,
3385 ___T: ::fidl_next::Transport,
3386{
3387 async fn on_event(
3388 handler: &mut ___H,
3389 mut message: ::fidl_next::Message<___T>,
3390 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
3391 match *message.header().ordinal {
3392 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3393 }
3394 }
3395}
3396
3397pub trait DeviceServerHandler<
3401 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
3402 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
3403>
3404{
3405 #[doc = " Returns a structure containing device information from the configuration header.\n"]
3406 fn get_device_info(
3407 &mut self,
3408
3409 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
3410 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3411
3412 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
3413 fn get_bar(
3414 &mut self,
3415
3416 request: ::fidl_next::Request<device::GetBar, ___T>,
3417
3418 responder: ::fidl_next::Responder<device::GetBar, ___T>,
3419 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3420
3421 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
3422 fn set_bus_mastering(
3423 &mut self,
3424
3425 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
3426
3427 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
3428 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3429
3430 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
3431 fn reset_device(
3432 &mut self,
3433
3434 responder: ::fidl_next::Responder<device::ResetDevice, ___T>,
3435 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3436
3437 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
3438 fn ack_interrupt(
3439 &mut self,
3440
3441 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
3442 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3443
3444 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
3445 fn map_interrupt(
3446 &mut self,
3447
3448 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
3449
3450 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
3451 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3452
3453 #[doc = " Returns the supported interrupt modes for a device.\n"]
3454 fn get_interrupt_modes(
3455 &mut self,
3456
3457 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
3458 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3459
3460 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
3461 fn set_interrupt_mode(
3462 &mut self,
3463
3464 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
3465
3466 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
3467 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3468
3469 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3470 fn read_config8(
3471 &mut self,
3472
3473 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
3474
3475 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
3476 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3477
3478 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3479 fn read_config16(
3480 &mut self,
3481
3482 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
3483
3484 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
3485 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3486
3487 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3488 fn read_config32(
3489 &mut self,
3490
3491 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
3492
3493 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
3494 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3495
3496 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3497 fn write_config8(
3498 &mut self,
3499
3500 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
3501
3502 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
3503 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3504
3505 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3506 fn write_config16(
3507 &mut self,
3508
3509 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
3510
3511 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
3512 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3513
3514 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3515 fn write_config32(
3516 &mut self,
3517
3518 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
3519
3520 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
3521 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3522
3523 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
3524 fn get_capabilities(
3525 &mut self,
3526
3527 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
3528
3529 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
3530 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3531
3532 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
3533 fn get_extended_capabilities(
3534 &mut self,
3535
3536 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
3537
3538 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
3539 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3540
3541 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
3542 fn get_bti(
3543 &mut self,
3544
3545 request: ::fidl_next::Request<device::GetBti, ___T>,
3546
3547 responder: ::fidl_next::Responder<device::GetBti, ___T>,
3548 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3549}
3550
3551impl<___H, ___T> ::fidl_next::DispatchServerMessage<___H, ___T> for Device
3552where
3553 ___H: DeviceServerHandler<___T> + ::core::marker::Send,
3554 ___T: ::fidl_next::Transport,
3555 for<'de> crate::wire::DeviceGetBarRequest: ::fidl_next::Decode<
3556 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3557 Constraint = (),
3558 >,
3559 for<'de> crate::wire::DeviceSetBusMasteringRequest: ::fidl_next::Decode<
3560 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3561 Constraint = (),
3562 >,
3563 for<'de> crate::wire::DeviceMapInterruptRequest: ::fidl_next::Decode<
3564 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3565 Constraint = (),
3566 >,
3567 for<'de> crate::wire::DeviceSetInterruptModeRequest: ::fidl_next::Decode<
3568 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3569 Constraint = (),
3570 >,
3571 for<'de> crate::wire::DeviceReadConfig8Request: ::fidl_next::Decode<
3572 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3573 Constraint = (),
3574 >,
3575 for<'de> crate::wire::DeviceReadConfig16Request: ::fidl_next::Decode<
3576 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3577 Constraint = (),
3578 >,
3579 for<'de> crate::wire::DeviceReadConfig32Request: ::fidl_next::Decode<
3580 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3581 Constraint = (),
3582 >,
3583 for<'de> crate::wire::DeviceWriteConfig8Request: ::fidl_next::Decode<
3584 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3585 Constraint = (),
3586 >,
3587 for<'de> crate::wire::DeviceWriteConfig16Request: ::fidl_next::Decode<
3588 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3589 Constraint = (),
3590 >,
3591 for<'de> crate::wire::DeviceWriteConfig32Request: ::fidl_next::Decode<
3592 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3593 Constraint = (),
3594 >,
3595 for<'de> crate::wire::DeviceGetCapabilitiesRequest: ::fidl_next::Decode<
3596 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3597 Constraint = (),
3598 >,
3599 for<'de> crate::wire::DeviceGetExtendedCapabilitiesRequest: ::fidl_next::Decode<
3600 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3601 Constraint = (),
3602 >,
3603 for<'de> crate::wire::DeviceGetBtiRequest: ::fidl_next::Decode<
3604 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3605 Constraint = (),
3606 >,
3607{
3608 async fn on_one_way(
3609 handler: &mut ___H,
3610 mut message: ::fidl_next::Message<___T>,
3611 ) -> ::core::result::Result<
3612 (),
3613 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3614 > {
3615 match *message.header().ordinal {
3616 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3617 }
3618 }
3619
3620 async fn on_two_way(
3621 handler: &mut ___H,
3622 mut message: ::fidl_next::Message<___T>,
3623 responder: ::fidl_next::protocol::Responder<___T>,
3624 ) -> ::core::result::Result<
3625 (),
3626 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3627 > {
3628 match *message.header().ordinal {
3629 6168191258208672022 => {
3630 let responder = ::fidl_next::Responder::from_untyped(responder);
3631
3632 handler.get_device_info(responder).await;
3633 Ok(())
3634 }
3635
3636 7721003707982149241 => {
3637 let responder = ::fidl_next::Responder::from_untyped(responder);
3638
3639 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3640 Ok(decoded) => {
3641 handler
3642 .get_bar(::fidl_next::Request::from_decoded(decoded), responder)
3643 .await;
3644 Ok(())
3645 }
3646 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3647 ordinal: 7721003707982149241,
3648 error,
3649 }),
3650 }
3651 }
3652
3653 3756540713293123587 => {
3654 let responder = ::fidl_next::Responder::from_untyped(responder);
3655
3656 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3657 Ok(decoded) => {
3658 handler
3659 .set_bus_mastering(
3660 ::fidl_next::Request::from_decoded(decoded),
3661 responder,
3662 )
3663 .await;
3664 Ok(())
3665 }
3666 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3667 ordinal: 3756540713293123587,
3668 error,
3669 }),
3670 }
3671 }
3672
3673 4349199030852488095 => {
3674 let responder = ::fidl_next::Responder::from_untyped(responder);
3675
3676 handler.reset_device(responder).await;
3677 Ok(())
3678 }
3679
3680 8103153737854179947 => {
3681 let responder = ::fidl_next::Responder::from_untyped(responder);
3682
3683 handler.ack_interrupt(responder).await;
3684 Ok(())
3685 }
3686
3687 2733403074518448659 => {
3688 let responder = ::fidl_next::Responder::from_untyped(responder);
3689
3690 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3691 Ok(decoded) => {
3692 handler
3693 .map_interrupt(::fidl_next::Request::from_decoded(decoded), responder)
3694 .await;
3695 Ok(())
3696 }
3697 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3698 ordinal: 2733403074518448659,
3699 error,
3700 }),
3701 }
3702 }
3703
3704 666335764625137482 => {
3705 let responder = ::fidl_next::Responder::from_untyped(responder);
3706
3707 handler.get_interrupt_modes(responder).await;
3708 Ok(())
3709 }
3710
3711 602334104497834086 => {
3712 let responder = ::fidl_next::Responder::from_untyped(responder);
3713
3714 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3715 Ok(decoded) => {
3716 handler
3717 .set_interrupt_mode(
3718 ::fidl_next::Request::from_decoded(decoded),
3719 responder,
3720 )
3721 .await;
3722 Ok(())
3723 }
3724 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3725 ordinal: 602334104497834086,
3726 error,
3727 }),
3728 }
3729 }
3730
3731 2952650096395541020 => {
3732 let responder = ::fidl_next::Responder::from_untyped(responder);
3733
3734 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3735 Ok(decoded) => {
3736 handler
3737 .read_config8(::fidl_next::Request::from_decoded(decoded), responder)
3738 .await;
3739 Ok(())
3740 }
3741 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3742 ordinal: 2952650096395541020,
3743 error,
3744 }),
3745 }
3746 }
3747
3748 4309283036617404603 => {
3749 let responder = ::fidl_next::Responder::from_untyped(responder);
3750
3751 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3752 Ok(decoded) => {
3753 handler
3754 .read_config16(::fidl_next::Request::from_decoded(decoded), responder)
3755 .await;
3756 Ok(())
3757 }
3758 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3759 ordinal: 4309283036617404603,
3760 error,
3761 }),
3762 }
3763 }
3764
3765 6139942538560107783 => {
3766 let responder = ::fidl_next::Responder::from_untyped(responder);
3767
3768 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3769 Ok(decoded) => {
3770 handler
3771 .read_config32(::fidl_next::Request::from_decoded(decoded), responder)
3772 .await;
3773 Ok(())
3774 }
3775 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3776 ordinal: 6139942538560107783,
3777 error,
3778 }),
3779 }
3780 }
3781
3782 331585330300009727 => {
3783 let responder = ::fidl_next::Responder::from_untyped(responder);
3784
3785 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3786 Ok(decoded) => {
3787 handler
3788 .write_config8(::fidl_next::Request::from_decoded(decoded), responder)
3789 .await;
3790 Ok(())
3791 }
3792 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3793 ordinal: 331585330300009727,
3794 error,
3795 }),
3796 }
3797 }
3798
3799 4481291721614851839 => {
3800 let responder = ::fidl_next::Responder::from_untyped(responder);
3801
3802 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3803 Ok(decoded) => {
3804 handler
3805 .write_config16(::fidl_next::Request::from_decoded(decoded), responder)
3806 .await;
3807 Ok(())
3808 }
3809 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3810 ordinal: 4481291721614851839,
3811 error,
3812 }),
3813 }
3814 }
3815
3816 99457760178582408 => {
3817 let responder = ::fidl_next::Responder::from_untyped(responder);
3818
3819 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3820 Ok(decoded) => {
3821 handler
3822 .write_config32(::fidl_next::Request::from_decoded(decoded), responder)
3823 .await;
3824 Ok(())
3825 }
3826 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3827 ordinal: 99457760178582408,
3828 error,
3829 }),
3830 }
3831 }
3832
3833 4180765276430907919 => {
3834 let responder = ::fidl_next::Responder::from_untyped(responder);
3835
3836 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3837 Ok(decoded) => {
3838 handler
3839 .get_capabilities(
3840 ::fidl_next::Request::from_decoded(decoded),
3841 responder,
3842 )
3843 .await;
3844 Ok(())
3845 }
3846 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3847 ordinal: 4180765276430907919,
3848 error,
3849 }),
3850 }
3851 }
3852
3853 830197180054506553 => {
3854 let responder = ::fidl_next::Responder::from_untyped(responder);
3855
3856 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3857 Ok(decoded) => {
3858 handler
3859 .get_extended_capabilities(
3860 ::fidl_next::Request::from_decoded(decoded),
3861 responder,
3862 )
3863 .await;
3864 Ok(())
3865 }
3866 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3867 ordinal: 830197180054506553,
3868 error,
3869 }),
3870 }
3871 }
3872
3873 6795907578404380387 => {
3874 let responder = ::fidl_next::Responder::from_untyped(responder);
3875
3876 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3877 Ok(decoded) => {
3878 handler
3879 .get_bti(::fidl_next::Request::from_decoded(decoded), responder)
3880 .await;
3881 Ok(())
3882 }
3883 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3884 ordinal: 6795907578404380387,
3885 error,
3886 }),
3887 }
3888 }
3889
3890 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3891 }
3892 }
3893}
3894
3895impl<___T> DeviceClientHandler<___T> for ::fidl_next::IgnoreEvents where ___T: ::fidl_next::Transport
3896{}
3897
3898impl<___H, ___T> DeviceLocalClientHandler<___T> for ::fidl_next::Local<___H>
3899where
3900 ___H: DeviceClientHandler<___T>,
3901 ___T: ::fidl_next::Transport,
3902{
3903}
3904
3905impl<___H, ___T> DeviceLocalServerHandler<___T> for ::fidl_next::Local<___H>
3906where
3907 ___H: DeviceServerHandler<___T>,
3908 ___T: ::fidl_next::Transport,
3909{
3910 async fn get_device_info(
3911 &mut self,
3912
3913 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
3914 ) {
3915 ___H::get_device_info(&mut self.0, responder).await
3916 }
3917
3918 async fn get_bar(
3919 &mut self,
3920
3921 request: ::fidl_next::Request<device::GetBar, ___T>,
3922
3923 responder: ::fidl_next::Responder<device::GetBar, ___T>,
3924 ) {
3925 ___H::get_bar(&mut self.0, request, responder).await
3926 }
3927
3928 async fn set_bus_mastering(
3929 &mut self,
3930
3931 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
3932
3933 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
3934 ) {
3935 ___H::set_bus_mastering(&mut self.0, request, responder).await
3936 }
3937
3938 async fn reset_device(&mut self, responder: ::fidl_next::Responder<device::ResetDevice, ___T>) {
3939 ___H::reset_device(&mut self.0, responder).await
3940 }
3941
3942 async fn ack_interrupt(
3943 &mut self,
3944
3945 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
3946 ) {
3947 ___H::ack_interrupt(&mut self.0, responder).await
3948 }
3949
3950 async fn map_interrupt(
3951 &mut self,
3952
3953 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
3954
3955 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
3956 ) {
3957 ___H::map_interrupt(&mut self.0, request, responder).await
3958 }
3959
3960 async fn get_interrupt_modes(
3961 &mut self,
3962
3963 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
3964 ) {
3965 ___H::get_interrupt_modes(&mut self.0, responder).await
3966 }
3967
3968 async fn set_interrupt_mode(
3969 &mut self,
3970
3971 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
3972
3973 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
3974 ) {
3975 ___H::set_interrupt_mode(&mut self.0, request, responder).await
3976 }
3977
3978 async fn read_config8(
3979 &mut self,
3980
3981 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
3982
3983 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
3984 ) {
3985 ___H::read_config8(&mut self.0, request, responder).await
3986 }
3987
3988 async fn read_config16(
3989 &mut self,
3990
3991 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
3992
3993 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
3994 ) {
3995 ___H::read_config16(&mut self.0, request, responder).await
3996 }
3997
3998 async fn read_config32(
3999 &mut self,
4000
4001 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
4002
4003 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
4004 ) {
4005 ___H::read_config32(&mut self.0, request, responder).await
4006 }
4007
4008 async fn write_config8(
4009 &mut self,
4010
4011 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
4012
4013 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
4014 ) {
4015 ___H::write_config8(&mut self.0, request, responder).await
4016 }
4017
4018 async fn write_config16(
4019 &mut self,
4020
4021 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
4022
4023 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
4024 ) {
4025 ___H::write_config16(&mut self.0, request, responder).await
4026 }
4027
4028 async fn write_config32(
4029 &mut self,
4030
4031 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
4032
4033 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
4034 ) {
4035 ___H::write_config32(&mut self.0, request, responder).await
4036 }
4037
4038 async fn get_capabilities(
4039 &mut self,
4040
4041 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
4042
4043 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
4044 ) {
4045 ___H::get_capabilities(&mut self.0, request, responder).await
4046 }
4047
4048 async fn get_extended_capabilities(
4049 &mut self,
4050
4051 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
4052
4053 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
4054 ) {
4055 ___H::get_extended_capabilities(&mut self.0, request, responder).await
4056 }
4057
4058 async fn get_bti(
4059 &mut self,
4060
4061 request: ::fidl_next::Request<device::GetBti, ___T>,
4062
4063 responder: ::fidl_next::Responder<device::GetBti, ___T>,
4064 ) {
4065 ___H::get_bti(&mut self.0, request, responder).await
4066 }
4067}
4068
4069#[derive(Debug)]
4071pub struct Service;
4072
4073impl ::fidl_next::DiscoverableService for Service {
4074 const SERVICE_NAME: &'static str = "fuchsia.hardware.pci.Service";
4075 const MEMBER_NAMES: &'static [&'static str] = &["device"];
4076}
4077
4078impl ::fidl_next::HasServiceRequest<::fidl_next::fuchsia::zx::Channel> for Service {}
4079
4080impl<___C> ::fidl_next::Service<___C> for Service
4081where
4082 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
4083{
4084 type Connector = ServiceConnector<___C>;
4085}
4086
4087#[repr(transparent)]
4089pub struct ServiceConnector<___C> {
4090 #[allow(dead_code)]
4091 connector: ___C,
4092}
4093
4094impl<___C> ServiceConnector<___C>
4095where
4096 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
4097{
4098 pub fn device(
4100 &self,
4101 server_end: ::fidl_next::ServerEnd<crate::Device, ::fidl_next::fuchsia::zx::Channel>,
4102 ) -> ::core::result::Result<
4103 (),
4104 <___C as ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>>::Error,
4105 > {
4106 ::fidl_next::protocol::ServiceConnector::<
4107 ::fidl_next::fuchsia::zx::Channel
4108 >::connect_to_member(
4109 &self.connector,
4110 "device",
4111 server_end.into_untyped(),
4112 )
4113 }
4114}
4115
4116pub trait ServiceHandler {
4118 fn device(
4120 &self,
4121 server_end: ::fidl_next::ServerEnd<crate::Device, ::fidl_next::fuchsia::zx::Channel>,
4122 );
4123}
4124
4125impl<___H, ___T> ::fidl_next::DispatchServiceHandler<___H, ___T> for Service
4126where
4127 ___H: ServiceHandler,
4128 ::fidl_next::fuchsia::zx::Channel: ::fidl_next::InstanceFromServiceTransport<___T>,
4129{
4130 fn on_connection(handler: &___H, member: &str, server_end: ___T) {
4131 use ::fidl_next::InstanceFromServiceTransport;
4132 match member {
4133 "device" => handler.device(::fidl_next::ServerEnd::from_untyped(
4134 ::fidl_next::fuchsia::zx::Channel::from_service_transport(server_end),
4135 )),
4136
4137 _ => unreachable!(),
4138 }
4139 }
4140}
4141
4142pub use fidl_next_common_fuchsia_hardware_pci::*;