1#![warn(clippy::all)]
3#![allow(unused_parens, unused_variables, unused_mut, unused_imports, unreachable_code)]
4
5pub mod natural {
6
7 pub use fidl_next_common_fuchsia_hardware_pci::natural::*;
8
9 #[derive(Debug, PartialEq)]
10 pub struct IoBar {
11 pub address: u64,
12
13 pub resource: ::fidl_next::fuchsia::zx::Resource,
14 }
15
16 unsafe impl<___E> ::fidl_next::Encode<crate::wire::IoBar, ___E> for IoBar
17 where
18 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
19 ___E: ::fidl_next::fuchsia::HandleEncoder,
20 {
21 #[inline]
22 fn encode(
23 self,
24 encoder_: &mut ___E,
25 out_: &mut ::core::mem::MaybeUninit<crate::wire::IoBar>,
26 _: (),
27 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
28 ::fidl_next::munge! {
29 let crate::wire::IoBar {
30 address,
31 resource,
32
33 } = out_;
34 }
35
36 ::fidl_next::Encode::encode(self.address, encoder_, address, ())?;
37
38 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(address.as_mut_ptr()) };
39
40 ::fidl_next::Encode::encode(self.resource, encoder_, resource, ())?;
41
42 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(resource.as_mut_ptr()) };
43
44 Ok(())
45 }
46 }
47
48 unsafe impl<___E>
49 ::fidl_next::EncodeOption<::fidl_next::wire::Box<'static, crate::wire::IoBar>, ___E>
50 for IoBar
51 where
52 ___E: ::fidl_next::Encoder + ?Sized,
53 IoBar: ::fidl_next::Encode<crate::wire::IoBar, ___E>,
54 {
55 #[inline]
56 fn encode_option(
57 this: ::core::option::Option<Self>,
58 encoder: &mut ___E,
59 out: &mut ::core::mem::MaybeUninit<::fidl_next::wire::Box<'static, crate::wire::IoBar>>,
60 _: (),
61 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
62 if let Some(inner) = this {
63 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
64 ::fidl_next::wire::Box::encode_present(out);
65 } else {
66 ::fidl_next::wire::Box::encode_absent(out);
67 }
68
69 Ok(())
70 }
71 }
72
73 impl ::fidl_next::FromWire<crate::wire::IoBar> for IoBar {
74 #[inline]
75 fn from_wire(wire: crate::wire::IoBar) -> Self {
76 Self {
77 address: ::fidl_next::FromWire::from_wire(wire.address),
78
79 resource: ::fidl_next::FromWire::from_wire(wire.resource),
80 }
81 }
82 }
83
84 #[derive(Debug, PartialEq)]
85 pub enum BarResult {
86 Io(crate::natural::IoBar),
87
88 Vmo(::fidl_next::fuchsia::zx::Vmo),
89
90 UnknownOrdinal_(u64),
91 }
92
93 impl BarResult {
94 pub fn is_unknown(&self) -> bool {
95 #[allow(unreachable_patterns)]
96 match self {
97 Self::UnknownOrdinal_(_) => true,
98 _ => false,
99 }
100 }
101 }
102
103 unsafe impl<___E> ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E> for BarResult
104 where
105 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
106 ___E: ::fidl_next::Encoder,
107 ___E: ::fidl_next::fuchsia::HandleEncoder,
108 {
109 #[inline]
110 fn encode(
111 self,
112 encoder: &mut ___E,
113 out: &mut ::core::mem::MaybeUninit<crate::wire::BarResult<'static>>,
114 _: (),
115 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
116 ::fidl_next::munge!(let crate::wire::BarResult { raw, _phantom: _ } = out);
117
118 match self {
119 Self::Io(value) => ::fidl_next::wire::Union::encode_as::<___E, crate::wire::IoBar>(
120 value,
121 1,
122 encoder,
123 raw,
124 (),
125 )?,
126
127 Self::Vmo(value) => ::fidl_next::wire::Union::encode_as::<
128 ___E,
129 ::fidl_next::wire::fuchsia::Vmo,
130 >(value, 2, encoder, raw, ())?,
131
132 Self::UnknownOrdinal_(ordinal) => {
133 return Err(::fidl_next::EncodeError::UnknownUnionOrdinal(ordinal as usize));
134 }
135 }
136
137 Ok(())
138 }
139 }
140
141 unsafe impl<___E> ::fidl_next::EncodeOption<crate::wire_optional::BarResult<'static>, ___E>
142 for BarResult
143 where
144 ___E: ?Sized,
145 BarResult: ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E>,
146 {
147 #[inline]
148 fn encode_option(
149 this: ::core::option::Option<Self>,
150 encoder: &mut ___E,
151 out: &mut ::core::mem::MaybeUninit<crate::wire_optional::BarResult<'static>>,
152 _: (),
153 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
154 ::fidl_next::munge!(let crate::wire_optional::BarResult { raw, _phantom: _ } = &mut *out);
155
156 if let Some(inner) = this {
157 let value_out = unsafe { &mut *out.as_mut_ptr().cast() };
158 ::fidl_next::Encode::encode(inner, encoder, value_out, ())?;
159 } else {
160 ::fidl_next::wire::Union::encode_absent(raw);
161 }
162
163 Ok(())
164 }
165 }
166
167 impl<'de> ::fidl_next::FromWire<crate::wire::BarResult<'de>> for BarResult {
168 #[inline]
169 fn from_wire(wire: crate::wire::BarResult<'de>) -> Self {
170 let wire = ::core::mem::ManuallyDrop::new(wire);
171 match wire.raw.ordinal() {
172 1 => Self::Io(::fidl_next::FromWire::from_wire(unsafe {
173 wire.raw.get().read_unchecked::<crate::wire::IoBar>()
174 })),
175
176 2 => Self::Vmo(::fidl_next::FromWire::from_wire(unsafe {
177 wire.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
178 })),
179
180 ord => return Self::UnknownOrdinal_(ord as u64),
181 }
182 }
183 }
184
185 impl<'de> ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>> for BarResult {
186 #[inline]
187 fn from_wire_option(
188 wire: crate::wire_optional::BarResult<'de>,
189 ) -> ::core::option::Option<Self> {
190 if let Some(inner) = wire.into_option() {
191 Some(::fidl_next::FromWire::from_wire(inner))
192 } else {
193 None
194 }
195 }
196 }
197
198 impl<'de> ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>> for Box<BarResult> {
199 #[inline]
200 fn from_wire_option(
201 wire: crate::wire_optional::BarResult<'de>,
202 ) -> ::core::option::Option<Self> {
203 <
204 BarResult as ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>>
205 >::from_wire_option(wire).map(Box::new)
206 }
207 }
208
209 #[doc = " Describes and provides access to a given Base Address Register for the device.\n"]
210 #[derive(Debug, PartialEq)]
211 pub struct Bar {
212 pub bar_id: u32,
213
214 pub size: u64,
215
216 pub result: crate::natural::BarResult,
217 }
218
219 unsafe impl<___E> ::fidl_next::Encode<crate::wire::Bar<'static>, ___E> for Bar
220 where
221 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
222 ___E: ::fidl_next::Encoder,
223 ___E: ::fidl_next::fuchsia::HandleEncoder,
224 {
225 #[inline]
226 fn encode(
227 self,
228 encoder_: &mut ___E,
229 out_: &mut ::core::mem::MaybeUninit<crate::wire::Bar<'static>>,
230 _: (),
231 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
232 ::fidl_next::munge! {
233 let crate::wire::Bar {
234 bar_id,
235 size,
236 result,
237
238 } = out_;
239 }
240
241 ::fidl_next::Encode::encode(self.bar_id, encoder_, bar_id, ())?;
242
243 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(bar_id.as_mut_ptr()) };
244
245 ::fidl_next::Encode::encode(self.size, encoder_, size, ())?;
246
247 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(size.as_mut_ptr()) };
248
249 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
250
251 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(result.as_mut_ptr()) };
252
253 Ok(())
254 }
255 }
256
257 unsafe impl<___E>
258 ::fidl_next::EncodeOption<::fidl_next::wire::Box<'static, crate::wire::Bar<'static>>, ___E>
259 for Bar
260 where
261 ___E: ::fidl_next::Encoder + ?Sized,
262 Bar: ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>,
263 {
264 #[inline]
265 fn encode_option(
266 this: ::core::option::Option<Self>,
267 encoder: &mut ___E,
268 out: &mut ::core::mem::MaybeUninit<
269 ::fidl_next::wire::Box<'static, crate::wire::Bar<'static>>,
270 >,
271 _: (),
272 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
273 if let Some(inner) = this {
274 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
275 ::fidl_next::wire::Box::encode_present(out);
276 } else {
277 ::fidl_next::wire::Box::encode_absent(out);
278 }
279
280 Ok(())
281 }
282 }
283
284 impl<'de> ::fidl_next::FromWire<crate::wire::Bar<'de>> for Bar {
285 #[inline]
286 fn from_wire(wire: crate::wire::Bar<'de>) -> Self {
287 Self {
288 bar_id: ::fidl_next::FromWire::from_wire(wire.bar_id),
289
290 size: ::fidl_next::FromWire::from_wire(wire.size),
291
292 result: ::fidl_next::FromWire::from_wire(wire.result),
293 }
294 }
295 }
296
297 #[derive(Debug, PartialEq)]
298 pub struct DeviceGetBarResponse {
299 pub result: crate::natural::Bar,
300 }
301
302 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>
303 for DeviceGetBarResponse
304 where
305 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
306 ___E: ::fidl_next::Encoder,
307 ___E: ::fidl_next::fuchsia::HandleEncoder,
308 {
309 #[inline]
310 fn encode(
311 self,
312 encoder_: &mut ___E,
313 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBarResponse<'static>>,
314 _: (),
315 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
316 ::fidl_next::munge! {
317 let crate::wire::DeviceGetBarResponse {
318 result,
319
320 } = out_;
321 }
322
323 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
324
325 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(result.as_mut_ptr()) };
326
327 Ok(())
328 }
329 }
330
331 unsafe impl<___E>
332 ::fidl_next::EncodeOption<
333 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBarResponse<'static>>,
334 ___E,
335 > for DeviceGetBarResponse
336 where
337 ___E: ::fidl_next::Encoder + ?Sized,
338 DeviceGetBarResponse: ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>,
339 {
340 #[inline]
341 fn encode_option(
342 this: ::core::option::Option<Self>,
343 encoder: &mut ___E,
344 out: &mut ::core::mem::MaybeUninit<
345 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBarResponse<'static>>,
346 >,
347 _: (),
348 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
349 if let Some(inner) = this {
350 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
351 ::fidl_next::wire::Box::encode_present(out);
352 } else {
353 ::fidl_next::wire::Box::encode_absent(out);
354 }
355
356 Ok(())
357 }
358 }
359
360 impl<'de> ::fidl_next::FromWire<crate::wire::DeviceGetBarResponse<'de>> for DeviceGetBarResponse {
361 #[inline]
362 fn from_wire(wire: crate::wire::DeviceGetBarResponse<'de>) -> Self {
363 Self { result: ::fidl_next::FromWire::from_wire(wire.result) }
364 }
365 }
366
367 #[derive(Debug, PartialEq)]
368 #[repr(C)]
369 pub struct DeviceMapInterruptResponse {
370 pub interrupt: ::fidl_next::fuchsia::zx::Interrupt,
371 }
372
373 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>
374 for DeviceMapInterruptResponse
375 where
376 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
377 ___E: ::fidl_next::fuchsia::HandleEncoder,
378 {
379 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
380 Self,
381 crate::wire::DeviceMapInterruptResponse,
382 > = unsafe {
383 ::fidl_next::CopyOptimization::enable_if(
384 true && <::fidl_next::fuchsia::zx::Interrupt as ::fidl_next::Encode<
385 ::fidl_next::wire::fuchsia::Interrupt,
386 ___E,
387 >>::COPY_OPTIMIZATION
388 .is_enabled(),
389 )
390 };
391
392 #[inline]
393 fn encode(
394 self,
395 encoder_: &mut ___E,
396 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceMapInterruptResponse>,
397 _: (),
398 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
399 ::fidl_next::munge! {
400 let crate::wire::DeviceMapInterruptResponse {
401 interrupt,
402
403 } = out_;
404 }
405
406 ::fidl_next::Encode::encode(self.interrupt, encoder_, interrupt, ())?;
407
408 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(interrupt.as_mut_ptr()) };
409
410 Ok(())
411 }
412 }
413
414 unsafe impl<___E>
415 ::fidl_next::EncodeOption<
416 ::fidl_next::wire::Box<'static, crate::wire::DeviceMapInterruptResponse>,
417 ___E,
418 > for DeviceMapInterruptResponse
419 where
420 ___E: ::fidl_next::Encoder + ?Sized,
421 DeviceMapInterruptResponse:
422 ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>,
423 {
424 #[inline]
425 fn encode_option(
426 this: ::core::option::Option<Self>,
427 encoder: &mut ___E,
428 out: &mut ::core::mem::MaybeUninit<
429 ::fidl_next::wire::Box<'static, crate::wire::DeviceMapInterruptResponse>,
430 >,
431 _: (),
432 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
433 if let Some(inner) = this {
434 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
435 ::fidl_next::wire::Box::encode_present(out);
436 } else {
437 ::fidl_next::wire::Box::encode_absent(out);
438 }
439
440 Ok(())
441 }
442 }
443
444 impl ::fidl_next::FromWire<crate::wire::DeviceMapInterruptResponse> for DeviceMapInterruptResponse {
445 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
446 crate::wire::DeviceMapInterruptResponse,
447 Self,
448 > = unsafe {
449 ::fidl_next::CopyOptimization::enable_if(
450 true && <::fidl_next::fuchsia::zx::Interrupt as ::fidl_next::FromWire<
451 ::fidl_next::wire::fuchsia::Interrupt,
452 >>::COPY_OPTIMIZATION
453 .is_enabled(),
454 )
455 };
456
457 #[inline]
458 fn from_wire(wire: crate::wire::DeviceMapInterruptResponse) -> Self {
459 Self { interrupt: ::fidl_next::FromWire::from_wire(wire.interrupt) }
460 }
461 }
462
463 #[derive(Debug, PartialEq)]
464 #[repr(C)]
465 pub struct DeviceGetBtiResponse {
466 pub bti: ::fidl_next::fuchsia::zx::Bti,
467 }
468
469 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>
470 for DeviceGetBtiResponse
471 where
472 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
473 ___E: ::fidl_next::fuchsia::HandleEncoder,
474 {
475 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
476 Self,
477 crate::wire::DeviceGetBtiResponse,
478 > = unsafe {
479 ::fidl_next::CopyOptimization::enable_if(
480 true && <::fidl_next::fuchsia::zx::Bti as ::fidl_next::Encode<
481 ::fidl_next::wire::fuchsia::Bti,
482 ___E,
483 >>::COPY_OPTIMIZATION
484 .is_enabled(),
485 )
486 };
487
488 #[inline]
489 fn encode(
490 self,
491 encoder_: &mut ___E,
492 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBtiResponse>,
493 _: (),
494 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
495 ::fidl_next::munge! {
496 let crate::wire::DeviceGetBtiResponse {
497 bti,
498
499 } = out_;
500 }
501
502 ::fidl_next::Encode::encode(self.bti, encoder_, bti, ())?;
503
504 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(bti.as_mut_ptr()) };
505
506 Ok(())
507 }
508 }
509
510 unsafe impl<___E>
511 ::fidl_next::EncodeOption<
512 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBtiResponse>,
513 ___E,
514 > for DeviceGetBtiResponse
515 where
516 ___E: ::fidl_next::Encoder + ?Sized,
517 DeviceGetBtiResponse: ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>,
518 {
519 #[inline]
520 fn encode_option(
521 this: ::core::option::Option<Self>,
522 encoder: &mut ___E,
523 out: &mut ::core::mem::MaybeUninit<
524 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBtiResponse>,
525 >,
526 _: (),
527 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
528 if let Some(inner) = this {
529 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
530 ::fidl_next::wire::Box::encode_present(out);
531 } else {
532 ::fidl_next::wire::Box::encode_absent(out);
533 }
534
535 Ok(())
536 }
537 }
538
539 impl ::fidl_next::FromWire<crate::wire::DeviceGetBtiResponse> for DeviceGetBtiResponse {
540 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
541 crate::wire::DeviceGetBtiResponse,
542 Self,
543 > = unsafe {
544 ::fidl_next::CopyOptimization::enable_if(
545 true && <::fidl_next::fuchsia::zx::Bti as ::fidl_next::FromWire<
546 ::fidl_next::wire::fuchsia::Bti,
547 >>::COPY_OPTIMIZATION
548 .is_enabled(),
549 )
550 };
551
552 #[inline]
553 fn from_wire(wire: crate::wire::DeviceGetBtiResponse) -> Self {
554 Self { bti: ::fidl_next::FromWire::from_wire(wire.bti) }
555 }
556 }
557}
558
559pub mod wire {
560
561 pub use fidl_next_common_fuchsia_hardware_pci::wire::*;
562
563 #[derive(Debug)]
565 #[repr(C)]
566 pub struct IoBar {
567 pub address: ::fidl_next::wire::Uint64,
568
569 pub resource: ::fidl_next::wire::fuchsia::Resource,
570 }
571
572 static_assertions::const_assert_eq!(std::mem::size_of::<IoBar>(), 16);
573 static_assertions::const_assert_eq!(std::mem::align_of::<IoBar>(), 8);
574
575 static_assertions::const_assert_eq!(std::mem::offset_of!(IoBar, address), 0);
576
577 static_assertions::const_assert_eq!(std::mem::offset_of!(IoBar, resource), 8);
578
579 impl ::fidl_next::Constrained for IoBar {
580 type Constraint = ();
581
582 fn validate(
583 _: ::fidl_next::Slot<'_, Self>,
584 _: Self::Constraint,
585 ) -> Result<(), ::fidl_next::ValidationError> {
586 Ok(())
587 }
588 }
589
590 unsafe impl ::fidl_next::Wire for IoBar {
591 type Narrowed<'de> = IoBar;
592
593 #[inline]
594 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
595 ::fidl_next::munge! {
596 let Self {
597 address,
598 resource,
599
600 } = &mut *out_;
601 }
602
603 ::fidl_next::Wire::zero_padding(address);
604
605 ::fidl_next::Wire::zero_padding(resource);
606
607 unsafe {
608 out_.as_mut_ptr().cast::<u8>().add(12).write_bytes(0, 4);
609 }
610 }
611 }
612
613 unsafe impl<___D> ::fidl_next::Decode<___D> for IoBar
614 where
615 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
616 ___D: ::fidl_next::fuchsia::HandleDecoder,
617 {
618 fn decode(
619 slot_: ::fidl_next::Slot<'_, Self>,
620 decoder_: &mut ___D,
621 _: (),
622 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
623 if slot_.as_bytes()[12..16] != [0u8; 4] {
624 return Err(::fidl_next::DecodeError::InvalidPadding);
625 }
626
627 ::fidl_next::munge! {
628 let Self {
629 mut address,
630 mut resource,
631
632 } = slot_;
633 }
634
635 let _field = address.as_mut();
636
637 ::fidl_next::Decode::decode(address.as_mut(), decoder_, ())?;
638
639 let _field = resource.as_mut();
640
641 ::fidl_next::Decode::decode(resource.as_mut(), decoder_, ())?;
642
643 Ok(())
644 }
645 }
646
647 impl ::fidl_next::IntoNatural for IoBar {
648 type Natural = crate::natural::IoBar;
649 }
650
651 #[repr(transparent)]
653 pub struct BarResult<'de> {
654 pub(crate) raw: ::fidl_next::wire::Union,
655 pub(crate) _phantom: ::core::marker::PhantomData<&'de mut [::fidl_next::Chunk]>,
656 }
657
658 impl<'de> Drop for BarResult<'de> {
659 fn drop(&mut self) {
660 match self.raw.ordinal() {
661 1 => {
662 let _ = unsafe { self.raw.get().read_unchecked::<crate::wire::IoBar>() };
663 }
664
665 2 => {
666 let _ = unsafe {
667 self.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
668 };
669 }
670
671 _ => (),
672 }
673 }
674 }
675
676 impl ::fidl_next::Constrained for BarResult<'_> {
677 type Constraint = ();
678
679 fn validate(
680 _: ::fidl_next::Slot<'_, Self>,
681 _: Self::Constraint,
682 ) -> Result<(), ::fidl_next::ValidationError> {
683 Ok(())
684 }
685 }
686
687 unsafe impl ::fidl_next::Wire for BarResult<'static> {
688 type Narrowed<'de> = BarResult<'de>;
689
690 #[inline]
691 fn zero_padding(out: &mut ::core::mem::MaybeUninit<Self>) {
692 ::fidl_next::munge!(let Self { raw, _phantom: _ } = out);
693 ::fidl_next::wire::Union::zero_padding(raw);
694 }
695 }
696
697 pub mod bar_result {
698 pub enum Ref<'de> {
699 Io(&'de crate::wire::IoBar),
700
701 Vmo(&'de ::fidl_next::wire::fuchsia::Vmo),
702
703 UnknownOrdinal_(u64),
704 }
705 }
706
707 impl<'de> BarResult<'de> {
708 pub fn as_ref(&self) -> crate::wire::bar_result::Ref<'_> {
709 match self.raw.ordinal() {
710 1 => crate::wire::bar_result::Ref::Io(unsafe {
711 self.raw.get().deref_unchecked::<crate::wire::IoBar>()
712 }),
713
714 2 => crate::wire::bar_result::Ref::Vmo(unsafe {
715 self.raw.get().deref_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
716 }),
717
718 unknown => crate::wire::bar_result::Ref::UnknownOrdinal_(unknown),
719 }
720 }
721 }
722
723 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for BarResult<'de>
724 where
725 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
726 ___D: ::fidl_next::Decoder<'de>,
727 ___D: ::fidl_next::fuchsia::HandleDecoder,
728 {
729 fn decode(
730 mut slot: ::fidl_next::Slot<'_, Self>,
731 decoder: &mut ___D,
732 _: (),
733 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
734 ::fidl_next::munge!(let Self { mut raw, _phantom: _ } = slot.as_mut());
735 match ::fidl_next::wire::Union::encoded_ordinal(raw.as_mut()) {
736 1 => ::fidl_next::wire::Union::decode_as::<___D, crate::wire::IoBar>(
737 raw,
738 decoder,
739 (),
740 )?,
741
742 2 => ::fidl_next::wire::Union::decode_as::<___D, ::fidl_next::wire::fuchsia::Vmo>(
743 raw,
744 decoder,
745 (),
746 )?,
747
748 _ => ::fidl_next::wire::Union::decode_unknown(raw, decoder)?,
749 }
750
751 Ok(())
752 }
753 }
754
755 impl<'de> ::core::fmt::Debug for BarResult<'de> {
756 fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
757 match self.raw.ordinal() {
758 1 => unsafe { self.raw.get().deref_unchecked::<crate::wire::IoBar>().fmt(f) },
759 2 => unsafe {
760 self.raw.get().deref_unchecked::<::fidl_next::wire::fuchsia::Vmo>().fmt(f)
761 },
762 _ => unsafe { ::core::hint::unreachable_unchecked() },
763 }
764 }
765 }
766
767 impl<'de> ::fidl_next::IntoNatural for BarResult<'de> {
768 type Natural = crate::natural::BarResult;
769 }
770
771 #[derive(Debug)]
773 #[repr(C)]
774 pub struct Bar<'de> {
775 pub bar_id: ::fidl_next::wire::Uint32,
776
777 pub size: ::fidl_next::wire::Uint64,
778
779 pub result: crate::wire::BarResult<'de>,
780 }
781
782 static_assertions::const_assert_eq!(std::mem::size_of::<Bar<'_>>(), 32);
783 static_assertions::const_assert_eq!(std::mem::align_of::<Bar<'_>>(), 8);
784
785 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, bar_id), 0);
786
787 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, size), 8);
788
789 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, result), 16);
790
791 impl ::fidl_next::Constrained for Bar<'_> {
792 type Constraint = ();
793
794 fn validate(
795 _: ::fidl_next::Slot<'_, Self>,
796 _: Self::Constraint,
797 ) -> Result<(), ::fidl_next::ValidationError> {
798 Ok(())
799 }
800 }
801
802 unsafe impl ::fidl_next::Wire for Bar<'static> {
803 type Narrowed<'de> = Bar<'de>;
804
805 #[inline]
806 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
807 ::fidl_next::munge! {
808 let Self {
809 bar_id,
810 size,
811 result,
812
813 } = &mut *out_;
814 }
815
816 ::fidl_next::Wire::zero_padding(bar_id);
817
818 ::fidl_next::Wire::zero_padding(size);
819
820 ::fidl_next::Wire::zero_padding(result);
821
822 unsafe {
823 out_.as_mut_ptr().cast::<u8>().add(4).write_bytes(0, 4);
824 }
825 }
826 }
827
828 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for Bar<'de>
829 where
830 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
831 ___D: ::fidl_next::Decoder<'de>,
832 ___D: ::fidl_next::fuchsia::HandleDecoder,
833 {
834 fn decode(
835 slot_: ::fidl_next::Slot<'_, Self>,
836 decoder_: &mut ___D,
837 _: (),
838 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
839 if slot_.as_bytes()[4..8] != [0u8; 4] {
840 return Err(::fidl_next::DecodeError::InvalidPadding);
841 }
842
843 ::fidl_next::munge! {
844 let Self {
845 mut bar_id,
846 mut size,
847 mut result,
848
849 } = slot_;
850 }
851
852 let _field = bar_id.as_mut();
853
854 ::fidl_next::Decode::decode(bar_id.as_mut(), decoder_, ())?;
855
856 let _field = size.as_mut();
857
858 ::fidl_next::Decode::decode(size.as_mut(), decoder_, ())?;
859
860 let _field = result.as_mut();
861
862 ::fidl_next::Decode::decode(result.as_mut(), decoder_, ())?;
863
864 Ok(())
865 }
866 }
867
868 impl<'de> ::fidl_next::IntoNatural for Bar<'de> {
869 type Natural = crate::natural::Bar;
870 }
871
872 #[derive(Debug)]
874 #[repr(C)]
875 pub struct DeviceGetBarResponse<'de> {
876 pub result: crate::wire::Bar<'de>,
877 }
878
879 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceGetBarResponse<'_>>(), 32);
880 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceGetBarResponse<'_>>(), 8);
881
882 static_assertions::const_assert_eq!(std::mem::offset_of!(DeviceGetBarResponse<'_>, result), 0);
883
884 impl ::fidl_next::Constrained for DeviceGetBarResponse<'_> {
885 type Constraint = ();
886
887 fn validate(
888 _: ::fidl_next::Slot<'_, Self>,
889 _: Self::Constraint,
890 ) -> Result<(), ::fidl_next::ValidationError> {
891 Ok(())
892 }
893 }
894
895 unsafe impl ::fidl_next::Wire for DeviceGetBarResponse<'static> {
896 type Narrowed<'de> = DeviceGetBarResponse<'de>;
897
898 #[inline]
899 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
900 ::fidl_next::munge! {
901 let Self {
902 result,
903
904 } = &mut *out_;
905 }
906
907 ::fidl_next::Wire::zero_padding(result);
908 }
909 }
910
911 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for DeviceGetBarResponse<'de>
912 where
913 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
914 ___D: ::fidl_next::Decoder<'de>,
915 ___D: ::fidl_next::fuchsia::HandleDecoder,
916 {
917 fn decode(
918 slot_: ::fidl_next::Slot<'_, Self>,
919 decoder_: &mut ___D,
920 _: (),
921 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
922 ::fidl_next::munge! {
923 let Self {
924 mut result,
925
926 } = slot_;
927 }
928
929 let _field = result.as_mut();
930
931 ::fidl_next::Decode::decode(result.as_mut(), decoder_, ())?;
932
933 Ok(())
934 }
935 }
936
937 impl<'de> ::fidl_next::IntoNatural for DeviceGetBarResponse<'de> {
938 type Natural = crate::natural::DeviceGetBarResponse;
939 }
940
941 #[derive(Debug)]
943 #[repr(C)]
944 pub struct DeviceMapInterruptResponse {
945 pub interrupt: ::fidl_next::wire::fuchsia::Interrupt,
946 }
947
948 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceMapInterruptResponse>(), 4);
949 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceMapInterruptResponse>(), 4);
950
951 static_assertions::const_assert_eq!(
952 std::mem::offset_of!(DeviceMapInterruptResponse, interrupt),
953 0
954 );
955
956 impl ::fidl_next::Constrained for DeviceMapInterruptResponse {
957 type Constraint = ();
958
959 fn validate(
960 _: ::fidl_next::Slot<'_, Self>,
961 _: Self::Constraint,
962 ) -> Result<(), ::fidl_next::ValidationError> {
963 Ok(())
964 }
965 }
966
967 unsafe impl ::fidl_next::Wire for DeviceMapInterruptResponse {
968 type Narrowed<'de> = DeviceMapInterruptResponse;
969
970 #[inline]
971 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
972 ::fidl_next::munge! {
973 let Self {
974 interrupt,
975
976 } = &mut *out_;
977 }
978
979 ::fidl_next::Wire::zero_padding(interrupt);
980 }
981 }
982
983 unsafe impl<___D> ::fidl_next::Decode<___D> for DeviceMapInterruptResponse
984 where
985 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
986 ___D: ::fidl_next::fuchsia::HandleDecoder,
987 {
988 fn decode(
989 slot_: ::fidl_next::Slot<'_, Self>,
990 decoder_: &mut ___D,
991 _: (),
992 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
993 ::fidl_next::munge! {
994 let Self {
995 mut interrupt,
996
997 } = slot_;
998 }
999
1000 let _field = interrupt.as_mut();
1001
1002 ::fidl_next::Decode::decode(interrupt.as_mut(), decoder_, ())?;
1003
1004 Ok(())
1005 }
1006 }
1007
1008 impl ::fidl_next::IntoNatural for DeviceMapInterruptResponse {
1009 type Natural = crate::natural::DeviceMapInterruptResponse;
1010 }
1011
1012 #[derive(Debug)]
1014 #[repr(C)]
1015 pub struct DeviceGetBtiResponse {
1016 pub bti: ::fidl_next::wire::fuchsia::Bti,
1017 }
1018
1019 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceGetBtiResponse>(), 4);
1020 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceGetBtiResponse>(), 4);
1021
1022 static_assertions::const_assert_eq!(std::mem::offset_of!(DeviceGetBtiResponse, bti), 0);
1023
1024 impl ::fidl_next::Constrained for DeviceGetBtiResponse {
1025 type Constraint = ();
1026
1027 fn validate(
1028 _: ::fidl_next::Slot<'_, Self>,
1029 _: Self::Constraint,
1030 ) -> Result<(), ::fidl_next::ValidationError> {
1031 Ok(())
1032 }
1033 }
1034
1035 unsafe impl ::fidl_next::Wire for DeviceGetBtiResponse {
1036 type Narrowed<'de> = DeviceGetBtiResponse;
1037
1038 #[inline]
1039 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
1040 ::fidl_next::munge! {
1041 let Self {
1042 bti,
1043
1044 } = &mut *out_;
1045 }
1046
1047 ::fidl_next::Wire::zero_padding(bti);
1048 }
1049 }
1050
1051 unsafe impl<___D> ::fidl_next::Decode<___D> for DeviceGetBtiResponse
1052 where
1053 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1054 ___D: ::fidl_next::fuchsia::HandleDecoder,
1055 {
1056 fn decode(
1057 slot_: ::fidl_next::Slot<'_, Self>,
1058 decoder_: &mut ___D,
1059 _: (),
1060 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1061 ::fidl_next::munge! {
1062 let Self {
1063 mut bti,
1064
1065 } = slot_;
1066 }
1067
1068 let _field = bti.as_mut();
1069
1070 ::fidl_next::Decode::decode(bti.as_mut(), decoder_, ())?;
1071
1072 Ok(())
1073 }
1074 }
1075
1076 impl ::fidl_next::IntoNatural for DeviceGetBtiResponse {
1077 type Natural = crate::natural::DeviceGetBtiResponse;
1078 }
1079}
1080
1081pub mod wire_optional {
1082
1083 pub use fidl_next_common_fuchsia_hardware_pci::wire_optional::*;
1084
1085 #[repr(transparent)]
1086 pub struct BarResult<'de> {
1087 pub(crate) raw: ::fidl_next::wire::Union,
1088 pub(crate) _phantom: ::core::marker::PhantomData<&'de mut [::fidl_next::Chunk]>,
1089 }
1090
1091 impl ::fidl_next::Constrained for BarResult<'_> {
1092 type Constraint = ();
1093
1094 fn validate(
1095 _: ::fidl_next::Slot<'_, Self>,
1096 _: Self::Constraint,
1097 ) -> Result<(), ::fidl_next::ValidationError> {
1098 Ok(())
1099 }
1100 }
1101
1102 unsafe impl ::fidl_next::Wire for BarResult<'static> {
1103 type Narrowed<'de> = BarResult<'de>;
1104
1105 #[inline]
1106 fn zero_padding(out: &mut ::core::mem::MaybeUninit<Self>) {
1107 ::fidl_next::munge!(let Self { raw, _phantom: _ } = out);
1108 ::fidl_next::wire::Union::zero_padding(raw);
1109 }
1110 }
1111
1112 impl<'de> BarResult<'de> {
1113 pub fn is_some(&self) -> bool {
1114 self.raw.is_some()
1115 }
1116
1117 pub fn is_none(&self) -> bool {
1118 self.raw.is_none()
1119 }
1120
1121 pub fn as_ref(&self) -> ::core::option::Option<&crate::wire::BarResult<'de>> {
1122 if self.is_some() { Some(unsafe { &*(self as *const Self).cast() }) } else { None }
1123 }
1124
1125 pub fn into_option(self) -> ::core::option::Option<crate::wire::BarResult<'de>> {
1126 if self.is_some() {
1127 Some(crate::wire::BarResult {
1128 raw: self.raw,
1129 _phantom: ::core::marker::PhantomData,
1130 })
1131 } else {
1132 None
1133 }
1134 }
1135 }
1136
1137 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for BarResult<'de>
1138 where
1139 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1140 ___D: ::fidl_next::Decoder<'de>,
1141 ___D: ::fidl_next::fuchsia::HandleDecoder,
1142 {
1143 fn decode(
1144 mut slot: ::fidl_next::Slot<'_, Self>,
1145 decoder: &mut ___D,
1146 _: (),
1147 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1148 ::fidl_next::munge!(let Self { mut raw, _phantom: _ } = slot.as_mut());
1149 match ::fidl_next::wire::Union::encoded_ordinal(raw.as_mut()) {
1150 1 => ::fidl_next::wire::Union::decode_as::<___D, crate::wire::IoBar>(
1151 raw,
1152 decoder,
1153 (),
1154 )?,
1155
1156 2 => ::fidl_next::wire::Union::decode_as::<___D, ::fidl_next::wire::fuchsia::Vmo>(
1157 raw,
1158 decoder,
1159 (),
1160 )?,
1161
1162 0 => ::fidl_next::wire::Union::decode_absent(raw)?,
1163 _ => ::fidl_next::wire::Union::decode_unknown(raw, decoder)?,
1164 }
1165
1166 Ok(())
1167 }
1168 }
1169
1170 impl<'de> ::core::fmt::Debug for BarResult<'de> {
1171 fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
1172 self.as_ref().fmt(f)
1173 }
1174 }
1175
1176 impl<'de> ::fidl_next::IntoNatural for BarResult<'de> {
1177 type Natural = ::core::option::Option<crate::natural::BarResult>;
1178 }
1179}
1180
1181pub mod generic {
1182
1183 pub use fidl_next_common_fuchsia_hardware_pci::generic::*;
1184
1185 pub struct IoBar<T0, T1> {
1187 pub address: T0,
1188
1189 pub resource: T1,
1190 }
1191
1192 unsafe impl<___E, T0, T1> ::fidl_next::Encode<crate::wire::IoBar, ___E> for IoBar<T0, T1>
1193 where
1194 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1195 ___E: ::fidl_next::fuchsia::HandleEncoder,
1196 T0: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1197 T1: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Resource, ___E>,
1198 {
1199 #[inline]
1200 fn encode(
1201 self,
1202 encoder_: &mut ___E,
1203 out_: &mut ::core::mem::MaybeUninit<crate::wire::IoBar>,
1204 _: (),
1205 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1206 ::fidl_next::munge! {
1207 let crate::wire::IoBar {
1208 address,
1209 resource,
1210
1211 } = out_;
1212 }
1213
1214 ::fidl_next::Encode::encode(self.address, encoder_, address, ())?;
1215
1216 ::fidl_next::Encode::encode(self.resource, encoder_, resource, ())?;
1217
1218 Ok(())
1219 }
1220 }
1221
1222 pub struct Bar<T0, T1, T2> {
1224 pub bar_id: T0,
1225
1226 pub size: T1,
1227
1228 pub result: T2,
1229 }
1230
1231 unsafe impl<___E, T0, T1, T2> ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>
1232 for Bar<T0, T1, T2>
1233 where
1234 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1235 ___E: ::fidl_next::Encoder,
1236 ___E: ::fidl_next::fuchsia::HandleEncoder,
1237 T0: ::fidl_next::Encode<::fidl_next::wire::Uint32, ___E>,
1238 T1: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1239 T2: ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E>,
1240 {
1241 #[inline]
1242 fn encode(
1243 self,
1244 encoder_: &mut ___E,
1245 out_: &mut ::core::mem::MaybeUninit<crate::wire::Bar<'static>>,
1246 _: (),
1247 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1248 ::fidl_next::munge! {
1249 let crate::wire::Bar {
1250 bar_id,
1251 size,
1252 result,
1253
1254 } = out_;
1255 }
1256
1257 ::fidl_next::Encode::encode(self.bar_id, encoder_, bar_id, ())?;
1258
1259 ::fidl_next::Encode::encode(self.size, encoder_, size, ())?;
1260
1261 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
1262
1263 Ok(())
1264 }
1265 }
1266
1267 pub struct DeviceGetBarResponse<T0> {
1269 pub result: T0,
1270 }
1271
1272 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>
1273 for DeviceGetBarResponse<T0>
1274 where
1275 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1276 ___E: ::fidl_next::Encoder,
1277 ___E: ::fidl_next::fuchsia::HandleEncoder,
1278 T0: ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>,
1279 {
1280 #[inline]
1281 fn encode(
1282 self,
1283 encoder_: &mut ___E,
1284 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBarResponse<'static>>,
1285 _: (),
1286 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1287 ::fidl_next::munge! {
1288 let crate::wire::DeviceGetBarResponse {
1289 result,
1290
1291 } = out_;
1292 }
1293
1294 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
1295
1296 Ok(())
1297 }
1298 }
1299
1300 pub struct DeviceMapInterruptResponse<T0> {
1302 pub interrupt: T0,
1303 }
1304
1305 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>
1306 for DeviceMapInterruptResponse<T0>
1307 where
1308 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1309 ___E: ::fidl_next::fuchsia::HandleEncoder,
1310 T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Interrupt, ___E>,
1311 {
1312 #[inline]
1313 fn encode(
1314 self,
1315 encoder_: &mut ___E,
1316 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceMapInterruptResponse>,
1317 _: (),
1318 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1319 ::fidl_next::munge! {
1320 let crate::wire::DeviceMapInterruptResponse {
1321 interrupt,
1322
1323 } = out_;
1324 }
1325
1326 ::fidl_next::Encode::encode(self.interrupt, encoder_, interrupt, ())?;
1327
1328 Ok(())
1329 }
1330 }
1331
1332 pub struct DeviceGetBtiResponse<T0> {
1334 pub bti: T0,
1335 }
1336
1337 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>
1338 for DeviceGetBtiResponse<T0>
1339 where
1340 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1341 ___E: ::fidl_next::fuchsia::HandleEncoder,
1342 T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Bti, ___E>,
1343 {
1344 #[inline]
1345 fn encode(
1346 self,
1347 encoder_: &mut ___E,
1348 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBtiResponse>,
1349 _: (),
1350 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1351 ::fidl_next::munge! {
1352 let crate::wire::DeviceGetBtiResponse {
1353 bti,
1354
1355 } = out_;
1356 }
1357
1358 ::fidl_next::Encode::encode(self.bti, encoder_, bti, ())?;
1359
1360 Ok(())
1361 }
1362 }
1363}
1364
1365pub use self::natural::*;
1366
1367#[derive(PartialEq, Debug)]
1369pub struct Device;
1370
1371impl ::fidl_next::Discoverable for Device {
1372 const PROTOCOL_NAME: &'static str = "fuchsia.hardware.pci.Device";
1373}
1374
1375#[cfg(target_os = "fuchsia")]
1376impl ::fidl_next::HasTransport for Device {
1377 type Transport = ::fidl_next::fuchsia::zx::Channel;
1378}
1379
1380pub mod device {
1381 pub mod prelude {
1382 pub use crate::{
1383 Device, DeviceClientHandler, DeviceLocalClientHandler, DeviceLocalServerHandler,
1384 DeviceServerHandler, device,
1385 };
1386
1387 pub use crate::natural::DeviceGetBarRequest;
1388
1389 pub use crate::natural::DeviceGetBtiRequest;
1390
1391 pub use crate::natural::DeviceGetCapabilitiesRequest;
1392
1393 pub use crate::natural::DeviceGetCapabilitiesResponse;
1394
1395 pub use crate::natural::DeviceGetDeviceInfoResponse;
1396
1397 pub use crate::natural::DeviceGetExtendedCapabilitiesRequest;
1398
1399 pub use crate::natural::DeviceGetExtendedCapabilitiesResponse;
1400
1401 pub use crate::natural::DeviceGetInterruptModesResponse;
1402
1403 pub use crate::natural::DeviceMapInterruptRequest;
1404
1405 pub use crate::natural::DeviceReadConfig16Request;
1406
1407 pub use crate::natural::DeviceReadConfig32Request;
1408
1409 pub use crate::natural::DeviceReadConfig8Request;
1410
1411 pub use crate::natural::DeviceSetBusMasteringRequest;
1412
1413 pub use crate::natural::DeviceSetInterruptModeRequest;
1414
1415 pub use crate::natural::DeviceWriteConfig16Request;
1416
1417 pub use crate::natural::DeviceWriteConfig32Request;
1418
1419 pub use crate::natural::DeviceWriteConfig8Request;
1420
1421 pub use crate::natural::DeviceAckInterruptResponse;
1422
1423 pub use crate::natural::DeviceGetBarResponse;
1424
1425 pub use crate::natural::DeviceGetBtiResponse;
1426
1427 pub use crate::natural::DeviceMapInterruptResponse;
1428
1429 pub use crate::natural::DeviceReadConfig16Response;
1430
1431 pub use crate::natural::DeviceReadConfig32Response;
1432
1433 pub use crate::natural::DeviceReadConfig8Response;
1434
1435 pub use crate::natural::DeviceResetDeviceResponse;
1436
1437 pub use crate::natural::DeviceSetBusMasteringResponse;
1438
1439 pub use crate::natural::DeviceSetInterruptModeResponse;
1440
1441 pub use crate::natural::DeviceWriteConfig16Response;
1442
1443 pub use crate::natural::DeviceWriteConfig32Response;
1444
1445 pub use crate::natural::DeviceWriteConfig8Response;
1446 }
1447
1448 pub struct GetDeviceInfo;
1449
1450 impl ::fidl_next::Method for GetDeviceInfo {
1451 const ORDINAL: u64 = 6168191258208672022;
1452 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1453 ::fidl_next::protocol::Flexibility::Strict;
1454
1455 type Protocol = crate::Device;
1456
1457 type Request = ::fidl_next::wire::EmptyMessageBody;
1458 }
1459
1460 impl ::fidl_next::TwoWayMethod for GetDeviceInfo {
1461 type Response = crate::wire::DeviceGetDeviceInfoResponse;
1462 }
1463
1464 impl<___R> ::fidl_next::Respond<___R> for GetDeviceInfo {
1465 type Output = crate::generic::DeviceGetDeviceInfoResponse<___R>;
1466
1467 fn respond(response: ___R) -> Self::Output {
1468 crate::generic::DeviceGetDeviceInfoResponse { info: response }
1469 }
1470 }
1471
1472 pub struct GetBar;
1473
1474 impl ::fidl_next::Method for GetBar {
1475 const ORDINAL: u64 = 7721003707982149241;
1476 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1477 ::fidl_next::protocol::Flexibility::Strict;
1478
1479 type Protocol = crate::Device;
1480
1481 type Request = crate::wire::DeviceGetBarRequest;
1482 }
1483
1484 impl ::fidl_next::TwoWayMethod for GetBar {
1485 type Response = ::fidl_next::wire::Result<
1486 'static,
1487 crate::wire::DeviceGetBarResponse<'static>,
1488 ::fidl_next::wire::Int32,
1489 >;
1490 }
1491
1492 impl<___R> ::fidl_next::Respond<___R> for GetBar {
1493 type Output = ::core::result::Result<
1494 crate::generic::DeviceGetBarResponse<___R>,
1495 ::fidl_next::util::Never,
1496 >;
1497
1498 fn respond(response: ___R) -> Self::Output {
1499 ::core::result::Result::Ok(crate::generic::DeviceGetBarResponse { result: response })
1500 }
1501 }
1502
1503 impl<___R> ::fidl_next::RespondErr<___R> for GetBar {
1504 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1505
1506 fn respond_err(response: ___R) -> Self::Output {
1507 ::core::result::Result::Err(response)
1508 }
1509 }
1510
1511 pub struct SetBusMastering;
1512
1513 impl ::fidl_next::Method for SetBusMastering {
1514 const ORDINAL: u64 = 3756540713293123587;
1515 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1516 ::fidl_next::protocol::Flexibility::Strict;
1517
1518 type Protocol = crate::Device;
1519
1520 type Request = crate::wire::DeviceSetBusMasteringRequest;
1521 }
1522
1523 impl ::fidl_next::TwoWayMethod for SetBusMastering {
1524 type Response = ::fidl_next::wire::Result<
1525 'static,
1526 crate::wire::DeviceSetBusMasteringResponse,
1527 ::fidl_next::wire::Int32,
1528 >;
1529 }
1530
1531 impl<___R> ::fidl_next::Respond<___R> for SetBusMastering {
1532 type Output = ::core::result::Result<___R, ::fidl_next::util::Never>;
1533
1534 fn respond(response: ___R) -> Self::Output {
1535 ::core::result::Result::Ok(response)
1536 }
1537 }
1538
1539 impl<___R> ::fidl_next::RespondErr<___R> for SetBusMastering {
1540 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1541
1542 fn respond_err(response: ___R) -> Self::Output {
1543 ::core::result::Result::Err(response)
1544 }
1545 }
1546
1547 pub struct ResetDevice;
1548
1549 impl ::fidl_next::Method for ResetDevice {
1550 const ORDINAL: u64 = 4349199030852488095;
1551 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1552 ::fidl_next::protocol::Flexibility::Strict;
1553
1554 type Protocol = crate::Device;
1555
1556 type Request = ::fidl_next::wire::EmptyMessageBody;
1557 }
1558
1559 impl ::fidl_next::TwoWayMethod for ResetDevice {
1560 type Response = ::fidl_next::wire::Result<
1561 'static,
1562 crate::wire::DeviceResetDeviceResponse,
1563 ::fidl_next::wire::Int32,
1564 >;
1565 }
1566
1567 impl<___R> ::fidl_next::Respond<___R> for ResetDevice {
1568 type Output = ::core::result::Result<___R, ::fidl_next::util::Never>;
1569
1570 fn respond(response: ___R) -> Self::Output {
1571 ::core::result::Result::Ok(response)
1572 }
1573 }
1574
1575 impl<___R> ::fidl_next::RespondErr<___R> for ResetDevice {
1576 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1577
1578 fn respond_err(response: ___R) -> Self::Output {
1579 ::core::result::Result::Err(response)
1580 }
1581 }
1582
1583 pub struct AckInterrupt;
1584
1585 impl ::fidl_next::Method for AckInterrupt {
1586 const ORDINAL: u64 = 8103153737854179947;
1587 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1588 ::fidl_next::protocol::Flexibility::Strict;
1589
1590 type Protocol = crate::Device;
1591
1592 type Request = ::fidl_next::wire::EmptyMessageBody;
1593 }
1594
1595 impl ::fidl_next::TwoWayMethod for AckInterrupt {
1596 type Response = ::fidl_next::wire::Result<
1597 'static,
1598 crate::wire::DeviceAckInterruptResponse,
1599 ::fidl_next::wire::Int32,
1600 >;
1601 }
1602
1603 impl<___R> ::fidl_next::Respond<___R> for AckInterrupt {
1604 type Output = ::core::result::Result<___R, ::fidl_next::util::Never>;
1605
1606 fn respond(response: ___R) -> Self::Output {
1607 ::core::result::Result::Ok(response)
1608 }
1609 }
1610
1611 impl<___R> ::fidl_next::RespondErr<___R> for AckInterrupt {
1612 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1613
1614 fn respond_err(response: ___R) -> Self::Output {
1615 ::core::result::Result::Err(response)
1616 }
1617 }
1618
1619 pub struct MapInterrupt;
1620
1621 impl ::fidl_next::Method for MapInterrupt {
1622 const ORDINAL: u64 = 2733403074518448659;
1623 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1624 ::fidl_next::protocol::Flexibility::Strict;
1625
1626 type Protocol = crate::Device;
1627
1628 type Request = crate::wire::DeviceMapInterruptRequest;
1629 }
1630
1631 impl ::fidl_next::TwoWayMethod for MapInterrupt {
1632 type Response = ::fidl_next::wire::Result<
1633 'static,
1634 crate::wire::DeviceMapInterruptResponse,
1635 ::fidl_next::wire::Int32,
1636 >;
1637 }
1638
1639 impl<___R> ::fidl_next::Respond<___R> for MapInterrupt {
1640 type Output = ::core::result::Result<
1641 crate::generic::DeviceMapInterruptResponse<___R>,
1642 ::fidl_next::util::Never,
1643 >;
1644
1645 fn respond(response: ___R) -> Self::Output {
1646 ::core::result::Result::Ok(crate::generic::DeviceMapInterruptResponse {
1647 interrupt: response,
1648 })
1649 }
1650 }
1651
1652 impl<___R> ::fidl_next::RespondErr<___R> for MapInterrupt {
1653 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1654
1655 fn respond_err(response: ___R) -> Self::Output {
1656 ::core::result::Result::Err(response)
1657 }
1658 }
1659
1660 pub struct GetInterruptModes;
1661
1662 impl ::fidl_next::Method for GetInterruptModes {
1663 const ORDINAL: u64 = 666335764625137482;
1664 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1665 ::fidl_next::protocol::Flexibility::Strict;
1666
1667 type Protocol = crate::Device;
1668
1669 type Request = ::fidl_next::wire::EmptyMessageBody;
1670 }
1671
1672 impl ::fidl_next::TwoWayMethod for GetInterruptModes {
1673 type Response = crate::wire::DeviceGetInterruptModesResponse;
1674 }
1675
1676 impl<___R> ::fidl_next::Respond<___R> for GetInterruptModes {
1677 type Output = crate::generic::DeviceGetInterruptModesResponse<___R>;
1678
1679 fn respond(response: ___R) -> Self::Output {
1680 crate::generic::DeviceGetInterruptModesResponse { modes: response }
1681 }
1682 }
1683
1684 pub struct SetInterruptMode;
1685
1686 impl ::fidl_next::Method for SetInterruptMode {
1687 const ORDINAL: u64 = 602334104497834086;
1688 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1689 ::fidl_next::protocol::Flexibility::Strict;
1690
1691 type Protocol = crate::Device;
1692
1693 type Request = crate::wire::DeviceSetInterruptModeRequest;
1694 }
1695
1696 impl ::fidl_next::TwoWayMethod for SetInterruptMode {
1697 type Response = ::fidl_next::wire::Result<
1698 'static,
1699 crate::wire::DeviceSetInterruptModeResponse,
1700 ::fidl_next::wire::Int32,
1701 >;
1702 }
1703
1704 impl<___R> ::fidl_next::Respond<___R> for SetInterruptMode {
1705 type Output = ::core::result::Result<___R, ::fidl_next::util::Never>;
1706
1707 fn respond(response: ___R) -> Self::Output {
1708 ::core::result::Result::Ok(response)
1709 }
1710 }
1711
1712 impl<___R> ::fidl_next::RespondErr<___R> for SetInterruptMode {
1713 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1714
1715 fn respond_err(response: ___R) -> Self::Output {
1716 ::core::result::Result::Err(response)
1717 }
1718 }
1719
1720 pub struct ReadConfig8;
1721
1722 impl ::fidl_next::Method for ReadConfig8 {
1723 const ORDINAL: u64 = 2952650096395541020;
1724 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1725 ::fidl_next::protocol::Flexibility::Strict;
1726
1727 type Protocol = crate::Device;
1728
1729 type Request = crate::wire::DeviceReadConfig8Request;
1730 }
1731
1732 impl ::fidl_next::TwoWayMethod for ReadConfig8 {
1733 type Response = ::fidl_next::wire::Result<
1734 'static,
1735 crate::wire::DeviceReadConfig8Response,
1736 ::fidl_next::wire::Int32,
1737 >;
1738 }
1739
1740 impl<___R> ::fidl_next::Respond<___R> for ReadConfig8 {
1741 type Output = ::core::result::Result<
1742 crate::generic::DeviceReadConfig8Response<___R>,
1743 ::fidl_next::util::Never,
1744 >;
1745
1746 fn respond(response: ___R) -> Self::Output {
1747 ::core::result::Result::Ok(crate::generic::DeviceReadConfig8Response {
1748 value: response,
1749 })
1750 }
1751 }
1752
1753 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig8 {
1754 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1755
1756 fn respond_err(response: ___R) -> Self::Output {
1757 ::core::result::Result::Err(response)
1758 }
1759 }
1760
1761 pub struct ReadConfig16;
1762
1763 impl ::fidl_next::Method for ReadConfig16 {
1764 const ORDINAL: u64 = 4309283036617404603;
1765 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1766 ::fidl_next::protocol::Flexibility::Strict;
1767
1768 type Protocol = crate::Device;
1769
1770 type Request = crate::wire::DeviceReadConfig16Request;
1771 }
1772
1773 impl ::fidl_next::TwoWayMethod for ReadConfig16 {
1774 type Response = ::fidl_next::wire::Result<
1775 'static,
1776 crate::wire::DeviceReadConfig16Response,
1777 ::fidl_next::wire::Int32,
1778 >;
1779 }
1780
1781 impl<___R> ::fidl_next::Respond<___R> for ReadConfig16 {
1782 type Output = ::core::result::Result<
1783 crate::generic::DeviceReadConfig16Response<___R>,
1784 ::fidl_next::util::Never,
1785 >;
1786
1787 fn respond(response: ___R) -> Self::Output {
1788 ::core::result::Result::Ok(crate::generic::DeviceReadConfig16Response {
1789 value: response,
1790 })
1791 }
1792 }
1793
1794 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig16 {
1795 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1796
1797 fn respond_err(response: ___R) -> Self::Output {
1798 ::core::result::Result::Err(response)
1799 }
1800 }
1801
1802 pub struct ReadConfig32;
1803
1804 impl ::fidl_next::Method for ReadConfig32 {
1805 const ORDINAL: u64 = 6139942538560107783;
1806 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1807 ::fidl_next::protocol::Flexibility::Strict;
1808
1809 type Protocol = crate::Device;
1810
1811 type Request = crate::wire::DeviceReadConfig32Request;
1812 }
1813
1814 impl ::fidl_next::TwoWayMethod for ReadConfig32 {
1815 type Response = ::fidl_next::wire::Result<
1816 'static,
1817 crate::wire::DeviceReadConfig32Response,
1818 ::fidl_next::wire::Int32,
1819 >;
1820 }
1821
1822 impl<___R> ::fidl_next::Respond<___R> for ReadConfig32 {
1823 type Output = ::core::result::Result<
1824 crate::generic::DeviceReadConfig32Response<___R>,
1825 ::fidl_next::util::Never,
1826 >;
1827
1828 fn respond(response: ___R) -> Self::Output {
1829 ::core::result::Result::Ok(crate::generic::DeviceReadConfig32Response {
1830 value: response,
1831 })
1832 }
1833 }
1834
1835 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig32 {
1836 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1837
1838 fn respond_err(response: ___R) -> Self::Output {
1839 ::core::result::Result::Err(response)
1840 }
1841 }
1842
1843 pub struct WriteConfig8;
1844
1845 impl ::fidl_next::Method for WriteConfig8 {
1846 const ORDINAL: u64 = 331585330300009727;
1847 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1848 ::fidl_next::protocol::Flexibility::Strict;
1849
1850 type Protocol = crate::Device;
1851
1852 type Request = crate::wire::DeviceWriteConfig8Request;
1853 }
1854
1855 impl ::fidl_next::TwoWayMethod for WriteConfig8 {
1856 type Response = ::fidl_next::wire::Result<
1857 'static,
1858 crate::wire::DeviceWriteConfig8Response,
1859 ::fidl_next::wire::Int32,
1860 >;
1861 }
1862
1863 impl<___R> ::fidl_next::Respond<___R> for WriteConfig8 {
1864 type Output = ::core::result::Result<___R, ::fidl_next::util::Never>;
1865
1866 fn respond(response: ___R) -> Self::Output {
1867 ::core::result::Result::Ok(response)
1868 }
1869 }
1870
1871 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig8 {
1872 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1873
1874 fn respond_err(response: ___R) -> Self::Output {
1875 ::core::result::Result::Err(response)
1876 }
1877 }
1878
1879 pub struct WriteConfig16;
1880
1881 impl ::fidl_next::Method for WriteConfig16 {
1882 const ORDINAL: u64 = 4481291721614851839;
1883 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1884 ::fidl_next::protocol::Flexibility::Strict;
1885
1886 type Protocol = crate::Device;
1887
1888 type Request = crate::wire::DeviceWriteConfig16Request;
1889 }
1890
1891 impl ::fidl_next::TwoWayMethod for WriteConfig16 {
1892 type Response = ::fidl_next::wire::Result<
1893 'static,
1894 crate::wire::DeviceWriteConfig16Response,
1895 ::fidl_next::wire::Int32,
1896 >;
1897 }
1898
1899 impl<___R> ::fidl_next::Respond<___R> for WriteConfig16 {
1900 type Output = ::core::result::Result<___R, ::fidl_next::util::Never>;
1901
1902 fn respond(response: ___R) -> Self::Output {
1903 ::core::result::Result::Ok(response)
1904 }
1905 }
1906
1907 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig16 {
1908 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1909
1910 fn respond_err(response: ___R) -> Self::Output {
1911 ::core::result::Result::Err(response)
1912 }
1913 }
1914
1915 pub struct WriteConfig32;
1916
1917 impl ::fidl_next::Method for WriteConfig32 {
1918 const ORDINAL: u64 = 99457760178582408;
1919 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1920 ::fidl_next::protocol::Flexibility::Strict;
1921
1922 type Protocol = crate::Device;
1923
1924 type Request = crate::wire::DeviceWriteConfig32Request;
1925 }
1926
1927 impl ::fidl_next::TwoWayMethod for WriteConfig32 {
1928 type Response = ::fidl_next::wire::Result<
1929 'static,
1930 crate::wire::DeviceWriteConfig32Response,
1931 ::fidl_next::wire::Int32,
1932 >;
1933 }
1934
1935 impl<___R> ::fidl_next::Respond<___R> for WriteConfig32 {
1936 type Output = ::core::result::Result<___R, ::fidl_next::util::Never>;
1937
1938 fn respond(response: ___R) -> Self::Output {
1939 ::core::result::Result::Ok(response)
1940 }
1941 }
1942
1943 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig32 {
1944 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
1945
1946 fn respond_err(response: ___R) -> Self::Output {
1947 ::core::result::Result::Err(response)
1948 }
1949 }
1950
1951 pub struct GetCapabilities;
1952
1953 impl ::fidl_next::Method for GetCapabilities {
1954 const ORDINAL: u64 = 4180765276430907919;
1955 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1956 ::fidl_next::protocol::Flexibility::Strict;
1957
1958 type Protocol = crate::Device;
1959
1960 type Request = crate::wire::DeviceGetCapabilitiesRequest;
1961 }
1962
1963 impl ::fidl_next::TwoWayMethod for GetCapabilities {
1964 type Response = crate::wire::DeviceGetCapabilitiesResponse<'static>;
1965 }
1966
1967 impl<___R> ::fidl_next::Respond<___R> for GetCapabilities {
1968 type Output = crate::generic::DeviceGetCapabilitiesResponse<___R>;
1969
1970 fn respond(response: ___R) -> Self::Output {
1971 crate::generic::DeviceGetCapabilitiesResponse { offsets: response }
1972 }
1973 }
1974
1975 pub struct GetExtendedCapabilities;
1976
1977 impl ::fidl_next::Method for GetExtendedCapabilities {
1978 const ORDINAL: u64 = 830197180054506553;
1979 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1980 ::fidl_next::protocol::Flexibility::Strict;
1981
1982 type Protocol = crate::Device;
1983
1984 type Request = crate::wire::DeviceGetExtendedCapabilitiesRequest;
1985 }
1986
1987 impl ::fidl_next::TwoWayMethod for GetExtendedCapabilities {
1988 type Response = crate::wire::DeviceGetExtendedCapabilitiesResponse<'static>;
1989 }
1990
1991 impl<___R> ::fidl_next::Respond<___R> for GetExtendedCapabilities {
1992 type Output = crate::generic::DeviceGetExtendedCapabilitiesResponse<___R>;
1993
1994 fn respond(response: ___R) -> Self::Output {
1995 crate::generic::DeviceGetExtendedCapabilitiesResponse { offsets: response }
1996 }
1997 }
1998
1999 pub struct GetBti;
2000
2001 impl ::fidl_next::Method for GetBti {
2002 const ORDINAL: u64 = 6795907578404380387;
2003 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2004 ::fidl_next::protocol::Flexibility::Strict;
2005
2006 type Protocol = crate::Device;
2007
2008 type Request = crate::wire::DeviceGetBtiRequest;
2009 }
2010
2011 impl ::fidl_next::TwoWayMethod for GetBti {
2012 type Response = ::fidl_next::wire::Result<
2013 'static,
2014 crate::wire::DeviceGetBtiResponse,
2015 ::fidl_next::wire::Int32,
2016 >;
2017 }
2018
2019 impl<___R> ::fidl_next::Respond<___R> for GetBti {
2020 type Output = ::core::result::Result<
2021 crate::generic::DeviceGetBtiResponse<___R>,
2022 ::fidl_next::util::Never,
2023 >;
2024
2025 fn respond(response: ___R) -> Self::Output {
2026 ::core::result::Result::Ok(crate::generic::DeviceGetBtiResponse { bti: response })
2027 }
2028 }
2029
2030 impl<___R> ::fidl_next::RespondErr<___R> for GetBti {
2031 type Output = ::core::result::Result<::fidl_next::util::Never, ___R>;
2032
2033 fn respond_err(response: ___R) -> Self::Output {
2034 ::core::result::Result::Err(response)
2035 }
2036 }
2037
2038 mod ___detail {
2039 unsafe impl<___T> ::fidl_next::HasConnectionHandles<___T> for crate::Device
2040 where
2041 ___T: ::fidl_next::Transport,
2042 {
2043 type Client = DeviceClient<___T>;
2044 type Server = DeviceServer<___T>;
2045 }
2046
2047 #[repr(transparent)]
2049 pub struct DeviceClient<___T: ::fidl_next::Transport> {
2050 #[allow(dead_code)]
2051 client: ::fidl_next::protocol::Client<___T>,
2052 }
2053
2054 impl<___T> DeviceClient<___T>
2055 where
2056 ___T: ::fidl_next::Transport,
2057 {
2058 #[doc = " Returns a structure containing device information from the configuration header.\n"]
2059 pub fn get_device_info(
2060 &self,
2061 ) -> ::fidl_next::TwoWayFuture<'_, super::GetDeviceInfo, ___T> {
2062 ::fidl_next::TwoWayFuture::from_untyped(
2063 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2064 6168191258208672022,
2065 <super::GetDeviceInfo as ::fidl_next::Method>::FLEXIBILITY,
2066 (),
2067 ),
2068 )
2069 }
2070
2071 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2072 pub fn get_bar(
2073 &self,
2074
2075 bar_id: impl ::fidl_next::Encode<
2076 ::fidl_next::wire::Uint32,
2077 <___T as ::fidl_next::Transport>::SendBuffer,
2078 >,
2079 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBar, ___T>
2080 where
2081 <___T as ::fidl_next::Transport>::SendBuffer:
2082 ::fidl_next::encoder::InternalHandleEncoder,
2083 {
2084 self.get_bar_with(crate::generic::DeviceGetBarRequest { bar_id })
2085 }
2086
2087 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2088 pub fn get_bar_with<___R>(
2089 &self,
2090 request: ___R,
2091 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBar, ___T>
2092 where
2093 ___R: ::fidl_next::Encode<
2094 crate::wire::DeviceGetBarRequest,
2095 <___T as ::fidl_next::Transport>::SendBuffer,
2096 >,
2097 {
2098 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2099 7721003707982149241,
2100 <super::GetBar as ::fidl_next::Method>::FLEXIBILITY,
2101 request,
2102 ))
2103 }
2104
2105 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2106 pub fn set_bus_mastering(
2107 &self,
2108
2109 enabled: impl ::fidl_next::Encode<bool, <___T as ::fidl_next::Transport>::SendBuffer>,
2110 ) -> ::fidl_next::TwoWayFuture<'_, super::SetBusMastering, ___T>
2111 where
2112 <___T as ::fidl_next::Transport>::SendBuffer:
2113 ::fidl_next::encoder::InternalHandleEncoder,
2114 {
2115 self.set_bus_mastering_with(crate::generic::DeviceSetBusMasteringRequest {
2116 enabled,
2117 })
2118 }
2119
2120 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2121 pub fn set_bus_mastering_with<___R>(
2122 &self,
2123 request: ___R,
2124 ) -> ::fidl_next::TwoWayFuture<'_, super::SetBusMastering, ___T>
2125 where
2126 ___R: ::fidl_next::Encode<
2127 crate::wire::DeviceSetBusMasteringRequest,
2128 <___T as ::fidl_next::Transport>::SendBuffer,
2129 >,
2130 {
2131 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2132 3756540713293123587,
2133 <super::SetBusMastering as ::fidl_next::Method>::FLEXIBILITY,
2134 request,
2135 ))
2136 }
2137
2138 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
2139 pub fn reset_device(&self) -> ::fidl_next::TwoWayFuture<'_, super::ResetDevice, ___T> {
2140 ::fidl_next::TwoWayFuture::from_untyped(
2141 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2142 4349199030852488095,
2143 <super::ResetDevice as ::fidl_next::Method>::FLEXIBILITY,
2144 (),
2145 ),
2146 )
2147 }
2148
2149 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
2150 pub fn ack_interrupt(
2151 &self,
2152 ) -> ::fidl_next::TwoWayFuture<'_, super::AckInterrupt, ___T> {
2153 ::fidl_next::TwoWayFuture::from_untyped(
2154 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2155 8103153737854179947,
2156 <super::AckInterrupt as ::fidl_next::Method>::FLEXIBILITY,
2157 (),
2158 ),
2159 )
2160 }
2161
2162 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2163 pub fn map_interrupt(
2164 &self,
2165
2166 which_irq: impl ::fidl_next::Encode<
2167 ::fidl_next::wire::Uint32,
2168 <___T as ::fidl_next::Transport>::SendBuffer,
2169 >,
2170 ) -> ::fidl_next::TwoWayFuture<'_, super::MapInterrupt, ___T>
2171 where
2172 <___T as ::fidl_next::Transport>::SendBuffer:
2173 ::fidl_next::encoder::InternalHandleEncoder,
2174 {
2175 self.map_interrupt_with(crate::generic::DeviceMapInterruptRequest { which_irq })
2176 }
2177
2178 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2179 pub fn map_interrupt_with<___R>(
2180 &self,
2181 request: ___R,
2182 ) -> ::fidl_next::TwoWayFuture<'_, super::MapInterrupt, ___T>
2183 where
2184 ___R: ::fidl_next::Encode<
2185 crate::wire::DeviceMapInterruptRequest,
2186 <___T as ::fidl_next::Transport>::SendBuffer,
2187 >,
2188 {
2189 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2190 2733403074518448659,
2191 <super::MapInterrupt as ::fidl_next::Method>::FLEXIBILITY,
2192 request,
2193 ))
2194 }
2195
2196 #[doc = " Returns the supported interrupt modes for a device.\n"]
2197 pub fn get_interrupt_modes(
2198 &self,
2199 ) -> ::fidl_next::TwoWayFuture<'_, super::GetInterruptModes, ___T> {
2200 ::fidl_next::TwoWayFuture::from_untyped(
2201 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2202 666335764625137482,
2203 <super::GetInterruptModes as ::fidl_next::Method>::FLEXIBILITY,
2204 (),
2205 ),
2206 )
2207 }
2208
2209 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2210 pub fn set_interrupt_mode(
2211 &self,
2212
2213 mode: impl ::fidl_next::Encode<
2214 crate::wire::InterruptMode,
2215 <___T as ::fidl_next::Transport>::SendBuffer,
2216 >,
2217
2218 requested_irq_count: impl ::fidl_next::Encode<
2219 ::fidl_next::wire::Uint32,
2220 <___T as ::fidl_next::Transport>::SendBuffer,
2221 >,
2222 ) -> ::fidl_next::TwoWayFuture<'_, super::SetInterruptMode, ___T>
2223 where
2224 <___T as ::fidl_next::Transport>::SendBuffer:
2225 ::fidl_next::encoder::InternalHandleEncoder,
2226 {
2227 self.set_interrupt_mode_with(crate::generic::DeviceSetInterruptModeRequest {
2228 mode,
2229
2230 requested_irq_count,
2231 })
2232 }
2233
2234 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2235 pub fn set_interrupt_mode_with<___R>(
2236 &self,
2237 request: ___R,
2238 ) -> ::fidl_next::TwoWayFuture<'_, super::SetInterruptMode, ___T>
2239 where
2240 ___R: ::fidl_next::Encode<
2241 crate::wire::DeviceSetInterruptModeRequest,
2242 <___T as ::fidl_next::Transport>::SendBuffer,
2243 >,
2244 {
2245 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2246 602334104497834086,
2247 <super::SetInterruptMode as ::fidl_next::Method>::FLEXIBILITY,
2248 request,
2249 ))
2250 }
2251
2252 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2253 pub fn read_config8(
2254 &self,
2255
2256 offset: impl ::fidl_next::Encode<
2257 ::fidl_next::wire::Uint16,
2258 <___T as ::fidl_next::Transport>::SendBuffer,
2259 >,
2260 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig8, ___T>
2261 where
2262 <___T as ::fidl_next::Transport>::SendBuffer:
2263 ::fidl_next::encoder::InternalHandleEncoder,
2264 {
2265 self.read_config8_with(crate::generic::DeviceReadConfig8Request { offset })
2266 }
2267
2268 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2269 pub fn read_config8_with<___R>(
2270 &self,
2271 request: ___R,
2272 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig8, ___T>
2273 where
2274 ___R: ::fidl_next::Encode<
2275 crate::wire::DeviceReadConfig8Request,
2276 <___T as ::fidl_next::Transport>::SendBuffer,
2277 >,
2278 {
2279 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2280 2952650096395541020,
2281 <super::ReadConfig8 as ::fidl_next::Method>::FLEXIBILITY,
2282 request,
2283 ))
2284 }
2285
2286 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2287 pub fn read_config16(
2288 &self,
2289
2290 offset: impl ::fidl_next::Encode<
2291 ::fidl_next::wire::Uint16,
2292 <___T as ::fidl_next::Transport>::SendBuffer,
2293 >,
2294 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig16, ___T>
2295 where
2296 <___T as ::fidl_next::Transport>::SendBuffer:
2297 ::fidl_next::encoder::InternalHandleEncoder,
2298 {
2299 self.read_config16_with(crate::generic::DeviceReadConfig16Request { offset })
2300 }
2301
2302 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2303 pub fn read_config16_with<___R>(
2304 &self,
2305 request: ___R,
2306 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig16, ___T>
2307 where
2308 ___R: ::fidl_next::Encode<
2309 crate::wire::DeviceReadConfig16Request,
2310 <___T as ::fidl_next::Transport>::SendBuffer,
2311 >,
2312 {
2313 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2314 4309283036617404603,
2315 <super::ReadConfig16 as ::fidl_next::Method>::FLEXIBILITY,
2316 request,
2317 ))
2318 }
2319
2320 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2321 pub fn read_config32(
2322 &self,
2323
2324 offset: impl ::fidl_next::Encode<
2325 ::fidl_next::wire::Uint16,
2326 <___T as ::fidl_next::Transport>::SendBuffer,
2327 >,
2328 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig32, ___T>
2329 where
2330 <___T as ::fidl_next::Transport>::SendBuffer:
2331 ::fidl_next::encoder::InternalHandleEncoder,
2332 {
2333 self.read_config32_with(crate::generic::DeviceReadConfig32Request { offset })
2334 }
2335
2336 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2337 pub fn read_config32_with<___R>(
2338 &self,
2339 request: ___R,
2340 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig32, ___T>
2341 where
2342 ___R: ::fidl_next::Encode<
2343 crate::wire::DeviceReadConfig32Request,
2344 <___T as ::fidl_next::Transport>::SendBuffer,
2345 >,
2346 {
2347 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2348 6139942538560107783,
2349 <super::ReadConfig32 as ::fidl_next::Method>::FLEXIBILITY,
2350 request,
2351 ))
2352 }
2353
2354 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2355 pub fn write_config8(
2356 &self,
2357
2358 offset: impl ::fidl_next::Encode<
2359 ::fidl_next::wire::Uint16,
2360 <___T as ::fidl_next::Transport>::SendBuffer,
2361 >,
2362
2363 value: impl ::fidl_next::Encode<u8, <___T as ::fidl_next::Transport>::SendBuffer>,
2364 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig8, ___T>
2365 where
2366 <___T as ::fidl_next::Transport>::SendBuffer:
2367 ::fidl_next::encoder::InternalHandleEncoder,
2368 {
2369 self.write_config8_with(crate::generic::DeviceWriteConfig8Request { offset, value })
2370 }
2371
2372 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2373 pub fn write_config8_with<___R>(
2374 &self,
2375 request: ___R,
2376 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig8, ___T>
2377 where
2378 ___R: ::fidl_next::Encode<
2379 crate::wire::DeviceWriteConfig8Request,
2380 <___T as ::fidl_next::Transport>::SendBuffer,
2381 >,
2382 {
2383 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2384 331585330300009727,
2385 <super::WriteConfig8 as ::fidl_next::Method>::FLEXIBILITY,
2386 request,
2387 ))
2388 }
2389
2390 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2391 pub fn write_config16(
2392 &self,
2393
2394 offset: impl ::fidl_next::Encode<
2395 ::fidl_next::wire::Uint16,
2396 <___T as ::fidl_next::Transport>::SendBuffer,
2397 >,
2398
2399 value: impl ::fidl_next::Encode<
2400 ::fidl_next::wire::Uint16,
2401 <___T as ::fidl_next::Transport>::SendBuffer,
2402 >,
2403 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig16, ___T>
2404 where
2405 <___T as ::fidl_next::Transport>::SendBuffer:
2406 ::fidl_next::encoder::InternalHandleEncoder,
2407 {
2408 self.write_config16_with(crate::generic::DeviceWriteConfig16Request {
2409 offset,
2410
2411 value,
2412 })
2413 }
2414
2415 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2416 pub fn write_config16_with<___R>(
2417 &self,
2418 request: ___R,
2419 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig16, ___T>
2420 where
2421 ___R: ::fidl_next::Encode<
2422 crate::wire::DeviceWriteConfig16Request,
2423 <___T as ::fidl_next::Transport>::SendBuffer,
2424 >,
2425 {
2426 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2427 4481291721614851839,
2428 <super::WriteConfig16 as ::fidl_next::Method>::FLEXIBILITY,
2429 request,
2430 ))
2431 }
2432
2433 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2434 pub fn write_config32(
2435 &self,
2436
2437 offset: impl ::fidl_next::Encode<
2438 ::fidl_next::wire::Uint16,
2439 <___T as ::fidl_next::Transport>::SendBuffer,
2440 >,
2441
2442 value: impl ::fidl_next::Encode<
2443 ::fidl_next::wire::Uint32,
2444 <___T as ::fidl_next::Transport>::SendBuffer,
2445 >,
2446 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig32, ___T>
2447 where
2448 <___T as ::fidl_next::Transport>::SendBuffer:
2449 ::fidl_next::encoder::InternalHandleEncoder,
2450 {
2451 self.write_config32_with(crate::generic::DeviceWriteConfig32Request {
2452 offset,
2453
2454 value,
2455 })
2456 }
2457
2458 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2459 pub fn write_config32_with<___R>(
2460 &self,
2461 request: ___R,
2462 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig32, ___T>
2463 where
2464 ___R: ::fidl_next::Encode<
2465 crate::wire::DeviceWriteConfig32Request,
2466 <___T as ::fidl_next::Transport>::SendBuffer,
2467 >,
2468 {
2469 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2470 99457760178582408,
2471 <super::WriteConfig32 as ::fidl_next::Method>::FLEXIBILITY,
2472 request,
2473 ))
2474 }
2475
2476 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2477 pub fn get_capabilities(
2478 &self,
2479
2480 id: impl ::fidl_next::Encode<
2481 crate::wire::CapabilityId,
2482 <___T as ::fidl_next::Transport>::SendBuffer,
2483 >,
2484 ) -> ::fidl_next::TwoWayFuture<'_, super::GetCapabilities, ___T>
2485 where
2486 <___T as ::fidl_next::Transport>::SendBuffer:
2487 ::fidl_next::encoder::InternalHandleEncoder,
2488 {
2489 self.get_capabilities_with(crate::generic::DeviceGetCapabilitiesRequest { id })
2490 }
2491
2492 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2493 pub fn get_capabilities_with<___R>(
2494 &self,
2495 request: ___R,
2496 ) -> ::fidl_next::TwoWayFuture<'_, super::GetCapabilities, ___T>
2497 where
2498 ___R: ::fidl_next::Encode<
2499 crate::wire::DeviceGetCapabilitiesRequest,
2500 <___T as ::fidl_next::Transport>::SendBuffer,
2501 >,
2502 {
2503 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2504 4180765276430907919,
2505 <super::GetCapabilities as ::fidl_next::Method>::FLEXIBILITY,
2506 request,
2507 ))
2508 }
2509
2510 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2511 pub fn get_extended_capabilities(
2512 &self,
2513
2514 id: impl ::fidl_next::Encode<
2515 crate::wire::ExtendedCapabilityId,
2516 <___T as ::fidl_next::Transport>::SendBuffer,
2517 >,
2518 ) -> ::fidl_next::TwoWayFuture<'_, super::GetExtendedCapabilities, ___T>
2519 where
2520 <___T as ::fidl_next::Transport>::SendBuffer:
2521 ::fidl_next::encoder::InternalHandleEncoder,
2522 {
2523 self.get_extended_capabilities_with(
2524 crate::generic::DeviceGetExtendedCapabilitiesRequest { id },
2525 )
2526 }
2527
2528 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2529 pub fn get_extended_capabilities_with<___R>(
2530 &self,
2531 request: ___R,
2532 ) -> ::fidl_next::TwoWayFuture<'_, super::GetExtendedCapabilities, ___T>
2533 where
2534 ___R: ::fidl_next::Encode<
2535 crate::wire::DeviceGetExtendedCapabilitiesRequest,
2536 <___T as ::fidl_next::Transport>::SendBuffer,
2537 >,
2538 {
2539 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2540 830197180054506553,
2541 <super::GetExtendedCapabilities as ::fidl_next::Method>::FLEXIBILITY,
2542 request,
2543 ))
2544 }
2545
2546 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2547 pub fn get_bti(
2548 &self,
2549
2550 index: impl ::fidl_next::Encode<
2551 ::fidl_next::wire::Uint32,
2552 <___T as ::fidl_next::Transport>::SendBuffer,
2553 >,
2554 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBti, ___T>
2555 where
2556 <___T as ::fidl_next::Transport>::SendBuffer:
2557 ::fidl_next::encoder::InternalHandleEncoder,
2558 {
2559 self.get_bti_with(crate::generic::DeviceGetBtiRequest { index })
2560 }
2561
2562 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2563 pub fn get_bti_with<___R>(
2564 &self,
2565 request: ___R,
2566 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBti, ___T>
2567 where
2568 ___R: ::fidl_next::Encode<
2569 crate::wire::DeviceGetBtiRequest,
2570 <___T as ::fidl_next::Transport>::SendBuffer,
2571 >,
2572 {
2573 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2574 6795907578404380387,
2575 <super::GetBti as ::fidl_next::Method>::FLEXIBILITY,
2576 request,
2577 ))
2578 }
2579 }
2580
2581 #[repr(transparent)]
2583 pub struct DeviceServer<___T: ::fidl_next::Transport> {
2584 server: ::fidl_next::protocol::Server<___T>,
2585 }
2586
2587 impl<___T> DeviceServer<___T> where ___T: ::fidl_next::Transport {}
2588 }
2589}
2590
2591#[diagnostic::on_unimplemented(
2592 note = "If {Self} implements the non-local DeviceClientHandler trait, use `spawn_as_local` or the `Local` adapter type"
2593)]
2594
2595pub trait DeviceLocalClientHandler<
2599 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
2600 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
2601>
2602{
2603}
2604
2605impl<___H, ___T> ::fidl_next::DispatchLocalClientMessage<___H, ___T> for Device
2606where
2607 ___H: DeviceLocalClientHandler<___T>,
2608 ___T: ::fidl_next::Transport,
2609{
2610 async fn on_event(
2611 handler: &mut ___H,
2612 ordinal: u64,
2613 flexibility: ::fidl_next::protocol::Flexibility,
2614 body: ::fidl_next::Body<___T>,
2615 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
2616 match ordinal {
2617 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
2618 }
2619 }
2620}
2621
2622#[diagnostic::on_unimplemented(
2623 note = "If {Self} implements the non-local DeviceServerHandler trait, use `spawn_as_local` or the `Local` adapter type"
2624)]
2625
2626pub trait DeviceLocalServerHandler<
2630 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
2631 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
2632>
2633{
2634 #[doc = " Returns a structure containing device information from the configuration header.\n"]
2635 fn get_device_info(
2636 &mut self,
2637
2638 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
2639 ) -> impl ::core::future::Future<Output = ()>;
2640
2641 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2642 fn get_bar(
2643 &mut self,
2644
2645 request: ::fidl_next::Request<device::GetBar, ___T>,
2646
2647 responder: ::fidl_next::Responder<device::GetBar, ___T>,
2648 ) -> impl ::core::future::Future<Output = ()>;
2649
2650 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2651 fn set_bus_mastering(
2652 &mut self,
2653
2654 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
2655
2656 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
2657 ) -> impl ::core::future::Future<Output = ()>;
2658
2659 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
2660 fn reset_device(
2661 &mut self,
2662
2663 responder: ::fidl_next::Responder<device::ResetDevice, ___T>,
2664 ) -> impl ::core::future::Future<Output = ()>;
2665
2666 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
2667 fn ack_interrupt(
2668 &mut self,
2669
2670 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
2671 ) -> impl ::core::future::Future<Output = ()>;
2672
2673 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2674 fn map_interrupt(
2675 &mut self,
2676
2677 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
2678
2679 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
2680 ) -> impl ::core::future::Future<Output = ()>;
2681
2682 #[doc = " Returns the supported interrupt modes for a device.\n"]
2683 fn get_interrupt_modes(
2684 &mut self,
2685
2686 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
2687 ) -> impl ::core::future::Future<Output = ()>;
2688
2689 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2690 fn set_interrupt_mode(
2691 &mut self,
2692
2693 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
2694
2695 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
2696 ) -> impl ::core::future::Future<Output = ()>;
2697
2698 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2699 fn read_config8(
2700 &mut self,
2701
2702 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
2703
2704 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
2705 ) -> impl ::core::future::Future<Output = ()>;
2706
2707 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2708 fn read_config16(
2709 &mut self,
2710
2711 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
2712
2713 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
2714 ) -> impl ::core::future::Future<Output = ()>;
2715
2716 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2717 fn read_config32(
2718 &mut self,
2719
2720 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
2721
2722 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
2723 ) -> impl ::core::future::Future<Output = ()>;
2724
2725 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2726 fn write_config8(
2727 &mut self,
2728
2729 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
2730
2731 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
2732 ) -> impl ::core::future::Future<Output = ()>;
2733
2734 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2735 fn write_config16(
2736 &mut self,
2737
2738 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
2739
2740 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
2741 ) -> impl ::core::future::Future<Output = ()>;
2742
2743 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2744 fn write_config32(
2745 &mut self,
2746
2747 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
2748
2749 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
2750 ) -> impl ::core::future::Future<Output = ()>;
2751
2752 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2753 fn get_capabilities(
2754 &mut self,
2755
2756 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
2757
2758 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
2759 ) -> impl ::core::future::Future<Output = ()>;
2760
2761 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2762 fn get_extended_capabilities(
2763 &mut self,
2764
2765 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
2766
2767 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
2768 ) -> impl ::core::future::Future<Output = ()>;
2769
2770 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2771 fn get_bti(
2772 &mut self,
2773
2774 request: ::fidl_next::Request<device::GetBti, ___T>,
2775
2776 responder: ::fidl_next::Responder<device::GetBti, ___T>,
2777 ) -> impl ::core::future::Future<Output = ()>;
2778}
2779
2780impl<___H, ___T> ::fidl_next::DispatchLocalServerMessage<___H, ___T> for Device
2781where
2782 ___H: DeviceLocalServerHandler<___T>,
2783 ___T: ::fidl_next::Transport,
2784 for<'de> crate::wire::DeviceGetBarRequest: ::fidl_next::Decode<
2785 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2786 Constraint = (),
2787 >,
2788 for<'de> crate::wire::DeviceSetBusMasteringRequest: ::fidl_next::Decode<
2789 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2790 Constraint = (),
2791 >,
2792 for<'de> crate::wire::DeviceMapInterruptRequest: ::fidl_next::Decode<
2793 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2794 Constraint = (),
2795 >,
2796 for<'de> crate::wire::DeviceSetInterruptModeRequest: ::fidl_next::Decode<
2797 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2798 Constraint = (),
2799 >,
2800 for<'de> crate::wire::DeviceReadConfig8Request: ::fidl_next::Decode<
2801 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2802 Constraint = (),
2803 >,
2804 for<'de> crate::wire::DeviceReadConfig16Request: ::fidl_next::Decode<
2805 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2806 Constraint = (),
2807 >,
2808 for<'de> crate::wire::DeviceReadConfig32Request: ::fidl_next::Decode<
2809 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2810 Constraint = (),
2811 >,
2812 for<'de> crate::wire::DeviceWriteConfig8Request: ::fidl_next::Decode<
2813 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2814 Constraint = (),
2815 >,
2816 for<'de> crate::wire::DeviceWriteConfig16Request: ::fidl_next::Decode<
2817 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2818 Constraint = (),
2819 >,
2820 for<'de> crate::wire::DeviceWriteConfig32Request: ::fidl_next::Decode<
2821 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2822 Constraint = (),
2823 >,
2824 for<'de> crate::wire::DeviceGetCapabilitiesRequest: ::fidl_next::Decode<
2825 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2826 Constraint = (),
2827 >,
2828 for<'de> crate::wire::DeviceGetExtendedCapabilitiesRequest: ::fidl_next::Decode<
2829 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2830 Constraint = (),
2831 >,
2832 for<'de> crate::wire::DeviceGetBtiRequest: ::fidl_next::Decode<
2833 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2834 Constraint = (),
2835 >,
2836{
2837 async fn on_one_way(
2838 handler: &mut ___H,
2839 ordinal: u64,
2840 flexibility: ::fidl_next::protocol::Flexibility,
2841 body: ::fidl_next::Body<___T>,
2842 ) -> ::core::result::Result<
2843 (),
2844 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
2845 > {
2846 match ordinal {
2847 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
2848 }
2849 }
2850
2851 async fn on_two_way(
2852 handler: &mut ___H,
2853 ordinal: u64,
2854 flexibility: ::fidl_next::protocol::Flexibility,
2855 body: ::fidl_next::Body<___T>,
2856 responder: ::fidl_next::protocol::Responder<___T>,
2857 ) -> ::core::result::Result<
2858 (),
2859 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
2860 > {
2861 match ordinal {
2862 6168191258208672022 => {
2863 let responder = ::fidl_next::Responder::from_untyped(responder);
2864
2865 handler.get_device_info(responder).await;
2866 Ok(())
2867 }
2868
2869 7721003707982149241 => {
2870 let responder = ::fidl_next::Responder::from_untyped(responder);
2871
2872 match ::fidl_next::AsDecoderExt::into_decoded(body) {
2873 Ok(decoded) => {
2874 handler
2875 .get_bar(::fidl_next::Request::from_decoded(decoded), responder)
2876 .await;
2877 Ok(())
2878 }
2879 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2880 ordinal: 7721003707982149241,
2881 error,
2882 }),
2883 }
2884 }
2885
2886 3756540713293123587 => {
2887 let responder = ::fidl_next::Responder::from_untyped(responder);
2888
2889 match ::fidl_next::AsDecoderExt::into_decoded(body) {
2890 Ok(decoded) => {
2891 handler
2892 .set_bus_mastering(
2893 ::fidl_next::Request::from_decoded(decoded),
2894 responder,
2895 )
2896 .await;
2897 Ok(())
2898 }
2899 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2900 ordinal: 3756540713293123587,
2901 error,
2902 }),
2903 }
2904 }
2905
2906 4349199030852488095 => {
2907 let responder = ::fidl_next::Responder::from_untyped(responder);
2908
2909 handler.reset_device(responder).await;
2910 Ok(())
2911 }
2912
2913 8103153737854179947 => {
2914 let responder = ::fidl_next::Responder::from_untyped(responder);
2915
2916 handler.ack_interrupt(responder).await;
2917 Ok(())
2918 }
2919
2920 2733403074518448659 => {
2921 let responder = ::fidl_next::Responder::from_untyped(responder);
2922
2923 match ::fidl_next::AsDecoderExt::into_decoded(body) {
2924 Ok(decoded) => {
2925 handler
2926 .map_interrupt(::fidl_next::Request::from_decoded(decoded), responder)
2927 .await;
2928 Ok(())
2929 }
2930 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2931 ordinal: 2733403074518448659,
2932 error,
2933 }),
2934 }
2935 }
2936
2937 666335764625137482 => {
2938 let responder = ::fidl_next::Responder::from_untyped(responder);
2939
2940 handler.get_interrupt_modes(responder).await;
2941 Ok(())
2942 }
2943
2944 602334104497834086 => {
2945 let responder = ::fidl_next::Responder::from_untyped(responder);
2946
2947 match ::fidl_next::AsDecoderExt::into_decoded(body) {
2948 Ok(decoded) => {
2949 handler
2950 .set_interrupt_mode(
2951 ::fidl_next::Request::from_decoded(decoded),
2952 responder,
2953 )
2954 .await;
2955 Ok(())
2956 }
2957 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2958 ordinal: 602334104497834086,
2959 error,
2960 }),
2961 }
2962 }
2963
2964 2952650096395541020 => {
2965 let responder = ::fidl_next::Responder::from_untyped(responder);
2966
2967 match ::fidl_next::AsDecoderExt::into_decoded(body) {
2968 Ok(decoded) => {
2969 handler
2970 .read_config8(::fidl_next::Request::from_decoded(decoded), responder)
2971 .await;
2972 Ok(())
2973 }
2974 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2975 ordinal: 2952650096395541020,
2976 error,
2977 }),
2978 }
2979 }
2980
2981 4309283036617404603 => {
2982 let responder = ::fidl_next::Responder::from_untyped(responder);
2983
2984 match ::fidl_next::AsDecoderExt::into_decoded(body) {
2985 Ok(decoded) => {
2986 handler
2987 .read_config16(::fidl_next::Request::from_decoded(decoded), responder)
2988 .await;
2989 Ok(())
2990 }
2991 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2992 ordinal: 4309283036617404603,
2993 error,
2994 }),
2995 }
2996 }
2997
2998 6139942538560107783 => {
2999 let responder = ::fidl_next::Responder::from_untyped(responder);
3000
3001 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3002 Ok(decoded) => {
3003 handler
3004 .read_config32(::fidl_next::Request::from_decoded(decoded), responder)
3005 .await;
3006 Ok(())
3007 }
3008 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3009 ordinal: 6139942538560107783,
3010 error,
3011 }),
3012 }
3013 }
3014
3015 331585330300009727 => {
3016 let responder = ::fidl_next::Responder::from_untyped(responder);
3017
3018 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3019 Ok(decoded) => {
3020 handler
3021 .write_config8(::fidl_next::Request::from_decoded(decoded), responder)
3022 .await;
3023 Ok(())
3024 }
3025 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3026 ordinal: 331585330300009727,
3027 error,
3028 }),
3029 }
3030 }
3031
3032 4481291721614851839 => {
3033 let responder = ::fidl_next::Responder::from_untyped(responder);
3034
3035 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3036 Ok(decoded) => {
3037 handler
3038 .write_config16(::fidl_next::Request::from_decoded(decoded), responder)
3039 .await;
3040 Ok(())
3041 }
3042 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3043 ordinal: 4481291721614851839,
3044 error,
3045 }),
3046 }
3047 }
3048
3049 99457760178582408 => {
3050 let responder = ::fidl_next::Responder::from_untyped(responder);
3051
3052 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3053 Ok(decoded) => {
3054 handler
3055 .write_config32(::fidl_next::Request::from_decoded(decoded), responder)
3056 .await;
3057 Ok(())
3058 }
3059 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3060 ordinal: 99457760178582408,
3061 error,
3062 }),
3063 }
3064 }
3065
3066 4180765276430907919 => {
3067 let responder = ::fidl_next::Responder::from_untyped(responder);
3068
3069 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3070 Ok(decoded) => {
3071 handler
3072 .get_capabilities(
3073 ::fidl_next::Request::from_decoded(decoded),
3074 responder,
3075 )
3076 .await;
3077 Ok(())
3078 }
3079 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3080 ordinal: 4180765276430907919,
3081 error,
3082 }),
3083 }
3084 }
3085
3086 830197180054506553 => {
3087 let responder = ::fidl_next::Responder::from_untyped(responder);
3088
3089 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3090 Ok(decoded) => {
3091 handler
3092 .get_extended_capabilities(
3093 ::fidl_next::Request::from_decoded(decoded),
3094 responder,
3095 )
3096 .await;
3097 Ok(())
3098 }
3099 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3100 ordinal: 830197180054506553,
3101 error,
3102 }),
3103 }
3104 }
3105
3106 6795907578404380387 => {
3107 let responder = ::fidl_next::Responder::from_untyped(responder);
3108
3109 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3110 Ok(decoded) => {
3111 handler
3112 .get_bti(::fidl_next::Request::from_decoded(decoded), responder)
3113 .await;
3114 Ok(())
3115 }
3116 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3117 ordinal: 6795907578404380387,
3118 error,
3119 }),
3120 }
3121 }
3122
3123 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3124 }
3125 }
3126}
3127
3128pub trait DeviceClientHandler<
3132 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
3133 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
3134>
3135{
3136}
3137
3138impl<___H, ___T> ::fidl_next::DispatchClientMessage<___H, ___T> for Device
3139where
3140 ___H: DeviceClientHandler<___T> + ::core::marker::Send,
3141 ___T: ::fidl_next::Transport,
3142{
3143 async fn on_event(
3144 handler: &mut ___H,
3145 ordinal: u64,
3146 flexibility: ::fidl_next::protocol::Flexibility,
3147 body: ::fidl_next::Body<___T>,
3148 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
3149 match ordinal {
3150 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3151 }
3152 }
3153}
3154
3155pub trait DeviceServerHandler<
3159 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
3160 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
3161>
3162{
3163 #[doc = " Returns a structure containing device information from the configuration header.\n"]
3164 fn get_device_info(
3165 &mut self,
3166
3167 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
3168 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3169
3170 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
3171 fn get_bar(
3172 &mut self,
3173
3174 request: ::fidl_next::Request<device::GetBar, ___T>,
3175
3176 responder: ::fidl_next::Responder<device::GetBar, ___T>,
3177 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3178
3179 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
3180 fn set_bus_mastering(
3181 &mut self,
3182
3183 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
3184
3185 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
3186 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3187
3188 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
3189 fn reset_device(
3190 &mut self,
3191
3192 responder: ::fidl_next::Responder<device::ResetDevice, ___T>,
3193 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3194
3195 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
3196 fn ack_interrupt(
3197 &mut self,
3198
3199 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
3200 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3201
3202 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
3203 fn map_interrupt(
3204 &mut self,
3205
3206 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
3207
3208 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
3209 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3210
3211 #[doc = " Returns the supported interrupt modes for a device.\n"]
3212 fn get_interrupt_modes(
3213 &mut self,
3214
3215 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
3216 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3217
3218 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
3219 fn set_interrupt_mode(
3220 &mut self,
3221
3222 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
3223
3224 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
3225 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3226
3227 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3228 fn read_config8(
3229 &mut self,
3230
3231 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
3232
3233 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
3234 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3235
3236 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3237 fn read_config16(
3238 &mut self,
3239
3240 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
3241
3242 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
3243 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3244
3245 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3246 fn read_config32(
3247 &mut self,
3248
3249 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
3250
3251 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
3252 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3253
3254 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3255 fn write_config8(
3256 &mut self,
3257
3258 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
3259
3260 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
3261 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3262
3263 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3264 fn write_config16(
3265 &mut self,
3266
3267 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
3268
3269 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
3270 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3271
3272 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3273 fn write_config32(
3274 &mut self,
3275
3276 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
3277
3278 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
3279 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3280
3281 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
3282 fn get_capabilities(
3283 &mut self,
3284
3285 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
3286
3287 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
3288 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3289
3290 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
3291 fn get_extended_capabilities(
3292 &mut self,
3293
3294 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
3295
3296 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
3297 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3298
3299 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
3300 fn get_bti(
3301 &mut self,
3302
3303 request: ::fidl_next::Request<device::GetBti, ___T>,
3304
3305 responder: ::fidl_next::Responder<device::GetBti, ___T>,
3306 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3307}
3308
3309impl<___H, ___T> ::fidl_next::DispatchServerMessage<___H, ___T> for Device
3310where
3311 ___H: DeviceServerHandler<___T> + ::core::marker::Send,
3312 ___T: ::fidl_next::Transport,
3313 for<'de> crate::wire::DeviceGetBarRequest: ::fidl_next::Decode<
3314 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3315 Constraint = (),
3316 >,
3317 for<'de> crate::wire::DeviceSetBusMasteringRequest: ::fidl_next::Decode<
3318 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3319 Constraint = (),
3320 >,
3321 for<'de> crate::wire::DeviceMapInterruptRequest: ::fidl_next::Decode<
3322 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3323 Constraint = (),
3324 >,
3325 for<'de> crate::wire::DeviceSetInterruptModeRequest: ::fidl_next::Decode<
3326 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3327 Constraint = (),
3328 >,
3329 for<'de> crate::wire::DeviceReadConfig8Request: ::fidl_next::Decode<
3330 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3331 Constraint = (),
3332 >,
3333 for<'de> crate::wire::DeviceReadConfig16Request: ::fidl_next::Decode<
3334 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3335 Constraint = (),
3336 >,
3337 for<'de> crate::wire::DeviceReadConfig32Request: ::fidl_next::Decode<
3338 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3339 Constraint = (),
3340 >,
3341 for<'de> crate::wire::DeviceWriteConfig8Request: ::fidl_next::Decode<
3342 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3343 Constraint = (),
3344 >,
3345 for<'de> crate::wire::DeviceWriteConfig16Request: ::fidl_next::Decode<
3346 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3347 Constraint = (),
3348 >,
3349 for<'de> crate::wire::DeviceWriteConfig32Request: ::fidl_next::Decode<
3350 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3351 Constraint = (),
3352 >,
3353 for<'de> crate::wire::DeviceGetCapabilitiesRequest: ::fidl_next::Decode<
3354 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3355 Constraint = (),
3356 >,
3357 for<'de> crate::wire::DeviceGetExtendedCapabilitiesRequest: ::fidl_next::Decode<
3358 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3359 Constraint = (),
3360 >,
3361 for<'de> crate::wire::DeviceGetBtiRequest: ::fidl_next::Decode<
3362 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3363 Constraint = (),
3364 >,
3365{
3366 async fn on_one_way(
3367 handler: &mut ___H,
3368 ordinal: u64,
3369 flexibility: ::fidl_next::protocol::Flexibility,
3370 body: ::fidl_next::Body<___T>,
3371 ) -> ::core::result::Result<
3372 (),
3373 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3374 > {
3375 match ordinal {
3376 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3377 }
3378 }
3379
3380 async fn on_two_way(
3381 handler: &mut ___H,
3382 ordinal: u64,
3383 flexibility: ::fidl_next::protocol::Flexibility,
3384 body: ::fidl_next::Body<___T>,
3385 responder: ::fidl_next::protocol::Responder<___T>,
3386 ) -> ::core::result::Result<
3387 (),
3388 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3389 > {
3390 match ordinal {
3391 6168191258208672022 => {
3392 let responder = ::fidl_next::Responder::from_untyped(responder);
3393
3394 handler.get_device_info(responder).await;
3395 Ok(())
3396 }
3397
3398 7721003707982149241 => {
3399 let responder = ::fidl_next::Responder::from_untyped(responder);
3400
3401 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3402 Ok(decoded) => {
3403 handler
3404 .get_bar(::fidl_next::Request::from_decoded(decoded), responder)
3405 .await;
3406 Ok(())
3407 }
3408 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3409 ordinal: 7721003707982149241,
3410 error,
3411 }),
3412 }
3413 }
3414
3415 3756540713293123587 => {
3416 let responder = ::fidl_next::Responder::from_untyped(responder);
3417
3418 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3419 Ok(decoded) => {
3420 handler
3421 .set_bus_mastering(
3422 ::fidl_next::Request::from_decoded(decoded),
3423 responder,
3424 )
3425 .await;
3426 Ok(())
3427 }
3428 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3429 ordinal: 3756540713293123587,
3430 error,
3431 }),
3432 }
3433 }
3434
3435 4349199030852488095 => {
3436 let responder = ::fidl_next::Responder::from_untyped(responder);
3437
3438 handler.reset_device(responder).await;
3439 Ok(())
3440 }
3441
3442 8103153737854179947 => {
3443 let responder = ::fidl_next::Responder::from_untyped(responder);
3444
3445 handler.ack_interrupt(responder).await;
3446 Ok(())
3447 }
3448
3449 2733403074518448659 => {
3450 let responder = ::fidl_next::Responder::from_untyped(responder);
3451
3452 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3453 Ok(decoded) => {
3454 handler
3455 .map_interrupt(::fidl_next::Request::from_decoded(decoded), responder)
3456 .await;
3457 Ok(())
3458 }
3459 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3460 ordinal: 2733403074518448659,
3461 error,
3462 }),
3463 }
3464 }
3465
3466 666335764625137482 => {
3467 let responder = ::fidl_next::Responder::from_untyped(responder);
3468
3469 handler.get_interrupt_modes(responder).await;
3470 Ok(())
3471 }
3472
3473 602334104497834086 => {
3474 let responder = ::fidl_next::Responder::from_untyped(responder);
3475
3476 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3477 Ok(decoded) => {
3478 handler
3479 .set_interrupt_mode(
3480 ::fidl_next::Request::from_decoded(decoded),
3481 responder,
3482 )
3483 .await;
3484 Ok(())
3485 }
3486 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3487 ordinal: 602334104497834086,
3488 error,
3489 }),
3490 }
3491 }
3492
3493 2952650096395541020 => {
3494 let responder = ::fidl_next::Responder::from_untyped(responder);
3495
3496 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3497 Ok(decoded) => {
3498 handler
3499 .read_config8(::fidl_next::Request::from_decoded(decoded), responder)
3500 .await;
3501 Ok(())
3502 }
3503 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3504 ordinal: 2952650096395541020,
3505 error,
3506 }),
3507 }
3508 }
3509
3510 4309283036617404603 => {
3511 let responder = ::fidl_next::Responder::from_untyped(responder);
3512
3513 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3514 Ok(decoded) => {
3515 handler
3516 .read_config16(::fidl_next::Request::from_decoded(decoded), responder)
3517 .await;
3518 Ok(())
3519 }
3520 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3521 ordinal: 4309283036617404603,
3522 error,
3523 }),
3524 }
3525 }
3526
3527 6139942538560107783 => {
3528 let responder = ::fidl_next::Responder::from_untyped(responder);
3529
3530 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3531 Ok(decoded) => {
3532 handler
3533 .read_config32(::fidl_next::Request::from_decoded(decoded), responder)
3534 .await;
3535 Ok(())
3536 }
3537 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3538 ordinal: 6139942538560107783,
3539 error,
3540 }),
3541 }
3542 }
3543
3544 331585330300009727 => {
3545 let responder = ::fidl_next::Responder::from_untyped(responder);
3546
3547 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3548 Ok(decoded) => {
3549 handler
3550 .write_config8(::fidl_next::Request::from_decoded(decoded), responder)
3551 .await;
3552 Ok(())
3553 }
3554 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3555 ordinal: 331585330300009727,
3556 error,
3557 }),
3558 }
3559 }
3560
3561 4481291721614851839 => {
3562 let responder = ::fidl_next::Responder::from_untyped(responder);
3563
3564 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3565 Ok(decoded) => {
3566 handler
3567 .write_config16(::fidl_next::Request::from_decoded(decoded), responder)
3568 .await;
3569 Ok(())
3570 }
3571 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3572 ordinal: 4481291721614851839,
3573 error,
3574 }),
3575 }
3576 }
3577
3578 99457760178582408 => {
3579 let responder = ::fidl_next::Responder::from_untyped(responder);
3580
3581 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3582 Ok(decoded) => {
3583 handler
3584 .write_config32(::fidl_next::Request::from_decoded(decoded), responder)
3585 .await;
3586 Ok(())
3587 }
3588 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3589 ordinal: 99457760178582408,
3590 error,
3591 }),
3592 }
3593 }
3594
3595 4180765276430907919 => {
3596 let responder = ::fidl_next::Responder::from_untyped(responder);
3597
3598 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3599 Ok(decoded) => {
3600 handler
3601 .get_capabilities(
3602 ::fidl_next::Request::from_decoded(decoded),
3603 responder,
3604 )
3605 .await;
3606 Ok(())
3607 }
3608 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3609 ordinal: 4180765276430907919,
3610 error,
3611 }),
3612 }
3613 }
3614
3615 830197180054506553 => {
3616 let responder = ::fidl_next::Responder::from_untyped(responder);
3617
3618 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3619 Ok(decoded) => {
3620 handler
3621 .get_extended_capabilities(
3622 ::fidl_next::Request::from_decoded(decoded),
3623 responder,
3624 )
3625 .await;
3626 Ok(())
3627 }
3628 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3629 ordinal: 830197180054506553,
3630 error,
3631 }),
3632 }
3633 }
3634
3635 6795907578404380387 => {
3636 let responder = ::fidl_next::Responder::from_untyped(responder);
3637
3638 match ::fidl_next::AsDecoderExt::into_decoded(body) {
3639 Ok(decoded) => {
3640 handler
3641 .get_bti(::fidl_next::Request::from_decoded(decoded), responder)
3642 .await;
3643 Ok(())
3644 }
3645 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3646 ordinal: 6795907578404380387,
3647 error,
3648 }),
3649 }
3650 }
3651
3652 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3653 }
3654 }
3655}
3656
3657impl<___T> DeviceClientHandler<___T> for ::fidl_next::IgnoreEvents where ___T: ::fidl_next::Transport
3658{}
3659
3660impl<___H, ___T> DeviceLocalClientHandler<___T> for ::fidl_next::Local<___H>
3661where
3662 ___H: DeviceClientHandler<___T>,
3663 ___T: ::fidl_next::Transport,
3664{
3665}
3666
3667impl<___H, ___T> DeviceLocalServerHandler<___T> for ::fidl_next::Local<___H>
3668where
3669 ___H: DeviceServerHandler<___T>,
3670 ___T: ::fidl_next::Transport,
3671{
3672 async fn get_device_info(
3673 &mut self,
3674
3675 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
3676 ) {
3677 ___H::get_device_info(&mut self.0, responder).await
3678 }
3679
3680 async fn get_bar(
3681 &mut self,
3682
3683 request: ::fidl_next::Request<device::GetBar, ___T>,
3684
3685 responder: ::fidl_next::Responder<device::GetBar, ___T>,
3686 ) {
3687 ___H::get_bar(&mut self.0, request, responder).await
3688 }
3689
3690 async fn set_bus_mastering(
3691 &mut self,
3692
3693 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
3694
3695 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
3696 ) {
3697 ___H::set_bus_mastering(&mut self.0, request, responder).await
3698 }
3699
3700 async fn reset_device(&mut self, responder: ::fidl_next::Responder<device::ResetDevice, ___T>) {
3701 ___H::reset_device(&mut self.0, responder).await
3702 }
3703
3704 async fn ack_interrupt(
3705 &mut self,
3706
3707 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
3708 ) {
3709 ___H::ack_interrupt(&mut self.0, responder).await
3710 }
3711
3712 async fn map_interrupt(
3713 &mut self,
3714
3715 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
3716
3717 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
3718 ) {
3719 ___H::map_interrupt(&mut self.0, request, responder).await
3720 }
3721
3722 async fn get_interrupt_modes(
3723 &mut self,
3724
3725 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
3726 ) {
3727 ___H::get_interrupt_modes(&mut self.0, responder).await
3728 }
3729
3730 async fn set_interrupt_mode(
3731 &mut self,
3732
3733 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
3734
3735 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
3736 ) {
3737 ___H::set_interrupt_mode(&mut self.0, request, responder).await
3738 }
3739
3740 async fn read_config8(
3741 &mut self,
3742
3743 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
3744
3745 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
3746 ) {
3747 ___H::read_config8(&mut self.0, request, responder).await
3748 }
3749
3750 async fn read_config16(
3751 &mut self,
3752
3753 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
3754
3755 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
3756 ) {
3757 ___H::read_config16(&mut self.0, request, responder).await
3758 }
3759
3760 async fn read_config32(
3761 &mut self,
3762
3763 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
3764
3765 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
3766 ) {
3767 ___H::read_config32(&mut self.0, request, responder).await
3768 }
3769
3770 async fn write_config8(
3771 &mut self,
3772
3773 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
3774
3775 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
3776 ) {
3777 ___H::write_config8(&mut self.0, request, responder).await
3778 }
3779
3780 async fn write_config16(
3781 &mut self,
3782
3783 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
3784
3785 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
3786 ) {
3787 ___H::write_config16(&mut self.0, request, responder).await
3788 }
3789
3790 async fn write_config32(
3791 &mut self,
3792
3793 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
3794
3795 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
3796 ) {
3797 ___H::write_config32(&mut self.0, request, responder).await
3798 }
3799
3800 async fn get_capabilities(
3801 &mut self,
3802
3803 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
3804
3805 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
3806 ) {
3807 ___H::get_capabilities(&mut self.0, request, responder).await
3808 }
3809
3810 async fn get_extended_capabilities(
3811 &mut self,
3812
3813 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
3814
3815 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
3816 ) {
3817 ___H::get_extended_capabilities(&mut self.0, request, responder).await
3818 }
3819
3820 async fn get_bti(
3821 &mut self,
3822
3823 request: ::fidl_next::Request<device::GetBti, ___T>,
3824
3825 responder: ::fidl_next::Responder<device::GetBti, ___T>,
3826 ) {
3827 ___H::get_bti(&mut self.0, request, responder).await
3828 }
3829}
3830
3831#[derive(Debug)]
3833pub struct Service;
3834
3835impl ::fidl_next::DiscoverableService for Service {
3836 const SERVICE_NAME: &'static str = "fuchsia.hardware.pci.Service";
3837 const MEMBER_NAMES: &'static [&'static str] = &["device"];
3838}
3839
3840impl ::fidl_next::HasServiceRequest<::fidl_next::fuchsia::zx::Channel> for Service {}
3841
3842impl<___C> ::fidl_next::Service<___C> for Service
3843where
3844 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
3845{
3846 type Connector = ServiceConnector<___C>;
3847}
3848
3849#[repr(transparent)]
3851pub struct ServiceConnector<___C> {
3852 #[allow(dead_code)]
3853 connector: ___C,
3854}
3855
3856impl<___C> ServiceConnector<___C>
3857where
3858 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
3859{
3860 pub fn device(
3862 &self,
3863 server_end: ::fidl_next::ServerEnd<crate::Device, ::fidl_next::fuchsia::zx::Channel>,
3864 ) -> ::core::result::Result<
3865 (),
3866 <___C as ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>>::Error,
3867 > {
3868 ::fidl_next::protocol::ServiceConnector::<
3869 ::fidl_next::fuchsia::zx::Channel
3870 >::connect_to_member(
3871 &self.connector,
3872 "device",
3873 server_end.into_untyped(),
3874 )
3875 }
3876}
3877
3878pub trait ServiceHandler {
3880 fn device(
3882 &self,
3883 server_end: ::fidl_next::ServerEnd<crate::Device, ::fidl_next::fuchsia::zx::Channel>,
3884 );
3885}
3886
3887impl<___H, ___T> ::fidl_next::DispatchServiceHandler<___H, ___T> for Service
3888where
3889 ___H: ServiceHandler,
3890 ::fidl_next::fuchsia::zx::Channel: ::fidl_next::InstanceFromServiceTransport<___T>,
3891{
3892 fn on_connection(handler: &___H, member: &str, server_end: ___T) {
3893 use ::fidl_next::InstanceFromServiceTransport;
3894 match member {
3895 "device" => handler.device(::fidl_next::ServerEnd::from_untyped(
3896 ::fidl_next::fuchsia::zx::Channel::from_service_transport(server_end),
3897 )),
3898
3899 _ => unreachable!(),
3900 }
3901 }
3902}
3903
3904pub use fidl_next_common_fuchsia_hardware_pci::*;