1#![warn(clippy::all)]
3#![allow(unused_parens, unused_variables, unused_mut, unused_imports, unreachable_code)]
4
5pub mod natural {
6
7 pub use fidl_next_common_fuchsia_hardware_pci::natural::*;
8
9 #[derive(Debug, PartialEq)]
10 pub struct IoBar {
11 pub address: u64,
12
13 pub resource: ::fidl_next::fuchsia::zx::Resource,
14 }
15
16 unsafe impl<___E> ::fidl_next::Encode<crate::wire::IoBar, ___E> for IoBar
17 where
18 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
19 ___E: ::fidl_next::fuchsia::HandleEncoder,
20 {
21 #[inline]
22 fn encode(
23 self,
24 encoder_: &mut ___E,
25 out_: &mut ::core::mem::MaybeUninit<crate::wire::IoBar>,
26 _: (),
27 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
28 ::fidl_next::munge! {
29 let crate::wire::IoBar {
30 address,
31 resource,
32
33 } = out_;
34 }
35
36 ::fidl_next::Encode::encode(self.address, encoder_, address, ())?;
37
38 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(address.as_mut_ptr()) };
39
40 ::fidl_next::Encode::encode(self.resource, encoder_, resource, ())?;
41
42 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(resource.as_mut_ptr()) };
43
44 Ok(())
45 }
46 }
47
48 unsafe impl<___E>
49 ::fidl_next::EncodeOption<::fidl_next::wire::Box<'static, crate::wire::IoBar>, ___E>
50 for IoBar
51 where
52 ___E: ::fidl_next::Encoder + ?Sized,
53 IoBar: ::fidl_next::Encode<crate::wire::IoBar, ___E>,
54 {
55 #[inline]
56 fn encode_option(
57 this: ::core::option::Option<Self>,
58 encoder: &mut ___E,
59 out: &mut ::core::mem::MaybeUninit<::fidl_next::wire::Box<'static, crate::wire::IoBar>>,
60 _: (),
61 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
62 if let Some(inner) = this {
63 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
64 ::fidl_next::wire::Box::encode_present(out);
65 } else {
66 ::fidl_next::wire::Box::encode_absent(out);
67 }
68
69 Ok(())
70 }
71 }
72
73 impl ::fidl_next::FromWire<crate::wire::IoBar> for IoBar {
74 #[inline]
75 fn from_wire(wire: crate::wire::IoBar) -> Self {
76 Self {
77 address: ::fidl_next::FromWire::from_wire(wire.address),
78
79 resource: ::fidl_next::FromWire::from_wire(wire.resource),
80 }
81 }
82 }
83
84 #[derive(Debug, PartialEq)]
85 pub enum BarResult {
86 Io(crate::natural::IoBar),
87
88 Vmo(::fidl_next::fuchsia::zx::Vmo),
89
90 UnknownOrdinal_(u64),
91 }
92
93 impl BarResult {
94 pub fn is_unknown(&self) -> bool {
95 #[allow(unreachable_patterns)]
96 match self {
97 Self::UnknownOrdinal_(_) => true,
98 _ => false,
99 }
100 }
101 }
102
103 unsafe impl<___E> ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E> for BarResult
104 where
105 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
106 ___E: ::fidl_next::Encoder,
107 ___E: ::fidl_next::fuchsia::HandleEncoder,
108 {
109 #[inline]
110 fn encode(
111 self,
112 encoder: &mut ___E,
113 out: &mut ::core::mem::MaybeUninit<crate::wire::BarResult<'static>>,
114 _: (),
115 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
116 ::fidl_next::munge!(let crate::wire::BarResult { raw, _phantom: _ } = out);
117
118 match self {
119 Self::Io(value) => ::fidl_next::wire::Union::encode_as::<___E, crate::wire::IoBar>(
120 value,
121 1,
122 encoder,
123 raw,
124 (),
125 )?,
126
127 Self::Vmo(value) => ::fidl_next::wire::Union::encode_as::<
128 ___E,
129 ::fidl_next::wire::fuchsia::Vmo,
130 >(value, 2, encoder, raw, ())?,
131
132 Self::UnknownOrdinal_(ordinal) => {
133 return Err(::fidl_next::EncodeError::UnknownUnionOrdinal(ordinal as usize));
134 }
135 }
136
137 Ok(())
138 }
139 }
140
141 unsafe impl<___E> ::fidl_next::EncodeOption<crate::wire_optional::BarResult<'static>, ___E>
142 for BarResult
143 where
144 ___E: ?Sized,
145 BarResult: ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E>,
146 {
147 #[inline]
148 fn encode_option(
149 this: ::core::option::Option<Self>,
150 encoder: &mut ___E,
151 out: &mut ::core::mem::MaybeUninit<crate::wire_optional::BarResult<'static>>,
152 _: (),
153 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
154 ::fidl_next::munge!(let crate::wire_optional::BarResult { raw, _phantom: _ } = &mut *out);
155
156 if let Some(inner) = this {
157 let value_out = unsafe { &mut *out.as_mut_ptr().cast() };
158 ::fidl_next::Encode::encode(inner, encoder, value_out, ())?;
159 } else {
160 ::fidl_next::wire::Union::encode_absent(raw);
161 }
162
163 Ok(())
164 }
165 }
166
167 impl<'de> ::fidl_next::FromWire<crate::wire::BarResult<'de>> for BarResult {
168 #[inline]
169 fn from_wire(wire: crate::wire::BarResult<'de>) -> Self {
170 let wire = ::core::mem::ManuallyDrop::new(wire);
171 match wire.raw.ordinal() {
172 1 => Self::Io(::fidl_next::FromWire::from_wire(unsafe {
173 wire.raw.get().read_unchecked::<crate::wire::IoBar>()
174 })),
175
176 2 => Self::Vmo(::fidl_next::FromWire::from_wire(unsafe {
177 wire.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
178 })),
179
180 ord => return Self::UnknownOrdinal_(ord as u64),
181 }
182 }
183 }
184
185 impl<'de> ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>> for BarResult {
186 #[inline]
187 fn from_wire_option(
188 wire: crate::wire_optional::BarResult<'de>,
189 ) -> ::core::option::Option<Self> {
190 if let Some(inner) = wire.into_option() {
191 Some(::fidl_next::FromWire::from_wire(inner))
192 } else {
193 None
194 }
195 }
196 }
197
198 impl<'de> ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>> for Box<BarResult> {
199 #[inline]
200 fn from_wire_option(
201 wire: crate::wire_optional::BarResult<'de>,
202 ) -> ::core::option::Option<Self> {
203 <
204 BarResult as ::fidl_next::FromWireOption<crate::wire_optional::BarResult<'de>>
205 >::from_wire_option(wire).map(Box::new)
206 }
207 }
208
209 #[doc = " Describes and provides access to a given Base Address Register for the device.\n"]
210 #[derive(Debug, PartialEq)]
211 pub struct Bar {
212 pub bar_id: u32,
213
214 pub size: u64,
215
216 pub result: crate::natural::BarResult,
217 }
218
219 unsafe impl<___E> ::fidl_next::Encode<crate::wire::Bar<'static>, ___E> for Bar
220 where
221 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
222 ___E: ::fidl_next::Encoder,
223 ___E: ::fidl_next::fuchsia::HandleEncoder,
224 {
225 #[inline]
226 fn encode(
227 self,
228 encoder_: &mut ___E,
229 out_: &mut ::core::mem::MaybeUninit<crate::wire::Bar<'static>>,
230 _: (),
231 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
232 ::fidl_next::munge! {
233 let crate::wire::Bar {
234 bar_id,
235 size,
236 result,
237
238 } = out_;
239 }
240
241 ::fidl_next::Encode::encode(self.bar_id, encoder_, bar_id, ())?;
242
243 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(bar_id.as_mut_ptr()) };
244
245 ::fidl_next::Encode::encode(self.size, encoder_, size, ())?;
246
247 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(size.as_mut_ptr()) };
248
249 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
250
251 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(result.as_mut_ptr()) };
252
253 Ok(())
254 }
255 }
256
257 unsafe impl<___E>
258 ::fidl_next::EncodeOption<::fidl_next::wire::Box<'static, crate::wire::Bar<'static>>, ___E>
259 for Bar
260 where
261 ___E: ::fidl_next::Encoder + ?Sized,
262 Bar: ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>,
263 {
264 #[inline]
265 fn encode_option(
266 this: ::core::option::Option<Self>,
267 encoder: &mut ___E,
268 out: &mut ::core::mem::MaybeUninit<
269 ::fidl_next::wire::Box<'static, crate::wire::Bar<'static>>,
270 >,
271 _: (),
272 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
273 if let Some(inner) = this {
274 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
275 ::fidl_next::wire::Box::encode_present(out);
276 } else {
277 ::fidl_next::wire::Box::encode_absent(out);
278 }
279
280 Ok(())
281 }
282 }
283
284 impl<'de> ::fidl_next::FromWire<crate::wire::Bar<'de>> for Bar {
285 #[inline]
286 fn from_wire(wire: crate::wire::Bar<'de>) -> Self {
287 Self {
288 bar_id: ::fidl_next::FromWire::from_wire(wire.bar_id),
289
290 size: ::fidl_next::FromWire::from_wire(wire.size),
291
292 result: ::fidl_next::FromWire::from_wire(wire.result),
293 }
294 }
295 }
296
297 #[derive(Debug, PartialEq)]
298 pub struct DeviceGetBarResponse {
299 pub result: crate::natural::Bar,
300 }
301
302 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>
303 for DeviceGetBarResponse
304 where
305 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
306 ___E: ::fidl_next::Encoder,
307 ___E: ::fidl_next::fuchsia::HandleEncoder,
308 {
309 #[inline]
310 fn encode(
311 self,
312 encoder_: &mut ___E,
313 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBarResponse<'static>>,
314 _: (),
315 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
316 ::fidl_next::munge! {
317 let crate::wire::DeviceGetBarResponse {
318 result,
319
320 } = out_;
321 }
322
323 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
324
325 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(result.as_mut_ptr()) };
326
327 Ok(())
328 }
329 }
330
331 unsafe impl<___E>
332 ::fidl_next::EncodeOption<
333 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBarResponse<'static>>,
334 ___E,
335 > for DeviceGetBarResponse
336 where
337 ___E: ::fidl_next::Encoder + ?Sized,
338 DeviceGetBarResponse: ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>,
339 {
340 #[inline]
341 fn encode_option(
342 this: ::core::option::Option<Self>,
343 encoder: &mut ___E,
344 out: &mut ::core::mem::MaybeUninit<
345 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBarResponse<'static>>,
346 >,
347 _: (),
348 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
349 if let Some(inner) = this {
350 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
351 ::fidl_next::wire::Box::encode_present(out);
352 } else {
353 ::fidl_next::wire::Box::encode_absent(out);
354 }
355
356 Ok(())
357 }
358 }
359
360 impl<'de> ::fidl_next::FromWire<crate::wire::DeviceGetBarResponse<'de>> for DeviceGetBarResponse {
361 #[inline]
362 fn from_wire(wire: crate::wire::DeviceGetBarResponse<'de>) -> Self {
363 Self { result: ::fidl_next::FromWire::from_wire(wire.result) }
364 }
365 }
366
367 #[derive(Debug, PartialEq)]
368 #[repr(C)]
369 pub struct DeviceMapInterruptResponse {
370 pub interrupt: ::fidl_next::fuchsia::zx::Interrupt,
371 }
372
373 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>
374 for DeviceMapInterruptResponse
375 where
376 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
377 ___E: ::fidl_next::fuchsia::HandleEncoder,
378 {
379 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
380 Self,
381 crate::wire::DeviceMapInterruptResponse,
382 > = unsafe {
383 ::fidl_next::CopyOptimization::enable_if(
384 true && <::fidl_next::fuchsia::zx::Interrupt as ::fidl_next::Encode<
385 ::fidl_next::wire::fuchsia::Interrupt,
386 ___E,
387 >>::COPY_OPTIMIZATION
388 .is_enabled(),
389 )
390 };
391
392 #[inline]
393 fn encode(
394 self,
395 encoder_: &mut ___E,
396 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceMapInterruptResponse>,
397 _: (),
398 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
399 ::fidl_next::munge! {
400 let crate::wire::DeviceMapInterruptResponse {
401 interrupt,
402
403 } = out_;
404 }
405
406 ::fidl_next::Encode::encode(self.interrupt, encoder_, interrupt, ())?;
407
408 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(interrupt.as_mut_ptr()) };
409
410 Ok(())
411 }
412 }
413
414 unsafe impl<___E>
415 ::fidl_next::EncodeOption<
416 ::fidl_next::wire::Box<'static, crate::wire::DeviceMapInterruptResponse>,
417 ___E,
418 > for DeviceMapInterruptResponse
419 where
420 ___E: ::fidl_next::Encoder + ?Sized,
421 DeviceMapInterruptResponse:
422 ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>,
423 {
424 #[inline]
425 fn encode_option(
426 this: ::core::option::Option<Self>,
427 encoder: &mut ___E,
428 out: &mut ::core::mem::MaybeUninit<
429 ::fidl_next::wire::Box<'static, crate::wire::DeviceMapInterruptResponse>,
430 >,
431 _: (),
432 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
433 if let Some(inner) = this {
434 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
435 ::fidl_next::wire::Box::encode_present(out);
436 } else {
437 ::fidl_next::wire::Box::encode_absent(out);
438 }
439
440 Ok(())
441 }
442 }
443
444 impl ::fidl_next::FromWire<crate::wire::DeviceMapInterruptResponse> for DeviceMapInterruptResponse {
445 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
446 crate::wire::DeviceMapInterruptResponse,
447 Self,
448 > = unsafe {
449 ::fidl_next::CopyOptimization::enable_if(
450 true && <::fidl_next::fuchsia::zx::Interrupt as ::fidl_next::FromWire<
451 ::fidl_next::wire::fuchsia::Interrupt,
452 >>::COPY_OPTIMIZATION
453 .is_enabled(),
454 )
455 };
456
457 #[inline]
458 fn from_wire(wire: crate::wire::DeviceMapInterruptResponse) -> Self {
459 Self { interrupt: ::fidl_next::FromWire::from_wire(wire.interrupt) }
460 }
461 }
462
463 #[derive(Debug, PartialEq)]
464 #[repr(C)]
465 pub struct DeviceGetBtiResponse {
466 pub bti: ::fidl_next::fuchsia::zx::Bti,
467 }
468
469 unsafe impl<___E> ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>
470 for DeviceGetBtiResponse
471 where
472 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
473 ___E: ::fidl_next::fuchsia::HandleEncoder,
474 {
475 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
476 Self,
477 crate::wire::DeviceGetBtiResponse,
478 > = unsafe {
479 ::fidl_next::CopyOptimization::enable_if(
480 true && <::fidl_next::fuchsia::zx::Bti as ::fidl_next::Encode<
481 ::fidl_next::wire::fuchsia::Bti,
482 ___E,
483 >>::COPY_OPTIMIZATION
484 .is_enabled(),
485 )
486 };
487
488 #[inline]
489 fn encode(
490 self,
491 encoder_: &mut ___E,
492 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBtiResponse>,
493 _: (),
494 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
495 ::fidl_next::munge! {
496 let crate::wire::DeviceGetBtiResponse {
497 bti,
498
499 } = out_;
500 }
501
502 ::fidl_next::Encode::encode(self.bti, encoder_, bti, ())?;
503
504 let mut _field = unsafe { ::fidl_next::Slot::new_unchecked(bti.as_mut_ptr()) };
505
506 Ok(())
507 }
508 }
509
510 unsafe impl<___E>
511 ::fidl_next::EncodeOption<
512 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBtiResponse>,
513 ___E,
514 > for DeviceGetBtiResponse
515 where
516 ___E: ::fidl_next::Encoder + ?Sized,
517 DeviceGetBtiResponse: ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>,
518 {
519 #[inline]
520 fn encode_option(
521 this: ::core::option::Option<Self>,
522 encoder: &mut ___E,
523 out: &mut ::core::mem::MaybeUninit<
524 ::fidl_next::wire::Box<'static, crate::wire::DeviceGetBtiResponse>,
525 >,
526 _: (),
527 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
528 if let Some(inner) = this {
529 ::fidl_next::EncoderExt::encode_next(encoder, inner)?;
530 ::fidl_next::wire::Box::encode_present(out);
531 } else {
532 ::fidl_next::wire::Box::encode_absent(out);
533 }
534
535 Ok(())
536 }
537 }
538
539 impl ::fidl_next::FromWire<crate::wire::DeviceGetBtiResponse> for DeviceGetBtiResponse {
540 const COPY_OPTIMIZATION: ::fidl_next::CopyOptimization<
541 crate::wire::DeviceGetBtiResponse,
542 Self,
543 > = unsafe {
544 ::fidl_next::CopyOptimization::enable_if(
545 true && <::fidl_next::fuchsia::zx::Bti as ::fidl_next::FromWire<
546 ::fidl_next::wire::fuchsia::Bti,
547 >>::COPY_OPTIMIZATION
548 .is_enabled(),
549 )
550 };
551
552 #[inline]
553 fn from_wire(wire: crate::wire::DeviceGetBtiResponse) -> Self {
554 Self { bti: ::fidl_next::FromWire::from_wire(wire.bti) }
555 }
556 }
557}
558
559pub mod wire {
560
561 pub use fidl_next_common_fuchsia_hardware_pci::wire::*;
562
563 #[derive(Debug)]
565 #[repr(C)]
566 pub struct IoBar {
567 pub address: ::fidl_next::wire::Uint64,
568
569 pub resource: ::fidl_next::wire::fuchsia::Resource,
570 }
571
572 static_assertions::const_assert_eq!(std::mem::size_of::<IoBar>(), 16);
573 static_assertions::const_assert_eq!(std::mem::align_of::<IoBar>(), 8);
574
575 static_assertions::const_assert_eq!(std::mem::offset_of!(IoBar, address), 0);
576
577 static_assertions::const_assert_eq!(std::mem::offset_of!(IoBar, resource), 8);
578
579 impl ::fidl_next::Constrained for IoBar {
580 type Constraint = ();
581
582 fn validate(
583 _: ::fidl_next::Slot<'_, Self>,
584 _: Self::Constraint,
585 ) -> Result<(), ::fidl_next::ValidationError> {
586 Ok(())
587 }
588 }
589
590 unsafe impl ::fidl_next::Wire for IoBar {
591 type Narrowed<'de> = IoBar;
592
593 #[inline]
594 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
595 ::fidl_next::munge! {
596 let Self {
597 address,
598 resource,
599
600 } = &mut *out_;
601 }
602
603 ::fidl_next::Wire::zero_padding(address);
604
605 ::fidl_next::Wire::zero_padding(resource);
606
607 unsafe {
608 out_.as_mut_ptr().cast::<u8>().add(12).write_bytes(0, 4);
609 }
610 }
611 }
612
613 unsafe impl<___D> ::fidl_next::Decode<___D> for IoBar
614 where
615 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
616 ___D: ::fidl_next::fuchsia::HandleDecoder,
617 {
618 fn decode(
619 slot_: ::fidl_next::Slot<'_, Self>,
620 decoder_: &mut ___D,
621 _: (),
622 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
623 if slot_.as_bytes()[12..16] != [0u8; 4] {
624 return Err(::fidl_next::DecodeError::InvalidPadding);
625 }
626
627 ::fidl_next::munge! {
628 let Self {
629 mut address,
630 mut resource,
631
632 } = slot_;
633 }
634
635 let _field = address.as_mut();
636
637 ::fidl_next::Decode::decode(address.as_mut(), decoder_, ())?;
638
639 let _field = resource.as_mut();
640
641 ::fidl_next::Decode::decode(resource.as_mut(), decoder_, ())?;
642
643 Ok(())
644 }
645 }
646
647 impl ::fidl_next::IntoNatural for IoBar {
648 type Natural = crate::natural::IoBar;
649 }
650
651 #[repr(transparent)]
653 pub struct BarResult<'de> {
654 pub(crate) raw: ::fidl_next::wire::Union,
655 pub(crate) _phantom: ::core::marker::PhantomData<&'de mut [::fidl_next::Chunk]>,
656 }
657
658 impl<'de> Drop for BarResult<'de> {
659 fn drop(&mut self) {
660 match self.raw.ordinal() {
661 1 => {
662 let _ = unsafe { self.raw.get().read_unchecked::<crate::wire::IoBar>() };
663 }
664
665 2 => {
666 let _ = unsafe {
667 self.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
668 };
669 }
670
671 _ => (),
672 }
673 }
674 }
675
676 impl ::fidl_next::Constrained for BarResult<'_> {
677 type Constraint = ();
678
679 fn validate(
680 _: ::fidl_next::Slot<'_, Self>,
681 _: Self::Constraint,
682 ) -> Result<(), ::fidl_next::ValidationError> {
683 Ok(())
684 }
685 }
686
687 unsafe impl ::fidl_next::Wire for BarResult<'static> {
688 type Narrowed<'de> = BarResult<'de>;
689
690 #[inline]
691 fn zero_padding(out: &mut ::core::mem::MaybeUninit<Self>) {
692 ::fidl_next::munge!(let Self { raw, _phantom: _ } = out);
693 ::fidl_next::wire::Union::zero_padding(raw);
694 }
695 }
696
697 pub mod bar_result {
698 pub enum Ref<'de> {
699 Io(&'de crate::wire::IoBar),
700
701 Vmo(&'de ::fidl_next::wire::fuchsia::Vmo),
702
703 UnknownOrdinal_(u64),
704 }
705
706 pub enum Value {
707 Io(crate::wire::IoBar),
708
709 Vmo(::fidl_next::wire::fuchsia::Vmo),
710
711 UnknownOrdinal_(u64),
712 }
713 }
714
715 impl<'de> BarResult<'de> {
716 pub fn as_ref(&self) -> crate::wire::bar_result::Ref<'_> {
717 match self.raw.ordinal() {
718 1 => crate::wire::bar_result::Ref::Io(unsafe {
719 self.raw.get().deref_unchecked::<crate::wire::IoBar>()
720 }),
721
722 2 => crate::wire::bar_result::Ref::Vmo(unsafe {
723 self.raw.get().deref_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
724 }),
725
726 unknown => crate::wire::bar_result::Ref::UnknownOrdinal_(unknown),
727 }
728 }
729
730 pub fn into_inner(self) -> crate::wire::bar_result::Value {
731 let this = ::core::mem::ManuallyDrop::new(self);
732
733 match this.raw.ordinal() {
734 1 => crate::wire::bar_result::Value::Io(unsafe {
735 this.raw.get().read_unchecked::<crate::wire::IoBar>()
736 }),
737
738 2 => crate::wire::bar_result::Value::Vmo(unsafe {
739 this.raw.get().read_unchecked::<::fidl_next::wire::fuchsia::Vmo>()
740 }),
741
742 unknown => crate::wire::bar_result::Value::UnknownOrdinal_(unknown),
743 }
744 }
745 }
746
747 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for BarResult<'de>
748 where
749 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
750 ___D: ::fidl_next::Decoder<'de>,
751 ___D: ::fidl_next::fuchsia::HandleDecoder,
752 {
753 fn decode(
754 mut slot: ::fidl_next::Slot<'_, Self>,
755 decoder: &mut ___D,
756 _: (),
757 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
758 ::fidl_next::munge!(let Self { mut raw, _phantom: _ } = slot.as_mut());
759 match ::fidl_next::wire::Union::encoded_ordinal(raw.as_mut()) {
760 1 => ::fidl_next::wire::Union::decode_as::<___D, crate::wire::IoBar>(
761 raw,
762 decoder,
763 (),
764 )?,
765
766 2 => ::fidl_next::wire::Union::decode_as::<___D, ::fidl_next::wire::fuchsia::Vmo>(
767 raw,
768 decoder,
769 (),
770 )?,
771
772 _ => ::fidl_next::wire::Union::decode_unknown(raw, decoder)?,
773 }
774
775 Ok(())
776 }
777 }
778
779 impl<'de> ::core::fmt::Debug for BarResult<'de> {
780 fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
781 match self.raw.ordinal() {
782 1 => unsafe { self.raw.get().deref_unchecked::<crate::wire::IoBar>().fmt(f) },
783 2 => unsafe {
784 self.raw.get().deref_unchecked::<::fidl_next::wire::fuchsia::Vmo>().fmt(f)
785 },
786 _ => unsafe { ::core::hint::unreachable_unchecked() },
787 }
788 }
789 }
790
791 impl<'de> ::fidl_next::IntoNatural for BarResult<'de> {
792 type Natural = crate::natural::BarResult;
793 }
794
795 #[derive(Debug)]
797 #[repr(C)]
798 pub struct Bar<'de> {
799 pub bar_id: ::fidl_next::wire::Uint32,
800
801 pub size: ::fidl_next::wire::Uint64,
802
803 pub result: crate::wire::BarResult<'de>,
804 }
805
806 static_assertions::const_assert_eq!(std::mem::size_of::<Bar<'_>>(), 32);
807 static_assertions::const_assert_eq!(std::mem::align_of::<Bar<'_>>(), 8);
808
809 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, bar_id), 0);
810
811 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, size), 8);
812
813 static_assertions::const_assert_eq!(std::mem::offset_of!(Bar<'_>, result), 16);
814
815 impl ::fidl_next::Constrained for Bar<'_> {
816 type Constraint = ();
817
818 fn validate(
819 _: ::fidl_next::Slot<'_, Self>,
820 _: Self::Constraint,
821 ) -> Result<(), ::fidl_next::ValidationError> {
822 Ok(())
823 }
824 }
825
826 unsafe impl ::fidl_next::Wire for Bar<'static> {
827 type Narrowed<'de> = Bar<'de>;
828
829 #[inline]
830 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
831 ::fidl_next::munge! {
832 let Self {
833 bar_id,
834 size,
835 result,
836
837 } = &mut *out_;
838 }
839
840 ::fidl_next::Wire::zero_padding(bar_id);
841
842 ::fidl_next::Wire::zero_padding(size);
843
844 ::fidl_next::Wire::zero_padding(result);
845
846 unsafe {
847 out_.as_mut_ptr().cast::<u8>().add(4).write_bytes(0, 4);
848 }
849 }
850 }
851
852 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for Bar<'de>
853 where
854 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
855 ___D: ::fidl_next::Decoder<'de>,
856 ___D: ::fidl_next::fuchsia::HandleDecoder,
857 {
858 fn decode(
859 slot_: ::fidl_next::Slot<'_, Self>,
860 decoder_: &mut ___D,
861 _: (),
862 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
863 if slot_.as_bytes()[4..8] != [0u8; 4] {
864 return Err(::fidl_next::DecodeError::InvalidPadding);
865 }
866
867 ::fidl_next::munge! {
868 let Self {
869 mut bar_id,
870 mut size,
871 mut result,
872
873 } = slot_;
874 }
875
876 let _field = bar_id.as_mut();
877
878 ::fidl_next::Decode::decode(bar_id.as_mut(), decoder_, ())?;
879
880 let _field = size.as_mut();
881
882 ::fidl_next::Decode::decode(size.as_mut(), decoder_, ())?;
883
884 let _field = result.as_mut();
885
886 ::fidl_next::Decode::decode(result.as_mut(), decoder_, ())?;
887
888 Ok(())
889 }
890 }
891
892 impl<'de> ::fidl_next::IntoNatural for Bar<'de> {
893 type Natural = crate::natural::Bar;
894 }
895
896 #[derive(Debug)]
898 #[repr(C)]
899 pub struct DeviceGetBarResponse<'de> {
900 pub result: crate::wire::Bar<'de>,
901 }
902
903 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceGetBarResponse<'_>>(), 32);
904 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceGetBarResponse<'_>>(), 8);
905
906 static_assertions::const_assert_eq!(std::mem::offset_of!(DeviceGetBarResponse<'_>, result), 0);
907
908 impl ::fidl_next::Constrained for DeviceGetBarResponse<'_> {
909 type Constraint = ();
910
911 fn validate(
912 _: ::fidl_next::Slot<'_, Self>,
913 _: Self::Constraint,
914 ) -> Result<(), ::fidl_next::ValidationError> {
915 Ok(())
916 }
917 }
918
919 unsafe impl ::fidl_next::Wire for DeviceGetBarResponse<'static> {
920 type Narrowed<'de> = DeviceGetBarResponse<'de>;
921
922 #[inline]
923 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
924 ::fidl_next::munge! {
925 let Self {
926 result,
927
928 } = &mut *out_;
929 }
930
931 ::fidl_next::Wire::zero_padding(result);
932 }
933 }
934
935 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for DeviceGetBarResponse<'de>
936 where
937 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
938 ___D: ::fidl_next::Decoder<'de>,
939 ___D: ::fidl_next::fuchsia::HandleDecoder,
940 {
941 fn decode(
942 slot_: ::fidl_next::Slot<'_, Self>,
943 decoder_: &mut ___D,
944 _: (),
945 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
946 ::fidl_next::munge! {
947 let Self {
948 mut result,
949
950 } = slot_;
951 }
952
953 let _field = result.as_mut();
954
955 ::fidl_next::Decode::decode(result.as_mut(), decoder_, ())?;
956
957 Ok(())
958 }
959 }
960
961 impl<'de> ::fidl_next::IntoNatural for DeviceGetBarResponse<'de> {
962 type Natural = crate::natural::DeviceGetBarResponse;
963 }
964
965 #[derive(Debug)]
967 #[repr(C)]
968 pub struct DeviceMapInterruptResponse {
969 pub interrupt: ::fidl_next::wire::fuchsia::Interrupt,
970 }
971
972 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceMapInterruptResponse>(), 4);
973 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceMapInterruptResponse>(), 4);
974
975 static_assertions::const_assert_eq!(
976 std::mem::offset_of!(DeviceMapInterruptResponse, interrupt),
977 0
978 );
979
980 impl ::fidl_next::Constrained for DeviceMapInterruptResponse {
981 type Constraint = ();
982
983 fn validate(
984 _: ::fidl_next::Slot<'_, Self>,
985 _: Self::Constraint,
986 ) -> Result<(), ::fidl_next::ValidationError> {
987 Ok(())
988 }
989 }
990
991 unsafe impl ::fidl_next::Wire for DeviceMapInterruptResponse {
992 type Narrowed<'de> = DeviceMapInterruptResponse;
993
994 #[inline]
995 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
996 ::fidl_next::munge! {
997 let Self {
998 interrupt,
999
1000 } = &mut *out_;
1001 }
1002
1003 ::fidl_next::Wire::zero_padding(interrupt);
1004 }
1005 }
1006
1007 unsafe impl<___D> ::fidl_next::Decode<___D> for DeviceMapInterruptResponse
1008 where
1009 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1010 ___D: ::fidl_next::fuchsia::HandleDecoder,
1011 {
1012 fn decode(
1013 slot_: ::fidl_next::Slot<'_, Self>,
1014 decoder_: &mut ___D,
1015 _: (),
1016 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1017 ::fidl_next::munge! {
1018 let Self {
1019 mut interrupt,
1020
1021 } = slot_;
1022 }
1023
1024 let _field = interrupt.as_mut();
1025
1026 ::fidl_next::Decode::decode(interrupt.as_mut(), decoder_, ())?;
1027
1028 Ok(())
1029 }
1030 }
1031
1032 impl ::fidl_next::IntoNatural for DeviceMapInterruptResponse {
1033 type Natural = crate::natural::DeviceMapInterruptResponse;
1034 }
1035
1036 #[derive(Debug)]
1038 #[repr(C)]
1039 pub struct DeviceGetBtiResponse {
1040 pub bti: ::fidl_next::wire::fuchsia::Bti,
1041 }
1042
1043 static_assertions::const_assert_eq!(std::mem::size_of::<DeviceGetBtiResponse>(), 4);
1044 static_assertions::const_assert_eq!(std::mem::align_of::<DeviceGetBtiResponse>(), 4);
1045
1046 static_assertions::const_assert_eq!(std::mem::offset_of!(DeviceGetBtiResponse, bti), 0);
1047
1048 impl ::fidl_next::Constrained for DeviceGetBtiResponse {
1049 type Constraint = ();
1050
1051 fn validate(
1052 _: ::fidl_next::Slot<'_, Self>,
1053 _: Self::Constraint,
1054 ) -> Result<(), ::fidl_next::ValidationError> {
1055 Ok(())
1056 }
1057 }
1058
1059 unsafe impl ::fidl_next::Wire for DeviceGetBtiResponse {
1060 type Narrowed<'de> = DeviceGetBtiResponse;
1061
1062 #[inline]
1063 fn zero_padding(out_: &mut ::core::mem::MaybeUninit<Self>) {
1064 ::fidl_next::munge! {
1065 let Self {
1066 bti,
1067
1068 } = &mut *out_;
1069 }
1070
1071 ::fidl_next::Wire::zero_padding(bti);
1072 }
1073 }
1074
1075 unsafe impl<___D> ::fidl_next::Decode<___D> for DeviceGetBtiResponse
1076 where
1077 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1078 ___D: ::fidl_next::fuchsia::HandleDecoder,
1079 {
1080 fn decode(
1081 slot_: ::fidl_next::Slot<'_, Self>,
1082 decoder_: &mut ___D,
1083 _: (),
1084 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1085 ::fidl_next::munge! {
1086 let Self {
1087 mut bti,
1088
1089 } = slot_;
1090 }
1091
1092 let _field = bti.as_mut();
1093
1094 ::fidl_next::Decode::decode(bti.as_mut(), decoder_, ())?;
1095
1096 Ok(())
1097 }
1098 }
1099
1100 impl ::fidl_next::IntoNatural for DeviceGetBtiResponse {
1101 type Natural = crate::natural::DeviceGetBtiResponse;
1102 }
1103}
1104
1105pub mod wire_optional {
1106
1107 pub use fidl_next_common_fuchsia_hardware_pci::wire_optional::*;
1108
1109 #[repr(transparent)]
1110 pub struct BarResult<'de> {
1111 pub(crate) raw: ::fidl_next::wire::Union,
1112 pub(crate) _phantom: ::core::marker::PhantomData<&'de mut [::fidl_next::Chunk]>,
1113 }
1114
1115 impl ::fidl_next::Constrained for BarResult<'_> {
1116 type Constraint = ();
1117
1118 fn validate(
1119 _: ::fidl_next::Slot<'_, Self>,
1120 _: Self::Constraint,
1121 ) -> Result<(), ::fidl_next::ValidationError> {
1122 Ok(())
1123 }
1124 }
1125
1126 unsafe impl ::fidl_next::Wire for BarResult<'static> {
1127 type Narrowed<'de> = BarResult<'de>;
1128
1129 #[inline]
1130 fn zero_padding(out: &mut ::core::mem::MaybeUninit<Self>) {
1131 ::fidl_next::munge!(let Self { raw, _phantom: _ } = out);
1132 ::fidl_next::wire::Union::zero_padding(raw);
1133 }
1134 }
1135
1136 impl<'de> BarResult<'de> {
1137 pub fn is_some(&self) -> bool {
1138 self.raw.is_some()
1139 }
1140
1141 pub fn is_none(&self) -> bool {
1142 self.raw.is_none()
1143 }
1144
1145 pub fn as_ref(&self) -> ::core::option::Option<&crate::wire::BarResult<'de>> {
1146 if self.is_some() { Some(unsafe { &*(self as *const Self).cast() }) } else { None }
1147 }
1148
1149 pub fn into_option(self) -> ::core::option::Option<crate::wire::BarResult<'de>> {
1150 if self.is_some() {
1151 Some(crate::wire::BarResult {
1152 raw: self.raw,
1153 _phantom: ::core::marker::PhantomData,
1154 })
1155 } else {
1156 None
1157 }
1158 }
1159 }
1160
1161 unsafe impl<'de, ___D> ::fidl_next::Decode<___D> for BarResult<'de>
1162 where
1163 ___D: ::fidl_next::decoder::InternalHandleDecoder + ?Sized,
1164 ___D: ::fidl_next::Decoder<'de>,
1165 ___D: ::fidl_next::fuchsia::HandleDecoder,
1166 {
1167 fn decode(
1168 mut slot: ::fidl_next::Slot<'_, Self>,
1169 decoder: &mut ___D,
1170 _: (),
1171 ) -> ::core::result::Result<(), ::fidl_next::DecodeError> {
1172 ::fidl_next::munge!(let Self { mut raw, _phantom: _ } = slot.as_mut());
1173 match ::fidl_next::wire::Union::encoded_ordinal(raw.as_mut()) {
1174 1 => ::fidl_next::wire::Union::decode_as::<___D, crate::wire::IoBar>(
1175 raw,
1176 decoder,
1177 (),
1178 )?,
1179
1180 2 => ::fidl_next::wire::Union::decode_as::<___D, ::fidl_next::wire::fuchsia::Vmo>(
1181 raw,
1182 decoder,
1183 (),
1184 )?,
1185
1186 0 => ::fidl_next::wire::Union::decode_absent(raw)?,
1187 _ => ::fidl_next::wire::Union::decode_unknown(raw, decoder)?,
1188 }
1189
1190 Ok(())
1191 }
1192 }
1193
1194 impl<'de> ::core::fmt::Debug for BarResult<'de> {
1195 fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
1196 self.as_ref().fmt(f)
1197 }
1198 }
1199
1200 impl<'de> ::fidl_next::IntoNatural for BarResult<'de> {
1201 type Natural = ::core::option::Option<crate::natural::BarResult>;
1202 }
1203}
1204
1205pub mod generic {
1206
1207 pub use fidl_next_common_fuchsia_hardware_pci::generic::*;
1208
1209 pub struct IoBar<T0, T1> {
1211 pub address: T0,
1212
1213 pub resource: T1,
1214 }
1215
1216 unsafe impl<___E, T0, T1> ::fidl_next::Encode<crate::wire::IoBar, ___E> for IoBar<T0, T1>
1217 where
1218 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1219 ___E: ::fidl_next::fuchsia::HandleEncoder,
1220 T0: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1221 T1: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Resource, ___E>,
1222 {
1223 #[inline]
1224 fn encode(
1225 self,
1226 encoder_: &mut ___E,
1227 out_: &mut ::core::mem::MaybeUninit<crate::wire::IoBar>,
1228 _: (),
1229 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1230 ::fidl_next::munge! {
1231 let crate::wire::IoBar {
1232 address,
1233 resource,
1234
1235 } = out_;
1236 }
1237
1238 ::fidl_next::Encode::encode(self.address, encoder_, address, ())?;
1239
1240 ::fidl_next::Encode::encode(self.resource, encoder_, resource, ())?;
1241
1242 Ok(())
1243 }
1244 }
1245
1246 pub struct Bar<T0, T1, T2> {
1248 pub bar_id: T0,
1249
1250 pub size: T1,
1251
1252 pub result: T2,
1253 }
1254
1255 unsafe impl<___E, T0, T1, T2> ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>
1256 for Bar<T0, T1, T2>
1257 where
1258 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1259 ___E: ::fidl_next::Encoder,
1260 ___E: ::fidl_next::fuchsia::HandleEncoder,
1261 T0: ::fidl_next::Encode<::fidl_next::wire::Uint32, ___E>,
1262 T1: ::fidl_next::Encode<::fidl_next::wire::Uint64, ___E>,
1263 T2: ::fidl_next::Encode<crate::wire::BarResult<'static>, ___E>,
1264 {
1265 #[inline]
1266 fn encode(
1267 self,
1268 encoder_: &mut ___E,
1269 out_: &mut ::core::mem::MaybeUninit<crate::wire::Bar<'static>>,
1270 _: (),
1271 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1272 ::fidl_next::munge! {
1273 let crate::wire::Bar {
1274 bar_id,
1275 size,
1276 result,
1277
1278 } = out_;
1279 }
1280
1281 ::fidl_next::Encode::encode(self.bar_id, encoder_, bar_id, ())?;
1282
1283 ::fidl_next::Encode::encode(self.size, encoder_, size, ())?;
1284
1285 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
1286
1287 Ok(())
1288 }
1289 }
1290
1291 pub struct DeviceGetBarResponse<T0> {
1293 pub result: T0,
1294 }
1295
1296 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBarResponse<'static>, ___E>
1297 for DeviceGetBarResponse<T0>
1298 where
1299 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1300 ___E: ::fidl_next::Encoder,
1301 ___E: ::fidl_next::fuchsia::HandleEncoder,
1302 T0: ::fidl_next::Encode<crate::wire::Bar<'static>, ___E>,
1303 {
1304 #[inline]
1305 fn encode(
1306 self,
1307 encoder_: &mut ___E,
1308 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBarResponse<'static>>,
1309 _: (),
1310 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1311 ::fidl_next::munge! {
1312 let crate::wire::DeviceGetBarResponse {
1313 result,
1314
1315 } = out_;
1316 }
1317
1318 ::fidl_next::Encode::encode(self.result, encoder_, result, ())?;
1319
1320 Ok(())
1321 }
1322 }
1323
1324 pub struct DeviceMapInterruptResponse<T0> {
1326 pub interrupt: T0,
1327 }
1328
1329 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceMapInterruptResponse, ___E>
1330 for DeviceMapInterruptResponse<T0>
1331 where
1332 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1333 ___E: ::fidl_next::fuchsia::HandleEncoder,
1334 T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Interrupt, ___E>,
1335 {
1336 #[inline]
1337 fn encode(
1338 self,
1339 encoder_: &mut ___E,
1340 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceMapInterruptResponse>,
1341 _: (),
1342 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1343 ::fidl_next::munge! {
1344 let crate::wire::DeviceMapInterruptResponse {
1345 interrupt,
1346
1347 } = out_;
1348 }
1349
1350 ::fidl_next::Encode::encode(self.interrupt, encoder_, interrupt, ())?;
1351
1352 Ok(())
1353 }
1354 }
1355
1356 pub struct DeviceGetBtiResponse<T0> {
1358 pub bti: T0,
1359 }
1360
1361 unsafe impl<___E, T0> ::fidl_next::Encode<crate::wire::DeviceGetBtiResponse, ___E>
1362 for DeviceGetBtiResponse<T0>
1363 where
1364 ___E: ::fidl_next::encoder::InternalHandleEncoder + ?Sized,
1365 ___E: ::fidl_next::fuchsia::HandleEncoder,
1366 T0: ::fidl_next::Encode<::fidl_next::wire::fuchsia::Bti, ___E>,
1367 {
1368 #[inline]
1369 fn encode(
1370 self,
1371 encoder_: &mut ___E,
1372 out_: &mut ::core::mem::MaybeUninit<crate::wire::DeviceGetBtiResponse>,
1373 _: (),
1374 ) -> ::core::result::Result<(), ::fidl_next::EncodeError> {
1375 ::fidl_next::munge! {
1376 let crate::wire::DeviceGetBtiResponse {
1377 bti,
1378
1379 } = out_;
1380 }
1381
1382 ::fidl_next::Encode::encode(self.bti, encoder_, bti, ())?;
1383
1384 Ok(())
1385 }
1386 }
1387}
1388
1389pub use self::natural::*;
1390
1391#[derive(Debug)]
1393pub struct BusService;
1394
1395impl ::fidl_next::DiscoverableService for BusService {
1396 const SERVICE_NAME: &'static str = "fuchsia.hardware.pci.BusService";
1397 const MEMBER_NAMES: &'static [&'static str] = &["bus"];
1398}
1399
1400impl ::fidl_next::HasServiceRequest<::fidl_next::fuchsia::zx::Channel> for BusService {}
1401
1402impl<___C> ::fidl_next::Service<___C> for BusService
1403where
1404 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
1405{
1406 type Connector = BusServiceConnector<___C>;
1407}
1408
1409#[repr(transparent)]
1411pub struct BusServiceConnector<___C> {
1412 #[allow(dead_code)]
1413 connector: ___C,
1414}
1415
1416impl<___C> BusServiceConnector<___C>
1417where
1418 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
1419{
1420 pub fn bus(
1422 &self,
1423 server_end: ::fidl_next::ServerEnd<crate::Bus, ::fidl_next::fuchsia::zx::Channel>,
1424 ) -> ::core::result::Result<
1425 (),
1426 <___C as ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>>::Error,
1427 > {
1428 ::fidl_next::protocol::ServiceConnector::<
1429 ::fidl_next::fuchsia::zx::Channel
1430 >::connect_to_member(
1431 &self.connector,
1432 "bus",
1433 server_end.into_untyped(),
1434 )
1435 }
1436}
1437
1438pub trait BusServiceHandler {
1440 fn bus(
1442 &self,
1443 server_end: ::fidl_next::ServerEnd<crate::Bus, ::fidl_next::fuchsia::zx::Channel>,
1444 );
1445}
1446
1447impl<___H, ___T> ::fidl_next::DispatchServiceHandler<___H, ___T> for BusService
1448where
1449 ___H: BusServiceHandler,
1450 ::fidl_next::fuchsia::zx::Channel: ::fidl_next::InstanceFromServiceTransport<___T>,
1451{
1452 fn on_connection(handler: &___H, member: &str, server_end: ___T) {
1453 use ::fidl_next::InstanceFromServiceTransport;
1454 match member {
1455 "bus" => handler.bus(::fidl_next::ServerEnd::from_untyped(
1456 ::fidl_next::fuchsia::zx::Channel::from_service_transport(server_end),
1457 )),
1458
1459 _ => unreachable!(),
1460 }
1461 }
1462}
1463
1464#[derive(PartialEq, Debug)]
1466pub struct Device;
1467
1468impl ::fidl_next::Discoverable for Device {
1469 const PROTOCOL_NAME: &'static str = "fuchsia.hardware.pci.Device";
1470}
1471
1472#[cfg(target_os = "fuchsia")]
1473impl ::fidl_next::HasTransport for Device {
1474 type Transport = ::fidl_next::fuchsia::zx::Channel;
1475}
1476
1477pub mod device {
1478 pub mod prelude {
1479 pub use crate::{
1480 Device, DeviceClientHandler, DeviceLocalClientHandler, DeviceLocalServerHandler,
1481 DeviceServerHandler, device,
1482 };
1483
1484 pub use crate::natural::DeviceGetBarRequest;
1485
1486 pub use crate::natural::DeviceGetBtiRequest;
1487
1488 pub use crate::natural::DeviceGetCapabilitiesRequest;
1489
1490 pub use crate::natural::DeviceGetCapabilitiesResponse;
1491
1492 pub use crate::natural::DeviceGetDeviceInfoResponse;
1493
1494 pub use crate::natural::DeviceGetExtendedCapabilitiesRequest;
1495
1496 pub use crate::natural::DeviceGetExtendedCapabilitiesResponse;
1497
1498 pub use crate::natural::DeviceGetInterruptModesResponse;
1499
1500 pub use crate::natural::DeviceMapInterruptRequest;
1501
1502 pub use crate::natural::DeviceReadConfig16Request;
1503
1504 pub use crate::natural::DeviceReadConfig32Request;
1505
1506 pub use crate::natural::DeviceReadConfig8Request;
1507
1508 pub use crate::natural::DeviceSetBusMasteringRequest;
1509
1510 pub use crate::natural::DeviceSetInterruptModeRequest;
1511
1512 pub use crate::natural::DeviceWriteConfig16Request;
1513
1514 pub use crate::natural::DeviceWriteConfig32Request;
1515
1516 pub use crate::natural::DeviceWriteConfig8Request;
1517
1518 pub use crate::natural::DeviceAckInterruptResponse;
1519
1520 pub use crate::natural::DeviceGetBarResponse;
1521
1522 pub use crate::natural::DeviceGetBtiResponse;
1523
1524 pub use crate::natural::DeviceMapInterruptResponse;
1525
1526 pub use crate::natural::DeviceReadConfig16Response;
1527
1528 pub use crate::natural::DeviceReadConfig32Response;
1529
1530 pub use crate::natural::DeviceReadConfig8Response;
1531
1532 pub use crate::natural::DeviceResetDeviceResponse;
1533
1534 pub use crate::natural::DeviceSetBusMasteringResponse;
1535
1536 pub use crate::natural::DeviceSetInterruptModeResponse;
1537
1538 pub use crate::natural::DeviceWriteConfig16Response;
1539
1540 pub use crate::natural::DeviceWriteConfig32Response;
1541
1542 pub use crate::natural::DeviceWriteConfig8Response;
1543 }
1544
1545 pub struct GetDeviceInfo;
1546
1547 impl ::fidl_next::Method for GetDeviceInfo {
1548 const ORDINAL: u64 = 6168191258208672022;
1549 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1550 ::fidl_next::protocol::Flexibility::Strict;
1551
1552 type Protocol = crate::Device;
1553
1554 type Request = ::fidl_next::wire::EmptyMessageBody;
1555 }
1556
1557 impl ::fidl_next::TwoWayMethod for GetDeviceInfo {
1558 type Response = ::fidl_next::wire::Strict<crate::wire::DeviceGetDeviceInfoResponse>;
1559 }
1560
1561 impl<___R> ::fidl_next::Respond<___R> for GetDeviceInfo {
1562 type Output = ::fidl_next::Strict<crate::generic::DeviceGetDeviceInfoResponse<___R>>;
1563
1564 fn respond(response: ___R) -> Self::Output {
1565 ::fidl_next::Strict(crate::generic::DeviceGetDeviceInfoResponse { info: response })
1566 }
1567 }
1568
1569 pub struct GetBar;
1570
1571 impl ::fidl_next::Method for GetBar {
1572 const ORDINAL: u64 = 7721003707982149241;
1573 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1574 ::fidl_next::protocol::Flexibility::Strict;
1575
1576 type Protocol = crate::Device;
1577
1578 type Request = crate::wire::DeviceGetBarRequest;
1579 }
1580
1581 impl ::fidl_next::TwoWayMethod for GetBar {
1582 type Response = ::fidl_next::wire::Result<
1583 'static,
1584 crate::wire::DeviceGetBarResponse<'static>,
1585 ::fidl_next::wire::fuchsia::Status,
1586 >;
1587 }
1588
1589 impl<___R> ::fidl_next::Respond<___R> for GetBar {
1590 type Output = ::core::result::Result<
1591 crate::generic::DeviceGetBarResponse<___R>,
1592 ::fidl_next::never::Never,
1593 >;
1594
1595 fn respond(response: ___R) -> Self::Output {
1596 ::core::result::Result::Ok(crate::generic::DeviceGetBarResponse { result: response })
1597 }
1598 }
1599
1600 impl<___R> ::fidl_next::RespondErr<___R> for GetBar {
1601 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1602
1603 fn respond_err(response: ___R) -> Self::Output {
1604 ::core::result::Result::Err(response)
1605 }
1606 }
1607
1608 pub struct SetBusMastering;
1609
1610 impl ::fidl_next::Method for SetBusMastering {
1611 const ORDINAL: u64 = 3756540713293123587;
1612 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1613 ::fidl_next::protocol::Flexibility::Strict;
1614
1615 type Protocol = crate::Device;
1616
1617 type Request = crate::wire::DeviceSetBusMasteringRequest;
1618 }
1619
1620 impl ::fidl_next::TwoWayMethod for SetBusMastering {
1621 type Response = ::fidl_next::wire::Result<
1622 'static,
1623 crate::wire::DeviceSetBusMasteringResponse,
1624 ::fidl_next::wire::fuchsia::Status,
1625 >;
1626 }
1627
1628 impl<___R> ::fidl_next::Respond<___R> for SetBusMastering {
1629 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1630
1631 fn respond(response: ___R) -> Self::Output {
1632 ::core::result::Result::Ok(response)
1633 }
1634 }
1635
1636 impl<___R> ::fidl_next::RespondErr<___R> for SetBusMastering {
1637 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1638
1639 fn respond_err(response: ___R) -> Self::Output {
1640 ::core::result::Result::Err(response)
1641 }
1642 }
1643
1644 pub struct ResetDevice;
1645
1646 impl ::fidl_next::Method for ResetDevice {
1647 const ORDINAL: u64 = 4349199030852488095;
1648 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1649 ::fidl_next::protocol::Flexibility::Strict;
1650
1651 type Protocol = crate::Device;
1652
1653 type Request = ::fidl_next::wire::EmptyMessageBody;
1654 }
1655
1656 impl ::fidl_next::TwoWayMethod for ResetDevice {
1657 type Response = ::fidl_next::wire::Result<
1658 'static,
1659 crate::wire::DeviceResetDeviceResponse,
1660 ::fidl_next::wire::fuchsia::Status,
1661 >;
1662 }
1663
1664 impl<___R> ::fidl_next::Respond<___R> for ResetDevice {
1665 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1666
1667 fn respond(response: ___R) -> Self::Output {
1668 ::core::result::Result::Ok(response)
1669 }
1670 }
1671
1672 impl<___R> ::fidl_next::RespondErr<___R> for ResetDevice {
1673 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1674
1675 fn respond_err(response: ___R) -> Self::Output {
1676 ::core::result::Result::Err(response)
1677 }
1678 }
1679
1680 pub struct AckInterrupt;
1681
1682 impl ::fidl_next::Method for AckInterrupt {
1683 const ORDINAL: u64 = 8103153737854179947;
1684 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1685 ::fidl_next::protocol::Flexibility::Strict;
1686
1687 type Protocol = crate::Device;
1688
1689 type Request = ::fidl_next::wire::EmptyMessageBody;
1690 }
1691
1692 impl ::fidl_next::TwoWayMethod for AckInterrupt {
1693 type Response = ::fidl_next::wire::Result<
1694 'static,
1695 crate::wire::DeviceAckInterruptResponse,
1696 ::fidl_next::wire::fuchsia::Status,
1697 >;
1698 }
1699
1700 impl<___R> ::fidl_next::Respond<___R> for AckInterrupt {
1701 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1702
1703 fn respond(response: ___R) -> Self::Output {
1704 ::core::result::Result::Ok(response)
1705 }
1706 }
1707
1708 impl<___R> ::fidl_next::RespondErr<___R> for AckInterrupt {
1709 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1710
1711 fn respond_err(response: ___R) -> Self::Output {
1712 ::core::result::Result::Err(response)
1713 }
1714 }
1715
1716 pub struct MapInterrupt;
1717
1718 impl ::fidl_next::Method for MapInterrupt {
1719 const ORDINAL: u64 = 2733403074518448659;
1720 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1721 ::fidl_next::protocol::Flexibility::Strict;
1722
1723 type Protocol = crate::Device;
1724
1725 type Request = crate::wire::DeviceMapInterruptRequest;
1726 }
1727
1728 impl ::fidl_next::TwoWayMethod for MapInterrupt {
1729 type Response = ::fidl_next::wire::Result<
1730 'static,
1731 crate::wire::DeviceMapInterruptResponse,
1732 ::fidl_next::wire::fuchsia::Status,
1733 >;
1734 }
1735
1736 impl<___R> ::fidl_next::Respond<___R> for MapInterrupt {
1737 type Output = ::core::result::Result<
1738 crate::generic::DeviceMapInterruptResponse<___R>,
1739 ::fidl_next::never::Never,
1740 >;
1741
1742 fn respond(response: ___R) -> Self::Output {
1743 ::core::result::Result::Ok(crate::generic::DeviceMapInterruptResponse {
1744 interrupt: response,
1745 })
1746 }
1747 }
1748
1749 impl<___R> ::fidl_next::RespondErr<___R> for MapInterrupt {
1750 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1751
1752 fn respond_err(response: ___R) -> Self::Output {
1753 ::core::result::Result::Err(response)
1754 }
1755 }
1756
1757 pub struct GetInterruptModes;
1758
1759 impl ::fidl_next::Method for GetInterruptModes {
1760 const ORDINAL: u64 = 666335764625137482;
1761 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1762 ::fidl_next::protocol::Flexibility::Strict;
1763
1764 type Protocol = crate::Device;
1765
1766 type Request = ::fidl_next::wire::EmptyMessageBody;
1767 }
1768
1769 impl ::fidl_next::TwoWayMethod for GetInterruptModes {
1770 type Response = ::fidl_next::wire::Strict<crate::wire::DeviceGetInterruptModesResponse>;
1771 }
1772
1773 impl<___R> ::fidl_next::Respond<___R> for GetInterruptModes {
1774 type Output = ::fidl_next::Strict<crate::generic::DeviceGetInterruptModesResponse<___R>>;
1775
1776 fn respond(response: ___R) -> Self::Output {
1777 ::fidl_next::Strict(crate::generic::DeviceGetInterruptModesResponse { modes: response })
1778 }
1779 }
1780
1781 pub struct SetInterruptMode;
1782
1783 impl ::fidl_next::Method for SetInterruptMode {
1784 const ORDINAL: u64 = 602334104497834086;
1785 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1786 ::fidl_next::protocol::Flexibility::Strict;
1787
1788 type Protocol = crate::Device;
1789
1790 type Request = crate::wire::DeviceSetInterruptModeRequest;
1791 }
1792
1793 impl ::fidl_next::TwoWayMethod for SetInterruptMode {
1794 type Response = ::fidl_next::wire::Result<
1795 'static,
1796 crate::wire::DeviceSetInterruptModeResponse,
1797 ::fidl_next::wire::fuchsia::Status,
1798 >;
1799 }
1800
1801 impl<___R> ::fidl_next::Respond<___R> for SetInterruptMode {
1802 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1803
1804 fn respond(response: ___R) -> Self::Output {
1805 ::core::result::Result::Ok(response)
1806 }
1807 }
1808
1809 impl<___R> ::fidl_next::RespondErr<___R> for SetInterruptMode {
1810 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1811
1812 fn respond_err(response: ___R) -> Self::Output {
1813 ::core::result::Result::Err(response)
1814 }
1815 }
1816
1817 pub struct ReadConfig8;
1818
1819 impl ::fidl_next::Method for ReadConfig8 {
1820 const ORDINAL: u64 = 2952650096395541020;
1821 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1822 ::fidl_next::protocol::Flexibility::Strict;
1823
1824 type Protocol = crate::Device;
1825
1826 type Request = crate::wire::DeviceReadConfig8Request;
1827 }
1828
1829 impl ::fidl_next::TwoWayMethod for ReadConfig8 {
1830 type Response = ::fidl_next::wire::Result<
1831 'static,
1832 crate::wire::DeviceReadConfig8Response,
1833 ::fidl_next::wire::fuchsia::Status,
1834 >;
1835 }
1836
1837 impl<___R> ::fidl_next::Respond<___R> for ReadConfig8 {
1838 type Output = ::core::result::Result<
1839 crate::generic::DeviceReadConfig8Response<___R>,
1840 ::fidl_next::never::Never,
1841 >;
1842
1843 fn respond(response: ___R) -> Self::Output {
1844 ::core::result::Result::Ok(crate::generic::DeviceReadConfig8Response {
1845 value: response,
1846 })
1847 }
1848 }
1849
1850 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig8 {
1851 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1852
1853 fn respond_err(response: ___R) -> Self::Output {
1854 ::core::result::Result::Err(response)
1855 }
1856 }
1857
1858 pub struct ReadConfig16;
1859
1860 impl ::fidl_next::Method for ReadConfig16 {
1861 const ORDINAL: u64 = 4309283036617404603;
1862 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1863 ::fidl_next::protocol::Flexibility::Strict;
1864
1865 type Protocol = crate::Device;
1866
1867 type Request = crate::wire::DeviceReadConfig16Request;
1868 }
1869
1870 impl ::fidl_next::TwoWayMethod for ReadConfig16 {
1871 type Response = ::fidl_next::wire::Result<
1872 'static,
1873 crate::wire::DeviceReadConfig16Response,
1874 ::fidl_next::wire::fuchsia::Status,
1875 >;
1876 }
1877
1878 impl<___R> ::fidl_next::Respond<___R> for ReadConfig16 {
1879 type Output = ::core::result::Result<
1880 crate::generic::DeviceReadConfig16Response<___R>,
1881 ::fidl_next::never::Never,
1882 >;
1883
1884 fn respond(response: ___R) -> Self::Output {
1885 ::core::result::Result::Ok(crate::generic::DeviceReadConfig16Response {
1886 value: response,
1887 })
1888 }
1889 }
1890
1891 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig16 {
1892 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1893
1894 fn respond_err(response: ___R) -> Self::Output {
1895 ::core::result::Result::Err(response)
1896 }
1897 }
1898
1899 pub struct ReadConfig32;
1900
1901 impl ::fidl_next::Method for ReadConfig32 {
1902 const ORDINAL: u64 = 6139942538560107783;
1903 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1904 ::fidl_next::protocol::Flexibility::Strict;
1905
1906 type Protocol = crate::Device;
1907
1908 type Request = crate::wire::DeviceReadConfig32Request;
1909 }
1910
1911 impl ::fidl_next::TwoWayMethod for ReadConfig32 {
1912 type Response = ::fidl_next::wire::Result<
1913 'static,
1914 crate::wire::DeviceReadConfig32Response,
1915 ::fidl_next::wire::fuchsia::Status,
1916 >;
1917 }
1918
1919 impl<___R> ::fidl_next::Respond<___R> for ReadConfig32 {
1920 type Output = ::core::result::Result<
1921 crate::generic::DeviceReadConfig32Response<___R>,
1922 ::fidl_next::never::Never,
1923 >;
1924
1925 fn respond(response: ___R) -> Self::Output {
1926 ::core::result::Result::Ok(crate::generic::DeviceReadConfig32Response {
1927 value: response,
1928 })
1929 }
1930 }
1931
1932 impl<___R> ::fidl_next::RespondErr<___R> for ReadConfig32 {
1933 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1934
1935 fn respond_err(response: ___R) -> Self::Output {
1936 ::core::result::Result::Err(response)
1937 }
1938 }
1939
1940 pub struct WriteConfig8;
1941
1942 impl ::fidl_next::Method for WriteConfig8 {
1943 const ORDINAL: u64 = 331585330300009727;
1944 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1945 ::fidl_next::protocol::Flexibility::Strict;
1946
1947 type Protocol = crate::Device;
1948
1949 type Request = crate::wire::DeviceWriteConfig8Request;
1950 }
1951
1952 impl ::fidl_next::TwoWayMethod for WriteConfig8 {
1953 type Response = ::fidl_next::wire::Result<
1954 'static,
1955 crate::wire::DeviceWriteConfig8Response,
1956 ::fidl_next::wire::fuchsia::Status,
1957 >;
1958 }
1959
1960 impl<___R> ::fidl_next::Respond<___R> for WriteConfig8 {
1961 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1962
1963 fn respond(response: ___R) -> Self::Output {
1964 ::core::result::Result::Ok(response)
1965 }
1966 }
1967
1968 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig8 {
1969 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
1970
1971 fn respond_err(response: ___R) -> Self::Output {
1972 ::core::result::Result::Err(response)
1973 }
1974 }
1975
1976 pub struct WriteConfig16;
1977
1978 impl ::fidl_next::Method for WriteConfig16 {
1979 const ORDINAL: u64 = 4481291721614851839;
1980 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
1981 ::fidl_next::protocol::Flexibility::Strict;
1982
1983 type Protocol = crate::Device;
1984
1985 type Request = crate::wire::DeviceWriteConfig16Request;
1986 }
1987
1988 impl ::fidl_next::TwoWayMethod for WriteConfig16 {
1989 type Response = ::fidl_next::wire::Result<
1990 'static,
1991 crate::wire::DeviceWriteConfig16Response,
1992 ::fidl_next::wire::fuchsia::Status,
1993 >;
1994 }
1995
1996 impl<___R> ::fidl_next::Respond<___R> for WriteConfig16 {
1997 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
1998
1999 fn respond(response: ___R) -> Self::Output {
2000 ::core::result::Result::Ok(response)
2001 }
2002 }
2003
2004 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig16 {
2005 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2006
2007 fn respond_err(response: ___R) -> Self::Output {
2008 ::core::result::Result::Err(response)
2009 }
2010 }
2011
2012 pub struct WriteConfig32;
2013
2014 impl ::fidl_next::Method for WriteConfig32 {
2015 const ORDINAL: u64 = 99457760178582408;
2016 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2017 ::fidl_next::protocol::Flexibility::Strict;
2018
2019 type Protocol = crate::Device;
2020
2021 type Request = crate::wire::DeviceWriteConfig32Request;
2022 }
2023
2024 impl ::fidl_next::TwoWayMethod for WriteConfig32 {
2025 type Response = ::fidl_next::wire::Result<
2026 'static,
2027 crate::wire::DeviceWriteConfig32Response,
2028 ::fidl_next::wire::fuchsia::Status,
2029 >;
2030 }
2031
2032 impl<___R> ::fidl_next::Respond<___R> for WriteConfig32 {
2033 type Output = ::core::result::Result<___R, ::fidl_next::never::Never>;
2034
2035 fn respond(response: ___R) -> Self::Output {
2036 ::core::result::Result::Ok(response)
2037 }
2038 }
2039
2040 impl<___R> ::fidl_next::RespondErr<___R> for WriteConfig32 {
2041 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2042
2043 fn respond_err(response: ___R) -> Self::Output {
2044 ::core::result::Result::Err(response)
2045 }
2046 }
2047
2048 pub struct GetCapabilities;
2049
2050 impl ::fidl_next::Method for GetCapabilities {
2051 const ORDINAL: u64 = 4180765276430907919;
2052 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2053 ::fidl_next::protocol::Flexibility::Strict;
2054
2055 type Protocol = crate::Device;
2056
2057 type Request = crate::wire::DeviceGetCapabilitiesRequest;
2058 }
2059
2060 impl ::fidl_next::TwoWayMethod for GetCapabilities {
2061 type Response =
2062 ::fidl_next::wire::Strict<crate::wire::DeviceGetCapabilitiesResponse<'static>>;
2063 }
2064
2065 impl<___R> ::fidl_next::Respond<___R> for GetCapabilities {
2066 type Output = ::fidl_next::Strict<crate::generic::DeviceGetCapabilitiesResponse<___R>>;
2067
2068 fn respond(response: ___R) -> Self::Output {
2069 ::fidl_next::Strict(crate::generic::DeviceGetCapabilitiesResponse { offsets: response })
2070 }
2071 }
2072
2073 pub struct GetExtendedCapabilities;
2074
2075 impl ::fidl_next::Method for GetExtendedCapabilities {
2076 const ORDINAL: u64 = 830197180054506553;
2077 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2078 ::fidl_next::protocol::Flexibility::Strict;
2079
2080 type Protocol = crate::Device;
2081
2082 type Request = crate::wire::DeviceGetExtendedCapabilitiesRequest;
2083 }
2084
2085 impl ::fidl_next::TwoWayMethod for GetExtendedCapabilities {
2086 type Response =
2087 ::fidl_next::wire::Strict<crate::wire::DeviceGetExtendedCapabilitiesResponse<'static>>;
2088 }
2089
2090 impl<___R> ::fidl_next::Respond<___R> for GetExtendedCapabilities {
2091 type Output =
2092 ::fidl_next::Strict<crate::generic::DeviceGetExtendedCapabilitiesResponse<___R>>;
2093
2094 fn respond(response: ___R) -> Self::Output {
2095 ::fidl_next::Strict(crate::generic::DeviceGetExtendedCapabilitiesResponse {
2096 offsets: response,
2097 })
2098 }
2099 }
2100
2101 pub struct GetBti;
2102
2103 impl ::fidl_next::Method for GetBti {
2104 const ORDINAL: u64 = 6795907578404380387;
2105 const FLEXIBILITY: ::fidl_next::protocol::Flexibility =
2106 ::fidl_next::protocol::Flexibility::Strict;
2107
2108 type Protocol = crate::Device;
2109
2110 type Request = crate::wire::DeviceGetBtiRequest;
2111 }
2112
2113 impl ::fidl_next::TwoWayMethod for GetBti {
2114 type Response = ::fidl_next::wire::Result<
2115 'static,
2116 crate::wire::DeviceGetBtiResponse,
2117 ::fidl_next::wire::fuchsia::Status,
2118 >;
2119 }
2120
2121 impl<___R> ::fidl_next::Respond<___R> for GetBti {
2122 type Output = ::core::result::Result<
2123 crate::generic::DeviceGetBtiResponse<___R>,
2124 ::fidl_next::never::Never,
2125 >;
2126
2127 fn respond(response: ___R) -> Self::Output {
2128 ::core::result::Result::Ok(crate::generic::DeviceGetBtiResponse { bti: response })
2129 }
2130 }
2131
2132 impl<___R> ::fidl_next::RespondErr<___R> for GetBti {
2133 type Output = ::core::result::Result<::fidl_next::never::Never, ___R>;
2134
2135 fn respond_err(response: ___R) -> Self::Output {
2136 ::core::result::Result::Err(response)
2137 }
2138 }
2139
2140 mod ___detail {
2141 unsafe impl<___T> ::fidl_next::HasConnectionHandles<___T> for crate::Device
2142 where
2143 ___T: ::fidl_next::Transport,
2144 {
2145 type Client = DeviceClient<___T>;
2146 type Server = DeviceServer<___T>;
2147 }
2148
2149 #[repr(transparent)]
2151 pub struct DeviceClient<___T: ::fidl_next::Transport> {
2152 #[allow(dead_code)]
2153 client: ::fidl_next::protocol::Client<___T>,
2154 }
2155
2156 impl<___T> DeviceClient<___T>
2157 where
2158 ___T: ::fidl_next::Transport,
2159 {
2160 #[doc = " Returns a structure containing device information from the configuration header.\n"]
2161 pub fn get_device_info(
2162 &self,
2163 ) -> ::fidl_next::TwoWayFuture<'_, super::GetDeviceInfo, ___T> {
2164 ::fidl_next::TwoWayFuture::from_untyped(
2165 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2166 6168191258208672022,
2167 <super::GetDeviceInfo as ::fidl_next::Method>::FLEXIBILITY,
2168 (),
2169 ),
2170 )
2171 }
2172
2173 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2174 pub fn get_bar(
2175 &self,
2176
2177 bar_id: impl ::fidl_next::Encode<
2178 ::fidl_next::wire::Uint32,
2179 <___T as ::fidl_next::Transport>::SendBuffer,
2180 >,
2181 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBar, ___T>
2182 where
2183 <___T as ::fidl_next::Transport>::SendBuffer:
2184 ::fidl_next::encoder::InternalHandleEncoder,
2185 {
2186 self.get_bar_with(crate::generic::DeviceGetBarRequest { bar_id })
2187 }
2188
2189 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2190 pub fn get_bar_with<___R>(
2191 &self,
2192 request: ___R,
2193 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBar, ___T>
2194 where
2195 ___R: ::fidl_next::Encode<
2196 crate::wire::DeviceGetBarRequest,
2197 <___T as ::fidl_next::Transport>::SendBuffer,
2198 >,
2199 {
2200 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2201 7721003707982149241,
2202 <super::GetBar as ::fidl_next::Method>::FLEXIBILITY,
2203 request,
2204 ))
2205 }
2206
2207 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2208 pub fn set_bus_mastering(
2209 &self,
2210
2211 enabled: impl ::fidl_next::Encode<bool, <___T as ::fidl_next::Transport>::SendBuffer>,
2212 ) -> ::fidl_next::TwoWayFuture<'_, super::SetBusMastering, ___T>
2213 where
2214 <___T as ::fidl_next::Transport>::SendBuffer:
2215 ::fidl_next::encoder::InternalHandleEncoder,
2216 {
2217 self.set_bus_mastering_with(crate::generic::DeviceSetBusMasteringRequest {
2218 enabled,
2219 })
2220 }
2221
2222 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2223 pub fn set_bus_mastering_with<___R>(
2224 &self,
2225 request: ___R,
2226 ) -> ::fidl_next::TwoWayFuture<'_, super::SetBusMastering, ___T>
2227 where
2228 ___R: ::fidl_next::Encode<
2229 crate::wire::DeviceSetBusMasteringRequest,
2230 <___T as ::fidl_next::Transport>::SendBuffer,
2231 >,
2232 {
2233 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2234 3756540713293123587,
2235 <super::SetBusMastering as ::fidl_next::Method>::FLEXIBILITY,
2236 request,
2237 ))
2238 }
2239
2240 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
2241 pub fn reset_device(&self) -> ::fidl_next::TwoWayFuture<'_, super::ResetDevice, ___T> {
2242 ::fidl_next::TwoWayFuture::from_untyped(
2243 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2244 4349199030852488095,
2245 <super::ResetDevice as ::fidl_next::Method>::FLEXIBILITY,
2246 (),
2247 ),
2248 )
2249 }
2250
2251 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
2252 pub fn ack_interrupt(
2253 &self,
2254 ) -> ::fidl_next::TwoWayFuture<'_, super::AckInterrupt, ___T> {
2255 ::fidl_next::TwoWayFuture::from_untyped(
2256 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2257 8103153737854179947,
2258 <super::AckInterrupt as ::fidl_next::Method>::FLEXIBILITY,
2259 (),
2260 ),
2261 )
2262 }
2263
2264 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2265 pub fn map_interrupt(
2266 &self,
2267
2268 which_irq: impl ::fidl_next::Encode<
2269 ::fidl_next::wire::Uint32,
2270 <___T as ::fidl_next::Transport>::SendBuffer,
2271 >,
2272 ) -> ::fidl_next::TwoWayFuture<'_, super::MapInterrupt, ___T>
2273 where
2274 <___T as ::fidl_next::Transport>::SendBuffer:
2275 ::fidl_next::encoder::InternalHandleEncoder,
2276 {
2277 self.map_interrupt_with(crate::generic::DeviceMapInterruptRequest { which_irq })
2278 }
2279
2280 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2281 pub fn map_interrupt_with<___R>(
2282 &self,
2283 request: ___R,
2284 ) -> ::fidl_next::TwoWayFuture<'_, super::MapInterrupt, ___T>
2285 where
2286 ___R: ::fidl_next::Encode<
2287 crate::wire::DeviceMapInterruptRequest,
2288 <___T as ::fidl_next::Transport>::SendBuffer,
2289 >,
2290 {
2291 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2292 2733403074518448659,
2293 <super::MapInterrupt as ::fidl_next::Method>::FLEXIBILITY,
2294 request,
2295 ))
2296 }
2297
2298 #[doc = " Returns the supported interrupt modes for a device.\n"]
2299 pub fn get_interrupt_modes(
2300 &self,
2301 ) -> ::fidl_next::TwoWayFuture<'_, super::GetInterruptModes, ___T> {
2302 ::fidl_next::TwoWayFuture::from_untyped(
2303 self.client.send_two_way::<::fidl_next::wire::EmptyMessageBody>(
2304 666335764625137482,
2305 <super::GetInterruptModes as ::fidl_next::Method>::FLEXIBILITY,
2306 (),
2307 ),
2308 )
2309 }
2310
2311 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2312 pub fn set_interrupt_mode(
2313 &self,
2314
2315 mode: impl ::fidl_next::Encode<
2316 crate::wire::InterruptMode,
2317 <___T as ::fidl_next::Transport>::SendBuffer,
2318 >,
2319
2320 requested_irq_count: impl ::fidl_next::Encode<
2321 ::fidl_next::wire::Uint32,
2322 <___T as ::fidl_next::Transport>::SendBuffer,
2323 >,
2324 ) -> ::fidl_next::TwoWayFuture<'_, super::SetInterruptMode, ___T>
2325 where
2326 <___T as ::fidl_next::Transport>::SendBuffer:
2327 ::fidl_next::encoder::InternalHandleEncoder,
2328 {
2329 self.set_interrupt_mode_with(crate::generic::DeviceSetInterruptModeRequest {
2330 mode,
2331
2332 requested_irq_count,
2333 })
2334 }
2335
2336 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2337 pub fn set_interrupt_mode_with<___R>(
2338 &self,
2339 request: ___R,
2340 ) -> ::fidl_next::TwoWayFuture<'_, super::SetInterruptMode, ___T>
2341 where
2342 ___R: ::fidl_next::Encode<
2343 crate::wire::DeviceSetInterruptModeRequest,
2344 <___T as ::fidl_next::Transport>::SendBuffer,
2345 >,
2346 {
2347 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2348 602334104497834086,
2349 <super::SetInterruptMode as ::fidl_next::Method>::FLEXIBILITY,
2350 request,
2351 ))
2352 }
2353
2354 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2355 pub fn read_config8(
2356 &self,
2357
2358 offset: impl ::fidl_next::Encode<
2359 ::fidl_next::wire::Uint16,
2360 <___T as ::fidl_next::Transport>::SendBuffer,
2361 >,
2362 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig8, ___T>
2363 where
2364 <___T as ::fidl_next::Transport>::SendBuffer:
2365 ::fidl_next::encoder::InternalHandleEncoder,
2366 {
2367 self.read_config8_with(crate::generic::DeviceReadConfig8Request { offset })
2368 }
2369
2370 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2371 pub fn read_config8_with<___R>(
2372 &self,
2373 request: ___R,
2374 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig8, ___T>
2375 where
2376 ___R: ::fidl_next::Encode<
2377 crate::wire::DeviceReadConfig8Request,
2378 <___T as ::fidl_next::Transport>::SendBuffer,
2379 >,
2380 {
2381 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2382 2952650096395541020,
2383 <super::ReadConfig8 as ::fidl_next::Method>::FLEXIBILITY,
2384 request,
2385 ))
2386 }
2387
2388 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2389 pub fn read_config16(
2390 &self,
2391
2392 offset: impl ::fidl_next::Encode<
2393 ::fidl_next::wire::Uint16,
2394 <___T as ::fidl_next::Transport>::SendBuffer,
2395 >,
2396 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig16, ___T>
2397 where
2398 <___T as ::fidl_next::Transport>::SendBuffer:
2399 ::fidl_next::encoder::InternalHandleEncoder,
2400 {
2401 self.read_config16_with(crate::generic::DeviceReadConfig16Request { offset })
2402 }
2403
2404 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2405 pub fn read_config16_with<___R>(
2406 &self,
2407 request: ___R,
2408 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig16, ___T>
2409 where
2410 ___R: ::fidl_next::Encode<
2411 crate::wire::DeviceReadConfig16Request,
2412 <___T as ::fidl_next::Transport>::SendBuffer,
2413 >,
2414 {
2415 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2416 4309283036617404603,
2417 <super::ReadConfig16 as ::fidl_next::Method>::FLEXIBILITY,
2418 request,
2419 ))
2420 }
2421
2422 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2423 pub fn read_config32(
2424 &self,
2425
2426 offset: impl ::fidl_next::Encode<
2427 ::fidl_next::wire::Uint16,
2428 <___T as ::fidl_next::Transport>::SendBuffer,
2429 >,
2430 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig32, ___T>
2431 where
2432 <___T as ::fidl_next::Transport>::SendBuffer:
2433 ::fidl_next::encoder::InternalHandleEncoder,
2434 {
2435 self.read_config32_with(crate::generic::DeviceReadConfig32Request { offset })
2436 }
2437
2438 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2439 pub fn read_config32_with<___R>(
2440 &self,
2441 request: ___R,
2442 ) -> ::fidl_next::TwoWayFuture<'_, super::ReadConfig32, ___T>
2443 where
2444 ___R: ::fidl_next::Encode<
2445 crate::wire::DeviceReadConfig32Request,
2446 <___T as ::fidl_next::Transport>::SendBuffer,
2447 >,
2448 {
2449 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2450 6139942538560107783,
2451 <super::ReadConfig32 as ::fidl_next::Method>::FLEXIBILITY,
2452 request,
2453 ))
2454 }
2455
2456 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2457 pub fn write_config8(
2458 &self,
2459
2460 offset: impl ::fidl_next::Encode<
2461 ::fidl_next::wire::Uint16,
2462 <___T as ::fidl_next::Transport>::SendBuffer,
2463 >,
2464
2465 value: impl ::fidl_next::Encode<u8, <___T as ::fidl_next::Transport>::SendBuffer>,
2466 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig8, ___T>
2467 where
2468 <___T as ::fidl_next::Transport>::SendBuffer:
2469 ::fidl_next::encoder::InternalHandleEncoder,
2470 {
2471 self.write_config8_with(crate::generic::DeviceWriteConfig8Request { offset, value })
2472 }
2473
2474 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2475 pub fn write_config8_with<___R>(
2476 &self,
2477 request: ___R,
2478 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig8, ___T>
2479 where
2480 ___R: ::fidl_next::Encode<
2481 crate::wire::DeviceWriteConfig8Request,
2482 <___T as ::fidl_next::Transport>::SendBuffer,
2483 >,
2484 {
2485 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2486 331585330300009727,
2487 <super::WriteConfig8 as ::fidl_next::Method>::FLEXIBILITY,
2488 request,
2489 ))
2490 }
2491
2492 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2493 pub fn write_config16(
2494 &self,
2495
2496 offset: impl ::fidl_next::Encode<
2497 ::fidl_next::wire::Uint16,
2498 <___T as ::fidl_next::Transport>::SendBuffer,
2499 >,
2500
2501 value: impl ::fidl_next::Encode<
2502 ::fidl_next::wire::Uint16,
2503 <___T as ::fidl_next::Transport>::SendBuffer,
2504 >,
2505 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig16, ___T>
2506 where
2507 <___T as ::fidl_next::Transport>::SendBuffer:
2508 ::fidl_next::encoder::InternalHandleEncoder,
2509 {
2510 self.write_config16_with(crate::generic::DeviceWriteConfig16Request {
2511 offset,
2512
2513 value,
2514 })
2515 }
2516
2517 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2518 pub fn write_config16_with<___R>(
2519 &self,
2520 request: ___R,
2521 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig16, ___T>
2522 where
2523 ___R: ::fidl_next::Encode<
2524 crate::wire::DeviceWriteConfig16Request,
2525 <___T as ::fidl_next::Transport>::SendBuffer,
2526 >,
2527 {
2528 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2529 4481291721614851839,
2530 <super::WriteConfig16 as ::fidl_next::Method>::FLEXIBILITY,
2531 request,
2532 ))
2533 }
2534
2535 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2536 pub fn write_config32(
2537 &self,
2538
2539 offset: impl ::fidl_next::Encode<
2540 ::fidl_next::wire::Uint16,
2541 <___T as ::fidl_next::Transport>::SendBuffer,
2542 >,
2543
2544 value: impl ::fidl_next::Encode<
2545 ::fidl_next::wire::Uint32,
2546 <___T as ::fidl_next::Transport>::SendBuffer,
2547 >,
2548 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig32, ___T>
2549 where
2550 <___T as ::fidl_next::Transport>::SendBuffer:
2551 ::fidl_next::encoder::InternalHandleEncoder,
2552 {
2553 self.write_config32_with(crate::generic::DeviceWriteConfig32Request {
2554 offset,
2555
2556 value,
2557 })
2558 }
2559
2560 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2561 pub fn write_config32_with<___R>(
2562 &self,
2563 request: ___R,
2564 ) -> ::fidl_next::TwoWayFuture<'_, super::WriteConfig32, ___T>
2565 where
2566 ___R: ::fidl_next::Encode<
2567 crate::wire::DeviceWriteConfig32Request,
2568 <___T as ::fidl_next::Transport>::SendBuffer,
2569 >,
2570 {
2571 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2572 99457760178582408,
2573 <super::WriteConfig32 as ::fidl_next::Method>::FLEXIBILITY,
2574 request,
2575 ))
2576 }
2577
2578 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2579 pub fn get_capabilities(
2580 &self,
2581
2582 id: impl ::fidl_next::Encode<
2583 crate::wire::CapabilityId,
2584 <___T as ::fidl_next::Transport>::SendBuffer,
2585 >,
2586 ) -> ::fidl_next::TwoWayFuture<'_, super::GetCapabilities, ___T>
2587 where
2588 <___T as ::fidl_next::Transport>::SendBuffer:
2589 ::fidl_next::encoder::InternalHandleEncoder,
2590 {
2591 self.get_capabilities_with(crate::generic::DeviceGetCapabilitiesRequest { id })
2592 }
2593
2594 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2595 pub fn get_capabilities_with<___R>(
2596 &self,
2597 request: ___R,
2598 ) -> ::fidl_next::TwoWayFuture<'_, super::GetCapabilities, ___T>
2599 where
2600 ___R: ::fidl_next::Encode<
2601 crate::wire::DeviceGetCapabilitiesRequest,
2602 <___T as ::fidl_next::Transport>::SendBuffer,
2603 >,
2604 {
2605 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2606 4180765276430907919,
2607 <super::GetCapabilities as ::fidl_next::Method>::FLEXIBILITY,
2608 request,
2609 ))
2610 }
2611
2612 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2613 pub fn get_extended_capabilities(
2614 &self,
2615
2616 id: impl ::fidl_next::Encode<
2617 crate::wire::ExtendedCapabilityId,
2618 <___T as ::fidl_next::Transport>::SendBuffer,
2619 >,
2620 ) -> ::fidl_next::TwoWayFuture<'_, super::GetExtendedCapabilities, ___T>
2621 where
2622 <___T as ::fidl_next::Transport>::SendBuffer:
2623 ::fidl_next::encoder::InternalHandleEncoder,
2624 {
2625 self.get_extended_capabilities_with(
2626 crate::generic::DeviceGetExtendedCapabilitiesRequest { id },
2627 )
2628 }
2629
2630 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2631 pub fn get_extended_capabilities_with<___R>(
2632 &self,
2633 request: ___R,
2634 ) -> ::fidl_next::TwoWayFuture<'_, super::GetExtendedCapabilities, ___T>
2635 where
2636 ___R: ::fidl_next::Encode<
2637 crate::wire::DeviceGetExtendedCapabilitiesRequest,
2638 <___T as ::fidl_next::Transport>::SendBuffer,
2639 >,
2640 {
2641 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2642 830197180054506553,
2643 <super::GetExtendedCapabilities as ::fidl_next::Method>::FLEXIBILITY,
2644 request,
2645 ))
2646 }
2647
2648 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2649 pub fn get_bti(
2650 &self,
2651
2652 index: impl ::fidl_next::Encode<
2653 ::fidl_next::wire::Uint32,
2654 <___T as ::fidl_next::Transport>::SendBuffer,
2655 >,
2656 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBti, ___T>
2657 where
2658 <___T as ::fidl_next::Transport>::SendBuffer:
2659 ::fidl_next::encoder::InternalHandleEncoder,
2660 {
2661 self.get_bti_with(crate::generic::DeviceGetBtiRequest { index })
2662 }
2663
2664 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2665 pub fn get_bti_with<___R>(
2666 &self,
2667 request: ___R,
2668 ) -> ::fidl_next::TwoWayFuture<'_, super::GetBti, ___T>
2669 where
2670 ___R: ::fidl_next::Encode<
2671 crate::wire::DeviceGetBtiRequest,
2672 <___T as ::fidl_next::Transport>::SendBuffer,
2673 >,
2674 {
2675 ::fidl_next::TwoWayFuture::from_untyped(self.client.send_two_way(
2676 6795907578404380387,
2677 <super::GetBti as ::fidl_next::Method>::FLEXIBILITY,
2678 request,
2679 ))
2680 }
2681 }
2682
2683 #[repr(transparent)]
2685 pub struct DeviceServer<___T: ::fidl_next::Transport> {
2686 server: ::fidl_next::protocol::Server<___T>,
2687 }
2688
2689 impl<___T> DeviceServer<___T> where ___T: ::fidl_next::Transport {}
2690 }
2691}
2692
2693#[diagnostic::on_unimplemented(
2694 note = "If {Self} implements the non-local DeviceClientHandler trait, use `spawn_as_local` or the `Local` adapter type"
2695)]
2696
2697pub trait DeviceLocalClientHandler<
2701 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
2702 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
2703>
2704{
2705}
2706
2707impl<___H, ___T> ::fidl_next::DispatchLocalClientMessage<___H, ___T> for Device
2708where
2709 ___H: DeviceLocalClientHandler<___T>,
2710 ___T: ::fidl_next::Transport,
2711{
2712 async fn on_event(
2713 handler: &mut ___H,
2714 mut message: ::fidl_next::Message<___T>,
2715 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
2716 match *message.header().ordinal {
2717 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
2718 }
2719 }
2720}
2721
2722#[diagnostic::on_unimplemented(
2723 note = "If {Self} implements the non-local DeviceServerHandler trait, use `spawn_as_local` or the `Local` adapter type"
2724)]
2725
2726pub trait DeviceLocalServerHandler<
2730 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
2731 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
2732>
2733{
2734 #[doc = " Returns a structure containing device information from the configuration header.\n"]
2735 fn get_device_info(
2736 &mut self,
2737
2738 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
2739 ) -> impl ::core::future::Future<Output = ()>;
2740
2741 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
2742 fn get_bar(
2743 &mut self,
2744
2745 request: ::fidl_next::Request<device::GetBar, ___T>,
2746
2747 responder: ::fidl_next::Responder<device::GetBar, ___T>,
2748 ) -> impl ::core::future::Future<Output = ()>;
2749
2750 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
2751 fn set_bus_mastering(
2752 &mut self,
2753
2754 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
2755
2756 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
2757 ) -> impl ::core::future::Future<Output = ()>;
2758
2759 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
2760 fn reset_device(
2761 &mut self,
2762
2763 responder: ::fidl_next::Responder<device::ResetDevice, ___T>,
2764 ) -> impl ::core::future::Future<Output = ()>;
2765
2766 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
2767 fn ack_interrupt(
2768 &mut self,
2769
2770 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
2771 ) -> impl ::core::future::Future<Output = ()>;
2772
2773 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
2774 fn map_interrupt(
2775 &mut self,
2776
2777 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
2778
2779 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
2780 ) -> impl ::core::future::Future<Output = ()>;
2781
2782 #[doc = " Returns the supported interrupt modes for a device.\n"]
2783 fn get_interrupt_modes(
2784 &mut self,
2785
2786 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
2787 ) -> impl ::core::future::Future<Output = ()>;
2788
2789 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
2790 fn set_interrupt_mode(
2791 &mut self,
2792
2793 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
2794
2795 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
2796 ) -> impl ::core::future::Future<Output = ()>;
2797
2798 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2799 fn read_config8(
2800 &mut self,
2801
2802 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
2803
2804 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
2805 ) -> impl ::core::future::Future<Output = ()>;
2806
2807 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2808 fn read_config16(
2809 &mut self,
2810
2811 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
2812
2813 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
2814 ) -> impl ::core::future::Future<Output = ()>;
2815
2816 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2817 fn read_config32(
2818 &mut self,
2819
2820 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
2821
2822 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
2823 ) -> impl ::core::future::Future<Output = ()>;
2824
2825 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2826 fn write_config8(
2827 &mut self,
2828
2829 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
2830
2831 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
2832 ) -> impl ::core::future::Future<Output = ()>;
2833
2834 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2835 fn write_config16(
2836 &mut self,
2837
2838 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
2839
2840 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
2841 ) -> impl ::core::future::Future<Output = ()>;
2842
2843 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
2844 fn write_config32(
2845 &mut self,
2846
2847 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
2848
2849 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
2850 ) -> impl ::core::future::Future<Output = ()>;
2851
2852 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
2853 fn get_capabilities(
2854 &mut self,
2855
2856 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
2857
2858 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
2859 ) -> impl ::core::future::Future<Output = ()>;
2860
2861 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
2862 fn get_extended_capabilities(
2863 &mut self,
2864
2865 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
2866
2867 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
2868 ) -> impl ::core::future::Future<Output = ()>;
2869
2870 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
2871 fn get_bti(
2872 &mut self,
2873
2874 request: ::fidl_next::Request<device::GetBti, ___T>,
2875
2876 responder: ::fidl_next::Responder<device::GetBti, ___T>,
2877 ) -> impl ::core::future::Future<Output = ()>;
2878}
2879
2880impl<___H, ___T> ::fidl_next::DispatchLocalServerMessage<___H, ___T> for Device
2881where
2882 ___H: DeviceLocalServerHandler<___T>,
2883 ___T: ::fidl_next::Transport,
2884 for<'de> crate::wire::DeviceGetBarRequest: ::fidl_next::Decode<
2885 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2886 Constraint = (),
2887 >,
2888 for<'de> crate::wire::DeviceSetBusMasteringRequest: ::fidl_next::Decode<
2889 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2890 Constraint = (),
2891 >,
2892 for<'de> crate::wire::DeviceMapInterruptRequest: ::fidl_next::Decode<
2893 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2894 Constraint = (),
2895 >,
2896 for<'de> crate::wire::DeviceSetInterruptModeRequest: ::fidl_next::Decode<
2897 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2898 Constraint = (),
2899 >,
2900 for<'de> crate::wire::DeviceReadConfig8Request: ::fidl_next::Decode<
2901 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2902 Constraint = (),
2903 >,
2904 for<'de> crate::wire::DeviceReadConfig16Request: ::fidl_next::Decode<
2905 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2906 Constraint = (),
2907 >,
2908 for<'de> crate::wire::DeviceReadConfig32Request: ::fidl_next::Decode<
2909 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2910 Constraint = (),
2911 >,
2912 for<'de> crate::wire::DeviceWriteConfig8Request: ::fidl_next::Decode<
2913 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2914 Constraint = (),
2915 >,
2916 for<'de> crate::wire::DeviceWriteConfig16Request: ::fidl_next::Decode<
2917 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2918 Constraint = (),
2919 >,
2920 for<'de> crate::wire::DeviceWriteConfig32Request: ::fidl_next::Decode<
2921 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2922 Constraint = (),
2923 >,
2924 for<'de> crate::wire::DeviceGetCapabilitiesRequest: ::fidl_next::Decode<
2925 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2926 Constraint = (),
2927 >,
2928 for<'de> crate::wire::DeviceGetExtendedCapabilitiesRequest: ::fidl_next::Decode<
2929 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2930 Constraint = (),
2931 >,
2932 for<'de> crate::wire::DeviceGetBtiRequest: ::fidl_next::Decode<
2933 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
2934 Constraint = (),
2935 >,
2936{
2937 async fn on_one_way(
2938 handler: &mut ___H,
2939 mut message: ::fidl_next::Message<___T>,
2940 ) -> ::core::result::Result<
2941 (),
2942 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
2943 > {
2944 match *message.header().ordinal {
2945 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
2946 }
2947 }
2948
2949 async fn on_two_way(
2950 handler: &mut ___H,
2951 mut message: ::fidl_next::Message<___T>,
2952 responder: ::fidl_next::protocol::Responder<___T>,
2953 ) -> ::core::result::Result<
2954 (),
2955 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
2956 > {
2957 match *message.header().ordinal {
2958 6168191258208672022 => {
2959 let responder = ::fidl_next::Responder::from_untyped(responder);
2960
2961 handler.get_device_info(responder).await;
2962 Ok(())
2963 }
2964
2965 7721003707982149241 => {
2966 let responder = ::fidl_next::Responder::from_untyped(responder);
2967
2968 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2969 Ok(decoded) => {
2970 handler
2971 .get_bar(::fidl_next::Request::from_decoded(decoded), responder)
2972 .await;
2973 Ok(())
2974 }
2975 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2976 ordinal: 7721003707982149241,
2977 error,
2978 }),
2979 }
2980 }
2981
2982 3756540713293123587 => {
2983 let responder = ::fidl_next::Responder::from_untyped(responder);
2984
2985 match ::fidl_next::AsDecoderExt::into_decoded(message) {
2986 Ok(decoded) => {
2987 handler
2988 .set_bus_mastering(
2989 ::fidl_next::Request::from_decoded(decoded),
2990 responder,
2991 )
2992 .await;
2993 Ok(())
2994 }
2995 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
2996 ordinal: 3756540713293123587,
2997 error,
2998 }),
2999 }
3000 }
3001
3002 4349199030852488095 => {
3003 let responder = ::fidl_next::Responder::from_untyped(responder);
3004
3005 handler.reset_device(responder).await;
3006 Ok(())
3007 }
3008
3009 8103153737854179947 => {
3010 let responder = ::fidl_next::Responder::from_untyped(responder);
3011
3012 handler.ack_interrupt(responder).await;
3013 Ok(())
3014 }
3015
3016 2733403074518448659 => {
3017 let responder = ::fidl_next::Responder::from_untyped(responder);
3018
3019 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3020 Ok(decoded) => {
3021 handler
3022 .map_interrupt(::fidl_next::Request::from_decoded(decoded), responder)
3023 .await;
3024 Ok(())
3025 }
3026 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3027 ordinal: 2733403074518448659,
3028 error,
3029 }),
3030 }
3031 }
3032
3033 666335764625137482 => {
3034 let responder = ::fidl_next::Responder::from_untyped(responder);
3035
3036 handler.get_interrupt_modes(responder).await;
3037 Ok(())
3038 }
3039
3040 602334104497834086 => {
3041 let responder = ::fidl_next::Responder::from_untyped(responder);
3042
3043 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3044 Ok(decoded) => {
3045 handler
3046 .set_interrupt_mode(
3047 ::fidl_next::Request::from_decoded(decoded),
3048 responder,
3049 )
3050 .await;
3051 Ok(())
3052 }
3053 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3054 ordinal: 602334104497834086,
3055 error,
3056 }),
3057 }
3058 }
3059
3060 2952650096395541020 => {
3061 let responder = ::fidl_next::Responder::from_untyped(responder);
3062
3063 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3064 Ok(decoded) => {
3065 handler
3066 .read_config8(::fidl_next::Request::from_decoded(decoded), responder)
3067 .await;
3068 Ok(())
3069 }
3070 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3071 ordinal: 2952650096395541020,
3072 error,
3073 }),
3074 }
3075 }
3076
3077 4309283036617404603 => {
3078 let responder = ::fidl_next::Responder::from_untyped(responder);
3079
3080 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3081 Ok(decoded) => {
3082 handler
3083 .read_config16(::fidl_next::Request::from_decoded(decoded), responder)
3084 .await;
3085 Ok(())
3086 }
3087 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3088 ordinal: 4309283036617404603,
3089 error,
3090 }),
3091 }
3092 }
3093
3094 6139942538560107783 => {
3095 let responder = ::fidl_next::Responder::from_untyped(responder);
3096
3097 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3098 Ok(decoded) => {
3099 handler
3100 .read_config32(::fidl_next::Request::from_decoded(decoded), responder)
3101 .await;
3102 Ok(())
3103 }
3104 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3105 ordinal: 6139942538560107783,
3106 error,
3107 }),
3108 }
3109 }
3110
3111 331585330300009727 => {
3112 let responder = ::fidl_next::Responder::from_untyped(responder);
3113
3114 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3115 Ok(decoded) => {
3116 handler
3117 .write_config8(::fidl_next::Request::from_decoded(decoded), responder)
3118 .await;
3119 Ok(())
3120 }
3121 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3122 ordinal: 331585330300009727,
3123 error,
3124 }),
3125 }
3126 }
3127
3128 4481291721614851839 => {
3129 let responder = ::fidl_next::Responder::from_untyped(responder);
3130
3131 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3132 Ok(decoded) => {
3133 handler
3134 .write_config16(::fidl_next::Request::from_decoded(decoded), responder)
3135 .await;
3136 Ok(())
3137 }
3138 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3139 ordinal: 4481291721614851839,
3140 error,
3141 }),
3142 }
3143 }
3144
3145 99457760178582408 => {
3146 let responder = ::fidl_next::Responder::from_untyped(responder);
3147
3148 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3149 Ok(decoded) => {
3150 handler
3151 .write_config32(::fidl_next::Request::from_decoded(decoded), responder)
3152 .await;
3153 Ok(())
3154 }
3155 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3156 ordinal: 99457760178582408,
3157 error,
3158 }),
3159 }
3160 }
3161
3162 4180765276430907919 => {
3163 let responder = ::fidl_next::Responder::from_untyped(responder);
3164
3165 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3166 Ok(decoded) => {
3167 handler
3168 .get_capabilities(
3169 ::fidl_next::Request::from_decoded(decoded),
3170 responder,
3171 )
3172 .await;
3173 Ok(())
3174 }
3175 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3176 ordinal: 4180765276430907919,
3177 error,
3178 }),
3179 }
3180 }
3181
3182 830197180054506553 => {
3183 let responder = ::fidl_next::Responder::from_untyped(responder);
3184
3185 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3186 Ok(decoded) => {
3187 handler
3188 .get_extended_capabilities(
3189 ::fidl_next::Request::from_decoded(decoded),
3190 responder,
3191 )
3192 .await;
3193 Ok(())
3194 }
3195 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3196 ordinal: 830197180054506553,
3197 error,
3198 }),
3199 }
3200 }
3201
3202 6795907578404380387 => {
3203 let responder = ::fidl_next::Responder::from_untyped(responder);
3204
3205 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3206 Ok(decoded) => {
3207 handler
3208 .get_bti(::fidl_next::Request::from_decoded(decoded), responder)
3209 .await;
3210 Ok(())
3211 }
3212 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3213 ordinal: 6795907578404380387,
3214 error,
3215 }),
3216 }
3217 }
3218
3219 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3220 }
3221 }
3222}
3223
3224pub trait DeviceClientHandler<
3228 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
3229 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
3230>
3231{
3232}
3233
3234impl<___H, ___T> ::fidl_next::DispatchClientMessage<___H, ___T> for Device
3235where
3236 ___H: DeviceClientHandler<___T> + ::core::marker::Send,
3237 ___T: ::fidl_next::Transport,
3238{
3239 async fn on_event(
3240 handler: &mut ___H,
3241 mut message: ::fidl_next::Message<___T>,
3242 ) -> ::core::result::Result<(), ::fidl_next::ProtocolError<___T::Error>> {
3243 match *message.header().ordinal {
3244 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3245 }
3246 }
3247}
3248
3249pub trait DeviceServerHandler<
3253 #[cfg(target_os = "fuchsia")] ___T: ::fidl_next::Transport = ::fidl_next::fuchsia::zx::Channel,
3254 #[cfg(not(target_os = "fuchsia"))] ___T: ::fidl_next::Transport,
3255>
3256{
3257 #[doc = " Returns a structure containing device information from the configuration header.\n"]
3258 fn get_device_info(
3259 &mut self,
3260
3261 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
3262 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3263
3264 #[doc = " Retrieves information for a specified Base Address Register (BAR). If the BAR contains\n MSI-X capability tables then an attempt will be made to return an MMIO region excluding\n those tables, if possible. Otherwise, an error will be returned.\n\n Parameters:\n |bar_id|: The id of the BAR being requested. Valid range is [0, 6).\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to\n the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method.\n |ZX_ERR_INTERNAL|: A bus driver error has occurred.\n |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range.\n |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.\n"]
3265 fn get_bar(
3266 &mut self,
3267
3268 request: ::fidl_next::Request<device::GetBar, ___T>,
3269
3270 responder: ::fidl_next::Responder<device::GetBar, ___T>,
3271 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3272
3273 #[doc = " Enables or disables the bus mastering capability for the device.\n\n Parameters:\n |enable|: true to enable bus mastering, false to disable.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.\n"]
3274 fn set_bus_mastering(
3275 &mut self,
3276
3277 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
3278
3279 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
3280 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3281
3282 #[doc = " Initiates a function level reset for the device. This is a synchronous\n operation that will not return ontil the reset is complete. Interrupt\n operation of the device must be disabled before initiating a reset.\n\n Errors:\n |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|.\n |ZX_ERR_NOT_SUPPORTED|: The device does not support reset.\n |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the\n expected amount of time and is presumed to no longer be operating\n properly.\n"]
3283 fn reset_device(
3284 &mut self,
3285
3286 responder: ::fidl_next::Responder<device::ResetDevice, ___T>,
3287 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3288
3289 #[doc = " Alerts the bus driver to deassert the raised legacy interrupt so that it\n may be waited on again. Only used if |SetInterruptMode| was called with\n |PCI_INTERRUPT_MODE_LEGACY|.\n\n Errors:\n |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.\n"]
3290 fn ack_interrupt(
3291 &mut self,
3292
3293 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
3294 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3295
3296 #[doc = " Maps a device\'s interrupt to a zx:interrupt. The device\'s interrupt mode\n must already be configured with |SetInterruptMode|, and |which_irq| must\n be >= to the number of interrupts reported for that interrupt mode by\n |GetInterruptModes|. A Legacy interrupt may be mapped multiple times,\n but the handles will point to the same interrupt object. MSI & MSI-X\n interrupts may only have one outstanding mapping at a time per\n interrupt. Outstanding MSI & MSI-X interrupt handles must be closed\n before attempting to change the interrupt mode in a subsequent call to\n |SetInterruptMode|.\n\n Parameters:\n |which_irq|: The id of the interrupt to map.\n\n Errors:\n |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is\n already mapped to a valid handle.\n |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device.\n |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.\n"]
3297 fn map_interrupt(
3298 &mut self,
3299
3300 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
3301
3302 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
3303 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3304
3305 #[doc = " Returns the supported interrupt modes for a device.\n"]
3306 fn get_interrupt_modes(
3307 &mut self,
3308
3309 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
3310 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3311
3312 #[doc = " Configures the interrupt mode for a device. When changing from one\n interrupt mode to another the driver must ensure existing interrupt\n handles are closed beforehand.\n\n Parameters:\n |mode|: The |InterruptMode| to request from the bus driver.\n |requested_irq_count|: The number of interrupts requested.\n\n Errors:\n |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while\n existing handles to mapped MSIs exist.\n |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0.\n |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.\n"]
3313 fn set_interrupt_mode(
3314 &mut self,
3315
3316 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
3317
3318 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
3319 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3320
3321 #[doc = " Reads a byte from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3322 fn read_config8(
3323 &mut self,
3324
3325 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
3326
3327 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
3328 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3329
3330 #[doc = " Reads two bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3331 fn read_config16(
3332 &mut self,
3333
3334 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
3335
3336 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
3337 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3338
3339 #[doc = " Reads four bytes from the device\'s configuration space. |Offset| must be\n within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a\n device will be PCIe.\n\n Parameters:\n |offset|: The offset into the device\'s configuration space to read.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3340 fn read_config32(
3341 &mut self,
3342
3343 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
3344
3345 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
3346 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3347
3348 #[doc = " Writes a byte to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40,\n 0xFFF] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3349 fn write_config8(
3350 &mut self,
3351
3352 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
3353
3354 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
3355 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3356
3357 #[doc = " Writes two bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40,\n 0xFFE] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3358 fn write_config16(
3359 &mut self,
3360
3361 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
3362
3363 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
3364 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3365
3366 #[doc = " Writes four bytes to the device\'s configuration space. The acceptable\n ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40,\n 0xFFC] if PCIe. For most purposes a device will be PCIe.\n\n\n Parameters\n |offset|: The offset into the device\'s configuration space to read.\n |value|: The value to write.\n\n Errors:\n |ZX_ERR_ACCESS_DENIED|: |offset| is within the device\'s configuration header.\n |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.\n"]
3367 fn write_config32(
3368 &mut self,
3369
3370 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
3371
3372 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
3373 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3374
3375 #[doc = " Returns a vector of offsets in configuration space corresponding to\n capabilities matching the provided capability |id|. If no corresponding\n match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for.\n"]
3376 fn get_capabilities(
3377 &mut self,
3378
3379 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
3380
3381 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
3382 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3383
3384 #[doc = " Returns a vector of offsets in configuration space corresponding to\n extended capabilities matching the provided extended capability |id|.\n If no corresponding match is found then the vector will be empty.\n\n Parameters:\n |id|: the capability id to search for\n"]
3385 fn get_extended_capabilities(
3386 &mut self,
3387
3388 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
3389
3390 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
3391 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3392
3393 #[doc = " Returns the Bus Transaction Intiator (BTI) at a given index for the device.\n\n Parameters:\n |index|: the BTI to request.\n\n Errors:\n |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.\n"]
3394 fn get_bti(
3395 &mut self,
3396
3397 request: ::fidl_next::Request<device::GetBti, ___T>,
3398
3399 responder: ::fidl_next::Responder<device::GetBti, ___T>,
3400 ) -> impl ::core::future::Future<Output = ()> + ::core::marker::Send;
3401}
3402
3403impl<___H, ___T> ::fidl_next::DispatchServerMessage<___H, ___T> for Device
3404where
3405 ___H: DeviceServerHandler<___T> + ::core::marker::Send,
3406 ___T: ::fidl_next::Transport,
3407 for<'de> crate::wire::DeviceGetBarRequest: ::fidl_next::Decode<
3408 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3409 Constraint = (),
3410 >,
3411 for<'de> crate::wire::DeviceSetBusMasteringRequest: ::fidl_next::Decode<
3412 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3413 Constraint = (),
3414 >,
3415 for<'de> crate::wire::DeviceMapInterruptRequest: ::fidl_next::Decode<
3416 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3417 Constraint = (),
3418 >,
3419 for<'de> crate::wire::DeviceSetInterruptModeRequest: ::fidl_next::Decode<
3420 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3421 Constraint = (),
3422 >,
3423 for<'de> crate::wire::DeviceReadConfig8Request: ::fidl_next::Decode<
3424 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3425 Constraint = (),
3426 >,
3427 for<'de> crate::wire::DeviceReadConfig16Request: ::fidl_next::Decode<
3428 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3429 Constraint = (),
3430 >,
3431 for<'de> crate::wire::DeviceReadConfig32Request: ::fidl_next::Decode<
3432 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3433 Constraint = (),
3434 >,
3435 for<'de> crate::wire::DeviceWriteConfig8Request: ::fidl_next::Decode<
3436 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3437 Constraint = (),
3438 >,
3439 for<'de> crate::wire::DeviceWriteConfig16Request: ::fidl_next::Decode<
3440 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3441 Constraint = (),
3442 >,
3443 for<'de> crate::wire::DeviceWriteConfig32Request: ::fidl_next::Decode<
3444 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3445 Constraint = (),
3446 >,
3447 for<'de> crate::wire::DeviceGetCapabilitiesRequest: ::fidl_next::Decode<
3448 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3449 Constraint = (),
3450 >,
3451 for<'de> crate::wire::DeviceGetExtendedCapabilitiesRequest: ::fidl_next::Decode<
3452 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3453 Constraint = (),
3454 >,
3455 for<'de> crate::wire::DeviceGetBtiRequest: ::fidl_next::Decode<
3456 <<___T as ::fidl_next::Transport>::RecvBuffer as ::fidl_next::AsDecoder<'de>>::Decoder,
3457 Constraint = (),
3458 >,
3459{
3460 async fn on_one_way(
3461 handler: &mut ___H,
3462 mut message: ::fidl_next::Message<___T>,
3463 ) -> ::core::result::Result<
3464 (),
3465 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3466 > {
3467 match *message.header().ordinal {
3468 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3469 }
3470 }
3471
3472 async fn on_two_way(
3473 handler: &mut ___H,
3474 mut message: ::fidl_next::Message<___T>,
3475 responder: ::fidl_next::protocol::Responder<___T>,
3476 ) -> ::core::result::Result<
3477 (),
3478 ::fidl_next::ProtocolError<<___T as ::fidl_next::Transport>::Error>,
3479 > {
3480 match *message.header().ordinal {
3481 6168191258208672022 => {
3482 let responder = ::fidl_next::Responder::from_untyped(responder);
3483
3484 handler.get_device_info(responder).await;
3485 Ok(())
3486 }
3487
3488 7721003707982149241 => {
3489 let responder = ::fidl_next::Responder::from_untyped(responder);
3490
3491 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3492 Ok(decoded) => {
3493 handler
3494 .get_bar(::fidl_next::Request::from_decoded(decoded), responder)
3495 .await;
3496 Ok(())
3497 }
3498 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3499 ordinal: 7721003707982149241,
3500 error,
3501 }),
3502 }
3503 }
3504
3505 3756540713293123587 => {
3506 let responder = ::fidl_next::Responder::from_untyped(responder);
3507
3508 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3509 Ok(decoded) => {
3510 handler
3511 .set_bus_mastering(
3512 ::fidl_next::Request::from_decoded(decoded),
3513 responder,
3514 )
3515 .await;
3516 Ok(())
3517 }
3518 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3519 ordinal: 3756540713293123587,
3520 error,
3521 }),
3522 }
3523 }
3524
3525 4349199030852488095 => {
3526 let responder = ::fidl_next::Responder::from_untyped(responder);
3527
3528 handler.reset_device(responder).await;
3529 Ok(())
3530 }
3531
3532 8103153737854179947 => {
3533 let responder = ::fidl_next::Responder::from_untyped(responder);
3534
3535 handler.ack_interrupt(responder).await;
3536 Ok(())
3537 }
3538
3539 2733403074518448659 => {
3540 let responder = ::fidl_next::Responder::from_untyped(responder);
3541
3542 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3543 Ok(decoded) => {
3544 handler
3545 .map_interrupt(::fidl_next::Request::from_decoded(decoded), responder)
3546 .await;
3547 Ok(())
3548 }
3549 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3550 ordinal: 2733403074518448659,
3551 error,
3552 }),
3553 }
3554 }
3555
3556 666335764625137482 => {
3557 let responder = ::fidl_next::Responder::from_untyped(responder);
3558
3559 handler.get_interrupt_modes(responder).await;
3560 Ok(())
3561 }
3562
3563 602334104497834086 => {
3564 let responder = ::fidl_next::Responder::from_untyped(responder);
3565
3566 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3567 Ok(decoded) => {
3568 handler
3569 .set_interrupt_mode(
3570 ::fidl_next::Request::from_decoded(decoded),
3571 responder,
3572 )
3573 .await;
3574 Ok(())
3575 }
3576 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3577 ordinal: 602334104497834086,
3578 error,
3579 }),
3580 }
3581 }
3582
3583 2952650096395541020 => {
3584 let responder = ::fidl_next::Responder::from_untyped(responder);
3585
3586 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3587 Ok(decoded) => {
3588 handler
3589 .read_config8(::fidl_next::Request::from_decoded(decoded), responder)
3590 .await;
3591 Ok(())
3592 }
3593 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3594 ordinal: 2952650096395541020,
3595 error,
3596 }),
3597 }
3598 }
3599
3600 4309283036617404603 => {
3601 let responder = ::fidl_next::Responder::from_untyped(responder);
3602
3603 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3604 Ok(decoded) => {
3605 handler
3606 .read_config16(::fidl_next::Request::from_decoded(decoded), responder)
3607 .await;
3608 Ok(())
3609 }
3610 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3611 ordinal: 4309283036617404603,
3612 error,
3613 }),
3614 }
3615 }
3616
3617 6139942538560107783 => {
3618 let responder = ::fidl_next::Responder::from_untyped(responder);
3619
3620 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3621 Ok(decoded) => {
3622 handler
3623 .read_config32(::fidl_next::Request::from_decoded(decoded), responder)
3624 .await;
3625 Ok(())
3626 }
3627 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3628 ordinal: 6139942538560107783,
3629 error,
3630 }),
3631 }
3632 }
3633
3634 331585330300009727 => {
3635 let responder = ::fidl_next::Responder::from_untyped(responder);
3636
3637 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3638 Ok(decoded) => {
3639 handler
3640 .write_config8(::fidl_next::Request::from_decoded(decoded), responder)
3641 .await;
3642 Ok(())
3643 }
3644 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3645 ordinal: 331585330300009727,
3646 error,
3647 }),
3648 }
3649 }
3650
3651 4481291721614851839 => {
3652 let responder = ::fidl_next::Responder::from_untyped(responder);
3653
3654 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3655 Ok(decoded) => {
3656 handler
3657 .write_config16(::fidl_next::Request::from_decoded(decoded), responder)
3658 .await;
3659 Ok(())
3660 }
3661 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3662 ordinal: 4481291721614851839,
3663 error,
3664 }),
3665 }
3666 }
3667
3668 99457760178582408 => {
3669 let responder = ::fidl_next::Responder::from_untyped(responder);
3670
3671 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3672 Ok(decoded) => {
3673 handler
3674 .write_config32(::fidl_next::Request::from_decoded(decoded), responder)
3675 .await;
3676 Ok(())
3677 }
3678 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3679 ordinal: 99457760178582408,
3680 error,
3681 }),
3682 }
3683 }
3684
3685 4180765276430907919 => {
3686 let responder = ::fidl_next::Responder::from_untyped(responder);
3687
3688 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3689 Ok(decoded) => {
3690 handler
3691 .get_capabilities(
3692 ::fidl_next::Request::from_decoded(decoded),
3693 responder,
3694 )
3695 .await;
3696 Ok(())
3697 }
3698 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3699 ordinal: 4180765276430907919,
3700 error,
3701 }),
3702 }
3703 }
3704
3705 830197180054506553 => {
3706 let responder = ::fidl_next::Responder::from_untyped(responder);
3707
3708 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3709 Ok(decoded) => {
3710 handler
3711 .get_extended_capabilities(
3712 ::fidl_next::Request::from_decoded(decoded),
3713 responder,
3714 )
3715 .await;
3716 Ok(())
3717 }
3718 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3719 ordinal: 830197180054506553,
3720 error,
3721 }),
3722 }
3723 }
3724
3725 6795907578404380387 => {
3726 let responder = ::fidl_next::Responder::from_untyped(responder);
3727
3728 match ::fidl_next::AsDecoderExt::into_decoded(message) {
3729 Ok(decoded) => {
3730 handler
3731 .get_bti(::fidl_next::Request::from_decoded(decoded), responder)
3732 .await;
3733 Ok(())
3734 }
3735 Err(error) => Err(::fidl_next::ProtocolError::InvalidMessage {
3736 ordinal: 6795907578404380387,
3737 error,
3738 }),
3739 }
3740 }
3741
3742 ordinal => Err(::fidl_next::ProtocolError::UnknownOrdinal(ordinal)),
3743 }
3744 }
3745}
3746
3747impl<___T> DeviceClientHandler<___T> for ::fidl_next::IgnoreEvents where ___T: ::fidl_next::Transport
3748{}
3749
3750impl<___H, ___T> DeviceLocalClientHandler<___T> for ::fidl_next::Local<___H>
3751where
3752 ___H: DeviceClientHandler<___T>,
3753 ___T: ::fidl_next::Transport,
3754{
3755}
3756
3757impl<___H, ___T> DeviceLocalServerHandler<___T> for ::fidl_next::Local<___H>
3758where
3759 ___H: DeviceServerHandler<___T>,
3760 ___T: ::fidl_next::Transport,
3761{
3762 async fn get_device_info(
3763 &mut self,
3764
3765 responder: ::fidl_next::Responder<device::GetDeviceInfo, ___T>,
3766 ) {
3767 ___H::get_device_info(&mut self.0, responder).await
3768 }
3769
3770 async fn get_bar(
3771 &mut self,
3772
3773 request: ::fidl_next::Request<device::GetBar, ___T>,
3774
3775 responder: ::fidl_next::Responder<device::GetBar, ___T>,
3776 ) {
3777 ___H::get_bar(&mut self.0, request, responder).await
3778 }
3779
3780 async fn set_bus_mastering(
3781 &mut self,
3782
3783 request: ::fidl_next::Request<device::SetBusMastering, ___T>,
3784
3785 responder: ::fidl_next::Responder<device::SetBusMastering, ___T>,
3786 ) {
3787 ___H::set_bus_mastering(&mut self.0, request, responder).await
3788 }
3789
3790 async fn reset_device(&mut self, responder: ::fidl_next::Responder<device::ResetDevice, ___T>) {
3791 ___H::reset_device(&mut self.0, responder).await
3792 }
3793
3794 async fn ack_interrupt(
3795 &mut self,
3796
3797 responder: ::fidl_next::Responder<device::AckInterrupt, ___T>,
3798 ) {
3799 ___H::ack_interrupt(&mut self.0, responder).await
3800 }
3801
3802 async fn map_interrupt(
3803 &mut self,
3804
3805 request: ::fidl_next::Request<device::MapInterrupt, ___T>,
3806
3807 responder: ::fidl_next::Responder<device::MapInterrupt, ___T>,
3808 ) {
3809 ___H::map_interrupt(&mut self.0, request, responder).await
3810 }
3811
3812 async fn get_interrupt_modes(
3813 &mut self,
3814
3815 responder: ::fidl_next::Responder<device::GetInterruptModes, ___T>,
3816 ) {
3817 ___H::get_interrupt_modes(&mut self.0, responder).await
3818 }
3819
3820 async fn set_interrupt_mode(
3821 &mut self,
3822
3823 request: ::fidl_next::Request<device::SetInterruptMode, ___T>,
3824
3825 responder: ::fidl_next::Responder<device::SetInterruptMode, ___T>,
3826 ) {
3827 ___H::set_interrupt_mode(&mut self.0, request, responder).await
3828 }
3829
3830 async fn read_config8(
3831 &mut self,
3832
3833 request: ::fidl_next::Request<device::ReadConfig8, ___T>,
3834
3835 responder: ::fidl_next::Responder<device::ReadConfig8, ___T>,
3836 ) {
3837 ___H::read_config8(&mut self.0, request, responder).await
3838 }
3839
3840 async fn read_config16(
3841 &mut self,
3842
3843 request: ::fidl_next::Request<device::ReadConfig16, ___T>,
3844
3845 responder: ::fidl_next::Responder<device::ReadConfig16, ___T>,
3846 ) {
3847 ___H::read_config16(&mut self.0, request, responder).await
3848 }
3849
3850 async fn read_config32(
3851 &mut self,
3852
3853 request: ::fidl_next::Request<device::ReadConfig32, ___T>,
3854
3855 responder: ::fidl_next::Responder<device::ReadConfig32, ___T>,
3856 ) {
3857 ___H::read_config32(&mut self.0, request, responder).await
3858 }
3859
3860 async fn write_config8(
3861 &mut self,
3862
3863 request: ::fidl_next::Request<device::WriteConfig8, ___T>,
3864
3865 responder: ::fidl_next::Responder<device::WriteConfig8, ___T>,
3866 ) {
3867 ___H::write_config8(&mut self.0, request, responder).await
3868 }
3869
3870 async fn write_config16(
3871 &mut self,
3872
3873 request: ::fidl_next::Request<device::WriteConfig16, ___T>,
3874
3875 responder: ::fidl_next::Responder<device::WriteConfig16, ___T>,
3876 ) {
3877 ___H::write_config16(&mut self.0, request, responder).await
3878 }
3879
3880 async fn write_config32(
3881 &mut self,
3882
3883 request: ::fidl_next::Request<device::WriteConfig32, ___T>,
3884
3885 responder: ::fidl_next::Responder<device::WriteConfig32, ___T>,
3886 ) {
3887 ___H::write_config32(&mut self.0, request, responder).await
3888 }
3889
3890 async fn get_capabilities(
3891 &mut self,
3892
3893 request: ::fidl_next::Request<device::GetCapabilities, ___T>,
3894
3895 responder: ::fidl_next::Responder<device::GetCapabilities, ___T>,
3896 ) {
3897 ___H::get_capabilities(&mut self.0, request, responder).await
3898 }
3899
3900 async fn get_extended_capabilities(
3901 &mut self,
3902
3903 request: ::fidl_next::Request<device::GetExtendedCapabilities, ___T>,
3904
3905 responder: ::fidl_next::Responder<device::GetExtendedCapabilities, ___T>,
3906 ) {
3907 ___H::get_extended_capabilities(&mut self.0, request, responder).await
3908 }
3909
3910 async fn get_bti(
3911 &mut self,
3912
3913 request: ::fidl_next::Request<device::GetBti, ___T>,
3914
3915 responder: ::fidl_next::Responder<device::GetBti, ___T>,
3916 ) {
3917 ___H::get_bti(&mut self.0, request, responder).await
3918 }
3919}
3920
3921#[derive(Debug)]
3923pub struct Service;
3924
3925impl ::fidl_next::DiscoverableService for Service {
3926 const SERVICE_NAME: &'static str = "fuchsia.hardware.pci.Service";
3927 const MEMBER_NAMES: &'static [&'static str] = &["device"];
3928}
3929
3930impl ::fidl_next::HasServiceRequest<::fidl_next::fuchsia::zx::Channel> for Service {}
3931
3932impl<___C> ::fidl_next::Service<___C> for Service
3933where
3934 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
3935{
3936 type Connector = ServiceConnector<___C>;
3937}
3938
3939#[repr(transparent)]
3941pub struct ServiceConnector<___C> {
3942 #[allow(dead_code)]
3943 connector: ___C,
3944}
3945
3946impl<___C> ServiceConnector<___C>
3947where
3948 ___C: ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>,
3949{
3950 pub fn device(
3952 &self,
3953 server_end: ::fidl_next::ServerEnd<crate::Device, ::fidl_next::fuchsia::zx::Channel>,
3954 ) -> ::core::result::Result<
3955 (),
3956 <___C as ::fidl_next::protocol::ServiceConnector<::fidl_next::fuchsia::zx::Channel>>::Error,
3957 > {
3958 ::fidl_next::protocol::ServiceConnector::<
3959 ::fidl_next::fuchsia::zx::Channel
3960 >::connect_to_member(
3961 &self.connector,
3962 "device",
3963 server_end.into_untyped(),
3964 )
3965 }
3966}
3967
3968pub trait ServiceHandler {
3970 fn device(
3972 &self,
3973 server_end: ::fidl_next::ServerEnd<crate::Device, ::fidl_next::fuchsia::zx::Channel>,
3974 );
3975}
3976
3977impl<___H, ___T> ::fidl_next::DispatchServiceHandler<___H, ___T> for Service
3978where
3979 ___H: ServiceHandler,
3980 ::fidl_next::fuchsia::zx::Channel: ::fidl_next::InstanceFromServiceTransport<___T>,
3981{
3982 fn on_connection(handler: &___H, member: &str, server_end: ___T) {
3983 use ::fidl_next::InstanceFromServiceTransport;
3984 match member {
3985 "device" => handler.device(::fidl_next::ServerEnd::from_untyped(
3986 ::fidl_next::fuchsia::zx::Channel::from_service_transport(server_end),
3987 )),
3988
3989 _ => unreachable!(),
3990 }
3991 }
3992}
3993
3994pub use fidl_next_common_fuchsia_hardware_pci::*;