Module riscv64 

Structs

RiscvFeatures

A simple container abstraction around the set of RISC-V features.

SupervisorAddressTranslationAndProtection

The layout of SATP.

SupervisorCause

The layout of SCAUSE.

SupervisorStatus

The layout of SSTATUS.

SupervisorTrapVector

The layout of STVEC.

VectorType

The layout of VTYPE.

Enums

ExceptionCode

exception_code values when interrupt is clear.

ExtensionStatus

InterruptCode

exception_code values when interrupt is set.

RiscvFeature

An enumeration of RISC-V features.

TranslationMode

TrapVectorMode

Xlen

Constants

SATP

[riscv/priv]: 4.1.11 Supervisor Address Translation and Protection Register (satp)

SCAUSE

[riscv/priv]: 3.1.15 Supervisor Cause Register (scause)

SSTATUS

[riscv/priv]: 3.1.6 Supervisor Status Register (sstatus)

STVAL

[riscv/priv]: 3.1.16 Supervisor Trap Value Register (stval)

STVEC

[riscv/priv]: 3.1.7 Supervisor Trap Vector Base Address Register (stvec)

VTYPE

[riscv/unpriv/v]: 3.4.1 Vector type register (vtype)