unwinder

Namespaces

```
namespace elf_utils
```

Enumerations

enum class RegisterID : uint8_t

Name	Value	Comments
kX64_rax	0	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rdx	1	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rcx	2	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rbx	3	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rsi	4	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rdi	5	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rbp	6	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rsp	7	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r8	8	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r9	9	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r10	10	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r11	11	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r12	12	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r13	13	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r14	14	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_r15	15	x86_64. https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf Page 57 NOTE: the order is not RAX, RBX, RCX, RDX as in zx_x86_64_thread_state_general_regs_t.
kX64_rip	16	NOTE: x64 ABI assigns 16 as "Return Address", which is not an actual register, and doesn't assign any id for RIP. A common practice (in libunwind and llvm-dwarfdump) is to use 16 to represent RIP.
kX64_last	17	NOTE: x64 ABI assigns 16 as "Return Address", which is not an actual register, and doesn't assign any id for RIP. A common practice (in libunwind and llvm-dwarfdump) is to use 16 to represent RIP.
kArm64_x0	0	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x1	1	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x2	2	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x3	3	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x4	4	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x5	5	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x6	6	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x7	7	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x8	8	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x9	9	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x10	10	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x11	11	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x12	12	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x13	13	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x14	14	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x15	15	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x16	16	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x17	17	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x18	18	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x19	19	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x20	20	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x21	21	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x22	22	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x23	23	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x24	24	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x25	25	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x26	26	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x27	27	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x28	28	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x29	29	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_x30	30	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_sp	31	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_pc	32	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_last	33	arm64 https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#41dwarf-register-names
kArm64_lr	kArm64_x30	Alias.
kArm32_fp	kArm64_x11	Aliases for ARM32.
kArm32_sp	kArm64_x13	Aliases for ARM32.
kArm32_lr	kArm64_x14	Aliases for ARM32.
kArm32_pc	kArm64_x15	Aliases for ARM32.
kArm32_last	kArm64_x16	Aliases for ARM32.
kRiscv64_zero	0	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_ra	1	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_sp	2	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_gp	3	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_tp	4	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_t0	5	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_t1	6	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_t2	7	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s0	8	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s1	9	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a0	10	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a1	11	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a2	12	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a3	13	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a4	14	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a5	15	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a6	16	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_a7	17	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s2	18	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s3	19	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s4	20	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s5	21	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s6	22	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s7	23	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s8	24	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s9	25	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s10	26	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_s11	27	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_t3	28	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_t4	29	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_t5	30	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_t6	31	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_last	32	riscv64. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc The name is chosen to keep consistency with zx_riscv64_thread_state_general_regs_t.
kRiscv64_pc	64	RISC-V DWARF Specification doesn't allocate a DWARF number for PC but do have a virtual register "Alternate Frame Return Column". We use this for PC so that 1) It matches the behavior on x64, where we use Return Address to represent RIP. 2) The same logic to unwind from an async frame can be reused.
kInvalid	static_cast<uint8_t>(-1)	RISC-V DWARF Specification doesn't allocate a DWARF number for PC but do have a virtual register "Alternate Frame Return Column". We use this for PC so that 1) It matches the behavior on x64, where we use Return Address to represent RIP. 2) The same logic to unwind from an async frame can be reused.

The DWARF ID for each register. It's NOT exhaustive and |Registers| class may store some register

ids not listed here.

Defined at line 18 of file ../../src/lib/unwinder/registers.h

enum UnwindTableSectionType

Name	Value	Comments
kEhFrame	1	The .eh_frame section. This section conforms to the specification found at https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/ehframechpt.html. This section may be found in live processes (it is an allocated section) or in a stripped and/or unstripped binary. It is possible for this section to also be found in split debug info binaries.
kDebugFrame	4	Indicates that this is the .debug_frame section. This is a debug section and conforms to the specification found here: http://www.dwarfstd.org/doc/DWARF5.pdf. Note that this section may be compressed, and since the file reading API is abstracted from this library, it is the responsibility of the backing ELF file Memory object to decompress the debug_frames section if necessary. This section will always fail to load when memory is provided from a live process.

Defined at line 21 of file ../../src/lib/unwinder/cfi_module.h

Records

class ArmEhAbiParser_CollectInstructionsIndexInline_Test

class ArmEhAbiParser_CollectInstructionsTableLookup_Test

class UnwinderBaseTest_AsyncUnwindLoop_Test

```
class UnwinderBaseTest_SetTrust_Test
```

class UnwinderBaseTest_TryAsyncUnwinderSuccess_Test

class UnwinderBaseTest_TryUnwinderError_Test

class UnwinderBaseTest_TryUnwinderPcIsNOTReturnAddress_Test

class UnwinderBaseTest_TryUnwinderPcIsReturnAddress_Test

class UnwinderBaseTest_TryUnwinderSignalFrame_Test

class UnwinderBaseTest_TryUnwinderSuccess_Test

```
class UnwinderBaseTest_UnwindLoop_Test
```

Functions

```
int CfiOnly (std::function<int ()> next)
```
Defined at line 9 of file ../../src/lib/unwinder/tests/cfi_only.cc
```
int FpOnly (std::function<int ()> next)
```
Defined at line 9 of file ../../src/lib/unwinder/tests/fp_only.cc
```
uint32_t SignExtendPrel31 (uint32_t data)
```
Defined at line 15 of file ../../src/lib/unwinder/arm_ehabi_module.h
```
int32_t DecodePrel31 (uint32_t ptr)
```
Defined at line 17 of file ../../src/lib/unwinder/arm_ehabi_module.h
```
Error Success ()
```
Special way to create a non-error Error object.

Defined at line 34 of file ../../src/lib/unwinder/error.h
```
Registers FromFuchsiaRegisters (const zx_thread_state_general_regs_t & regs)
```
Convert zx_thread_state_general_regs_t to Registers.

Defined at line 23 of file ../../src/lib/unwinder/fuchsia.cc

Registers FromPlatformRegisters (const PlatformRegisters & regs)

Defined at line 26 of file ../../src/lib/unwinder/platform.h

Registers FromPlatformRegisters (const PlatformRegisters & regs)

Defined at line 26 of file ../../src/lib/unwinder/platform.h

```
std::vector<Frame> UnwindLocal ()
```
Unwind from the current location. The first frame in the returned value is the return address

of this function call. This function is not available on macOS.

Defined at line 40 of file ../../src/lib/unwinder/unwind_local.cc

void UnwindLocalAsync (Memory * local_memory, AsyncMemory::Delegate * delegate, fit::callback<void (std::vector<Frame>)> on_done)

Asynchronous version of the above.

Defined at line 52 of file ../../src/lib/unwinder/unwind_local.cc

```
Registers FromLinuxRegisters (const struct user_regs_struct & regs)
```
Convert user_regs_struct to Registers.

Defined at line 31 of file ../../src/lib/unwinder/linux.cc
```
Error TryUnwinder (UnwinderBase * unwinder, Memory * stack, const Frame & current, Frame & next)
```
Shared logic to try a specific unwinder and perform fixups.

Defined at line 80 of file ../../src/lib/unwinder/unwinder_base.cc
```
void TryAsyncUnwinder (UnwinderBase * unwinder, AsyncMemory * stack, const Frame & current, fit::callback<void (Error, Frame)> cb)
```
Shared logic to try a specific unwinder asynchronously and perform fixups.

Defined at line 93 of file ../../src/lib/unwinder/unwinder_base.cc
```
std::vector<Frame> Unwind (Memory * memory, const std::vector<uint64_t> & modules, const Registers & registers, size_t max_depth)
```
Unwind with given memory, modules, and registers.

This provides an simplified API than the above Unwinder class but comes without a cache.

The modules are provided as base addresses and are accessed through the memory.

Defined at line 253 of file ../../src/lib/unwinder/unwind.cc
```
void AsmGetRegs (void * regs)
```
```
int ScsOnly (std::function<int ()> next)
```
Defined at line 9 of file ../../src/lib/unwinder/tests/scs_only.cc
```
Registers GetContext ()
```
Defined at line 123 of file ../../src/lib/unwinder/third_party/libunwindstack/context.h
```
std::string ArchToString (Registers::Arch arch)
```
Defined at line 241 of file ../../src/lib/unwinder/registers.cc