struct PmcReg

struct PmcReg

Defined at line 24 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

All fields in this register are read only.

Public Members

 field_version_26
 field_pme_clock_28
 field_immediate_readiness_on_return_to_d0_30
 field_dsi_33
 field_aux_current_43
 field_d1_support_45
 field_d2_support_47
 field_pme_support_50

Public Methods

template <, >
SelfType & set_version (typename SelfType::ValueType val)

Hardwired to 011 in this specification version.

Defined at line 26 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType version ()

Hardwired to 011 in this specification version.

Defined at line 26 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType pme_clock ()

Hardwired to 0 in PCIe.

Defined at line 28 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
SelfType & set_pme_clock (typename SelfType::ValueType val)

Hardwired to 0 in PCIe.

Defined at line 28 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType immediate_readiness_on_return_to_d0 ()

Set if no delay is needed following a transition to state D0.

Defined at line 30 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
SelfType & set_immediate_readiness_on_return_to_d0 (typename SelfType::ValueType val)

Set if no delay is needed following a transition to state D0.

Defined at line 30 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType dsi ()

Set if the device has a special initialization sequence following a D0 transition

and cannot be managed entirely by the bus driver.

Defined at line 33 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
SelfType & set_dsi (typename SelfType::ValueType val)

Set if the device has a special initialization sequence following a D0 transition

and cannot be managed entirely by the bus driver.

Defined at line 33 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType aux_current ()

Details the auxiliary current required. Hardwired to 0 if the Data register is implemented.

111 -> 375 mA

110 -> 320 mA

101 -> 270 mA

100 -> 220 mA

011 -> 160 mA

010 -> 100 mA

001 -> 55 mA

000 -> 0 (self powered)

Defined at line 43 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
SelfType & set_aux_current (typename SelfType::ValueType val)

Details the auxiliary current required. Hardwired to 0 if the Data register is implemented.

111 -> 375 mA

110 -> 320 mA

101 -> 270 mA

100 -> 220 mA

011 -> 160 mA

010 -> 100 mA

001 -> 55 mA

000 -> 0 (self powered)

Defined at line 43 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType d1_support ()

Set if D1 is supported.

Defined at line 45 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
SelfType & set_d1_support (typename SelfType::ValueType val)

Set if D1 is supported.

Defined at line 45 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType d2_support ()

Set if D2 is supported.

Defined at line 47 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
SelfType & set_d2_support (typename SelfType::ValueType val)

Set if D2 is supported.

Defined at line 47 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
typename SelfType::ValueType pme_support ()

A bitmask corresponding to whether a given power state can generate a PME#.

In order from 15:11, D3cold D3hot D2 D1 D0

Defined at line 50 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

template <, >
SelfType & set_pme_support (typename SelfType::ValueType val)

A bitmask corresponding to whether a given power state can generate a PME#.

In order from 15:11, D3cold D3hot D2 D1 D0

Defined at line 50 of file ../../src/devices/pci/lib/cpp/capabilities/power_management.h

Records