class BufferCollectionWaitForAllBuffersAllocatedResponse

Defined at line 9907 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

Public Methods

void BufferCollectionWaitForAllBuffersAllocatedResponse ()

Defined at line 9909 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

void BufferCollectionWaitForAllBuffersAllocatedResponse (const BufferCollectionWaitForAllBuffersAllocatedResponse & other)

Defined at line 9910 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

BufferCollectionWaitForAllBuffersAllocatedResponse & operator= (const BufferCollectionWaitForAllBuffersAllocatedResponse & other)

Defined at line 9911 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

void BufferCollectionWaitForAllBuffersAllocatedResponse (BufferCollectionWaitForAllBuffersAllocatedResponse && other)

Defined at line 9912 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

bool IsEmpty ()

Returns whether no field is set.

bool HasUnknownData ()

Returns whether the table references unknown fields.

void _CloseHandles ()

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferCollectionWaitForAllBuffersAllocatedResponse> Builder (::fidl::AnyArena & arena)

Return a builder that by defaults allocates of an arena.

::fidl::WireTableExternalBuilder< ::fuchsia_sysmem2::wire::BufferCollectionWaitForAllBuffersAllocatedResponse> ExternalBuilder (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_sysmem2::wire::BufferCollectionWaitForAllBuffersAllocatedResponse>> frame)

Return a builder that relies on explicitly allocating |fidl::ObjectView|s.

::fuchsia_sysmem2::wire::BufferCollectionInfo & buffer_collection_info ()

bool has_buffer_collection_info ()

BufferCollectionWaitForAllBuffersAllocatedResponse & operator= (BufferCollectionWaitForAllBuffersAllocatedResponse && other)

Defined at line 9913 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

BufferCollectionWaitForAllBuffersAllocatedResponse & set_buffer_collection_info (::fidl::ObjectView< ::fuchsia_sysmem2::wire::BufferCollectionInfo> elem)

BufferCollectionWaitForAllBuffersAllocatedResponse & set_buffer_collection_info (std::nullptr_t )

BufferCollectionWaitForAllBuffersAllocatedResponse & clear_buffer_collection_info ()

void BufferCollectionWaitForAllBuffersAllocatedResponse (::fidl::AnyArena & allocator)

void BufferCollectionWaitForAllBuffersAllocatedResponse (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_sysmem2::wire::BufferCollectionWaitForAllBuffersAllocatedResponse>> && frame)

This constructor allows a user controlled allocation (not using a Arena).

It should only be used when performance is key.

As soon as the frame is given to the table, it must not be used directly or for another table.

void Allocate (::fidl::AnyArena & allocator)

void Init (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_sysmem2::wire::BufferCollectionWaitForAllBuffersAllocatedResponse>> && frame_ptr)

void ~BufferCollectionWaitForAllBuffersAllocatedResponse ()

Defined at line 9915 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

Friends

class WireTableBaseBuilder

class WireTableBaseBuilder