class FormatCosts

Defined at line 14348 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

This is the root of the persistent fidl in a format costs file. The format

costs files are read by the assembly tool and merged into the single

sysmem_config.persistent_fidl file in the sysmem domain config (see Config

above).

Normally json[5] would be preferable for config, but we generate this config

in rust using FIDL types (to avoid repetition and to take advantage of FIDL

rust codegen), and there's no json schema for FIDL types.

While the resulting sysmem_config.persistent_fidl is a single file that can

contain multiple aspects of sysmem config, in contrast a format costs file

contains only format costs. We don't mind having more separate files during

the build, but it's nice to get sysmem's domain config down to a single file

on-device.

Public Methods

::fidl::WireTableExternalBuilder< ::fuchsia_sysmem2::wire::FormatCosts> ExternalBuilder (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_sysmem2::wire::FormatCosts>> frame)

Return a builder that relies on explicitly allocating |fidl::ObjectView|s.

void FormatCosts ()

Defined at line 14350 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

void FormatCosts (const FormatCosts & other)

Defined at line 14351 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

bool IsEmpty ()

Returns whether no field is set.

bool HasUnknownData ()

Returns whether the table references unknown fields.

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::FormatCosts> Builder (::fidl::AnyArena & arena)

Return a builder that by defaults allocates of an arena.

::fidl::VectorView< ::fuchsia_sysmem2::wire::FormatCostEntry> & format_costs ()

This is a chunk of entries that'll end up in

['fuchsia.sysmem2.Config.format_costs'] (see above) unless overriden by

later entries (either in this same vector or in later-processed files

during aggregation by the assembly tool).

bool has_format_costs ()

FormatCosts & operator= (const FormatCosts & other)

Defined at line 14352 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

void FormatCosts (FormatCosts && other)

Defined at line 14353 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

FormatCosts & operator= (FormatCosts && other)

Defined at line 14354 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

FormatCosts & set_format_costs (::fidl::ObjectView< ::fidl::VectorView< ::fuchsia_sysmem2::wire::FormatCostEntry>> elem)

FormatCosts & set_format_costs (std::nullptr_t )

FormatCosts & clear_format_costs ()

void FormatCosts (::fidl::AnyArena & allocator)

void FormatCosts (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_sysmem2::wire::FormatCosts>> && frame)

This constructor allows a user controlled allocation (not using a Arena).

It should only be used when performance is key.

As soon as the frame is given to the table, it must not be used directly or for another table.

void Allocate (::fidl::AnyArena & allocator)

void Init (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_sysmem2::wire::FormatCosts>> && frame_ptr)

void ~FormatCosts ()

Defined at line 14356 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

Friends

class WireTableBaseBuilder

class WireTableBaseBuilder