class VregGetRegulatorParamsResult
Defined at line 819 of file fidling/gen/sdk/fidl/fuchsia.hardware.vreg/fuchsia.hardware.vreg/cpp/fidl/fuchsia.hardware.vreg/cpp/wire_types.h
Public Methods
void VregGetRegulatorParamsResult ()
void VregGetRegulatorParamsResult (const VregGetRegulatorParamsResult & )
Defined at line 825 of file fidling/gen/sdk/fidl/fuchsia.hardware.vreg/fuchsia.hardware.vreg/cpp/fidl/fuchsia.hardware.vreg/cpp/wire_types.h
VregGetRegulatorParamsResult & operator= (const VregGetRegulatorParamsResult & )
Defined at line 826 of file fidling/gen/sdk/fidl/fuchsia.hardware.vreg/fuchsia.hardware.vreg/cpp/fidl/fuchsia.hardware.vreg/cpp/wire_types.h
void VregGetRegulatorParamsResult (VregGetRegulatorParamsResult && )
Defined at line 827 of file fidling/gen/sdk/fidl/fuchsia.hardware.vreg/fuchsia.hardware.vreg/cpp/fidl/fuchsia.hardware.vreg/cpp/wire_types.h
bool has_invalid_tag ()
bool is_response ()
VregGetRegulatorParamsResult WithResponse (::fidl::ObjectView< ::fuchsia_hardware_vreg::wire::VregGetRegulatorParamsResponse> val)
VregGetRegulatorParamsResult & operator= (VregGetRegulatorParamsResult && )
Defined at line 828 of file fidling/gen/sdk/fidl/fuchsia.hardware.vreg/fuchsia.hardware.vreg/cpp/fidl/fuchsia.hardware.vreg/cpp/wire_types.h
template <typename... Args>
VregGetRegulatorParamsResult WithResponse (::fidl::AnyArena & allocator, Args &&... args)
Defined at line 842 of file fidling/gen/sdk/fidl/fuchsia.hardware.vreg/fuchsia.hardware.vreg/cpp/fidl/fuchsia.hardware.vreg/cpp/wire_types.h
::fuchsia_hardware_vreg::wire::VregGetRegulatorParamsResponse & response ()
const ::fuchsia_hardware_vreg::wire::VregGetRegulatorParamsResponse & response ()
bool is_err ()
VregGetRegulatorParamsResult WithErr (int32_t val)
int32_t & err ()
const int32_t & err ()
::fuchsia_hardware_vreg::wire::VregGetRegulatorParamsResult::Tag Which ()
Enumerations
enum Tag
| Name | Value |
|---|---|
| kResponse | 1 |
| kErr | 2 |
Defined at line 830 of file fidling/gen/sdk/fidl/fuchsia.hardware.vreg/fuchsia.hardware.vreg/cpp/fidl/fuchsia.hardware.vreg/cpp/wire_types.h